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x86, UV: Fix for nodes with memory and no cpus
[linux/fpc-iii.git] / drivers / net / irda / nsc-ircc.c
blob45fd9c1eb34333499e2a3ead01c334b196c1a535
1 /*********************************************************************
2 *
3 * Filename: nsc-ircc.c
4 * Version: 1.0
5 * Description: Driver for the NSC PC'108 and PC'338 IrDA chipsets
6 * Status: Stable.
7 * Author: Dag Brattli <dagb@cs.uit.no>
8 * Created at: Sat Nov 7 21:43:15 1998
9 * Modified at: Wed Mar 1 11:29:34 2000
10 * Modified by: Dag Brattli <dagb@cs.uit.no>
11 *
12 * Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
13 * Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
14 * Copyright (c) 1998 Actisys Corp., www.actisys.com
15 * Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
16 * All Rights Reserved
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * Neither Dag Brattli nor University of Tromsø admit liability nor
24 * provide warranty for any of this software. This material is
25 * provided "AS-IS" and at no charge.
26 *
27 * Notice that all functions that needs to access the chip in _any_
28 * way, must save BSR register on entry, and restore it on exit.
29 * It is _very_ important to follow this policy!
30 *
31 * __u8 bank;
32 *
33 * bank = inb(iobase+BSR);
34 *
35 * do_your_stuff_here();
36 *
37 * outb(bank, iobase+BSR);
38 *
39 * If you find bugs in this file, its very likely that the same bug
40 * will also be in w83977af_ir.c since the implementations are quite
41 * similar.
42 *
43 ********************************************************************/
44
45 #include <linux/module.h>
46
47 #include <linux/kernel.h>
48 #include <linux/types.h>
49 #include <linux/skbuff.h>
50 #include <linux/netdevice.h>
51 #include <linux/ioport.h>
52 #include <linux/delay.h>
53 #include <linux/slab.h>
54 #include <linux/init.h>
55 #include <linux/rtnetlink.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/pnp.h>
58 #include <linux/platform_device.h>
59
60 #include <asm/io.h>
61 #include <asm/dma.h>
62 #include <asm/byteorder.h>
63
64 #include <net/irda/wrapper.h>
65 #include <net/irda/irda.h>
66 #include <net/irda/irda_device.h>
67
68 #include "nsc-ircc.h"
69
70 #define CHIP_IO_EXTENT 8
71 #define BROKEN_DONGLE_ID
72
73 static char *driver_name = "nsc-ircc";
74
75 /* Power Management */
76 #define NSC_IRCC_DRIVER_NAME "nsc-ircc"
77 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
78 static int nsc_ircc_resume(struct platform_device *dev);
79
80 static struct platform_driver nsc_ircc_driver = {
81 .suspend = nsc_ircc_suspend,
82 .resume = nsc_ircc_resume,
83 .driver = {
84 .name = NSC_IRCC_DRIVER_NAME,
85 },
86 };
87
88 /* Module parameters */
89 static int qos_mtt_bits = 0x07; /* 1 ms or more */
90 static int dongle_id;
91
92 /* Use BIOS settions by default, but user may supply module parameters */
93 static unsigned int io[] = { ~0, ~0, ~0, ~0, ~0 };
94 static unsigned int irq[] = { 0, 0, 0, 0, 0 };
95 static unsigned int dma[] = { 0, 0, 0, 0, 0 };
96
97 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
98 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
99 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
100 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
101 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
102 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
103 #ifdef CONFIG_PNP
104 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
105 #endif
106
107 /* These are the known NSC chips */
108 static nsc_chip_t chips[] = {
109 /* Name, {cfg registers}, chip id index reg, chip id expected value, revision mask */
110 { "PC87108", { 0x150, 0x398, 0xea }, 0x05, 0x10, 0xf0,
111 nsc_ircc_probe_108, nsc_ircc_init_108 },
112 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
113 nsc_ircc_probe_338, nsc_ircc_init_338 },
114 /* Contributed by Steffen Pingel - IBM X40 */
115 { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
116 nsc_ircc_probe_39x, nsc_ircc_init_39x },
117 /* Contributed by Jan Frey - IBM A30/A31 */
118 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
119 nsc_ircc_probe_39x, nsc_ircc_init_39x },
120 /* IBM ThinkPads using PC8738x (T60/X60/Z60) */
121 { "IBM-PC8738x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
122 nsc_ircc_probe_39x, nsc_ircc_init_39x },
123 /* IBM ThinkPads using PC8394T (T43/R52/?) */
124 { "IBM-PC8394T", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf9, 0xff,
125 nsc_ircc_probe_39x, nsc_ircc_init_39x },
126 { NULL }
127 };
128
129 static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
130
131 static char *dongle_types[] = {
132 "Differential serial interface",
133 "Differential serial interface",
134 "Reserved",
135 "Reserved",
136 "Sharp RY5HD01",
137 "Reserved",
138 "Single-ended serial interface",
139 "Consumer-IR only",
140 "HP HSDL-2300, HP HSDL-3600/HSDL-3610",
141 "IBM31T1100 or Temic TFDS6000/TFDS6500",
142 "Reserved",
143 "Reserved",
144 "HP HSDL-1100/HSDL-2100",
145 "HP HSDL-1100/HSDL-2100",
146 "Supports SIR Mode only",
147 "No dongle connected",
148 };
149
150 /* PNP probing */
151 static chipio_t pnp_info;
152 static const struct pnp_device_id nsc_ircc_pnp_table[] = {
153 { .id = "NSC6001", .driver_data = 0 },
154 { .id = "HWPC224", .driver_data = 0 },
155 { .id = "IBM0071", .driver_data = NSC_FORCE_DONGLE_TYPE9 },
156 { }
157 };
158
159 MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
160
161 static struct pnp_driver nsc_ircc_pnp_driver = {
162 #ifdef CONFIG_PNP
163 .name = "nsc-ircc",
164 .id_table = nsc_ircc_pnp_table,
165 .probe = nsc_ircc_pnp_probe,
166 #endif
167 };
168
169 /* Some prototypes */
170 static int nsc_ircc_open(chipio_t *info);
171 static int nsc_ircc_close(struct nsc_ircc_cb *self);
172 static int nsc_ircc_setup(chipio_t *info);
173 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
174 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self);
175 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
176 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev);
177 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev);
178 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
179 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
180 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 baud);
181 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self);
182 static int nsc_ircc_read_dongle_id (int iobase);
183 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
184
185 static int nsc_ircc_net_open(struct net_device *dev);
186 static int nsc_ircc_net_close(struct net_device *dev);
187 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
188
189 /* Globals */
190 static int pnp_registered;
191 static int pnp_succeeded;
192
193 /*
194 * Function nsc_ircc_init ()
195 *
196 * Initialize chip. Just try to find out how many chips we are dealing with
197 * and where they are
198 */
199 static int __init nsc_ircc_init(void)
200 {
201 chipio_t info;
202 nsc_chip_t *chip;
203 int ret;
204 int cfg_base;
205 int cfg, id;
206 int reg;
207 int i = 0;
208
209 ret = platform_driver_register(&nsc_ircc_driver);
210 if (ret) {
211 IRDA_ERROR("%s, Can't register driver!\n", driver_name);
212 return ret;
213 }
214
215 /* Register with PnP subsystem to detect disable ports */
216 ret = pnp_register_driver(&nsc_ircc_pnp_driver);
217
218 if (!ret)
219 pnp_registered = 1;
220
221 ret = -ENODEV;
222
223 /* Probe for all the NSC chipsets we know about */
224 for (chip = chips; chip->name ; chip++) {
225 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__,
226 chip->name);
227
228 /* Try all config registers for this chip */
229 for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
230 cfg_base = chip->cfg[cfg];
231 if (!cfg_base)
232 continue;
233
234 /* Read index register */
235 reg = inb(cfg_base);
236 if (reg == 0xff) {
237 IRDA_DEBUG(2, "%s() no chip at 0x%03x\n", __func__, cfg_base);
238 continue;
239 }
240
241 /* Read chip identification register */
242 outb(chip->cid_index, cfg_base);
243 id = inb(cfg_base+1);
244 if ((id & chip->cid_mask) == chip->cid_value) {
245 IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
246 __func__, chip->name, id & ~chip->cid_mask);
247
248 /*
249 * If we found a correct PnP setting,
250 * we first try it.
251 */
252 if (pnp_succeeded) {
253 memset(&info, 0, sizeof(chipio_t));
254 info.cfg_base = cfg_base;
255 info.fir_base = pnp_info.fir_base;
256 info.dma = pnp_info.dma;
257 info.irq = pnp_info.irq;
258
259 if (info.fir_base < 0x2000) {
260 IRDA_MESSAGE("%s, chip->init\n", driver_name);
261 chip->init(chip, &info);
262 } else
263 chip->probe(chip, &info);
264
265 if (nsc_ircc_open(&info) >= 0)
266 ret = 0;
267 }
268
269 /*
270 * Opening based on PnP values failed.
271 * Let's fallback to user values, or probe
272 * the chip.
273 */
274 if (ret) {
275 IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
276 memset(&info, 0, sizeof(chipio_t));
277 info.cfg_base = cfg_base;
278 info.fir_base = io[i];
279 info.dma = dma[i];
280 info.irq = irq[i];
281
282 /*
283 * If the user supplies the base address, then
284 * we init the chip, if not we probe the values
285 * set by the BIOS
286 */
287 if (io[i] < 0x2000) {
288 chip->init(chip, &info);
289 } else
290 chip->probe(chip, &info);
291
292 if (nsc_ircc_open(&info) >= 0)
293 ret = 0;
294 }
295 i++;
296 } else {
297 IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __func__, id);
298 }
299 }
300 }
301
302 if (ret) {
303 platform_driver_unregister(&nsc_ircc_driver);
304 pnp_unregister_driver(&nsc_ircc_pnp_driver);
305 pnp_registered = 0;
306 }
307
308 return ret;
309 }
310
311 /*
312 * Function nsc_ircc_cleanup ()
313 *
314 * Close all configured chips
315 *
316 */
317 static void __exit nsc_ircc_cleanup(void)
318 {
319 int i;
320
321 for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
322 if (dev_self[i])
323 nsc_ircc_close(dev_self[i]);
324 }
325
326 platform_driver_unregister(&nsc_ircc_driver);
327
328 if (pnp_registered)
329 pnp_unregister_driver(&nsc_ircc_pnp_driver);
330
331 pnp_registered = 0;
332 }
333
334 static const struct net_device_ops nsc_ircc_sir_ops = {
335 .ndo_open = nsc_ircc_net_open,
336 .ndo_stop = nsc_ircc_net_close,
337 .ndo_start_xmit = nsc_ircc_hard_xmit_sir,
338 .ndo_do_ioctl = nsc_ircc_net_ioctl,
339 };
340
341 static const struct net_device_ops nsc_ircc_fir_ops = {
342 .ndo_open = nsc_ircc_net_open,
343 .ndo_stop = nsc_ircc_net_close,
344 .ndo_start_xmit = nsc_ircc_hard_xmit_fir,
345 .ndo_do_ioctl = nsc_ircc_net_ioctl,
346 };
347
348 /*
349 * Function nsc_ircc_open (iobase, irq)
350 *
351 * Open driver instance
352 *
353 */
354 static int __init nsc_ircc_open(chipio_t *info)
355 {
356 struct net_device *dev;
357 struct nsc_ircc_cb *self;
358 void *ret;
359 int err, chip_index;
360
361 IRDA_DEBUG(2, "%s()\n", __func__);
362
363
364 for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
365 if (!dev_self[chip_index])
366 break;
367 }
368
369 if (chip_index == ARRAY_SIZE(dev_self)) {
370 IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __func__);
371 return -ENOMEM;
372 }
373
374 IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
375 info->cfg_base);
376
377 if ((nsc_ircc_setup(info)) == -1)
378 return -1;
379
380 IRDA_MESSAGE("%s, driver loaded (Dag Brattli)\n", driver_name);
381
382 dev = alloc_irdadev(sizeof(struct nsc_ircc_cb));
383 if (dev == NULL) {
384 IRDA_ERROR("%s(), can't allocate memory for "
385 "control block!\n", __func__);
386 return -ENOMEM;
387 }
388
389 self = netdev_priv(dev);
390 self->netdev = dev;
391 spin_lock_init(&self->lock);
392
393 /* Need to store self somewhere */
394 dev_self[chip_index] = self;
395 self->index = chip_index;
396
397 /* Initialize IO */
398 self->io.cfg_base = info->cfg_base;
399 self->io.fir_base = info->fir_base;
400 self->io.irq = info->irq;
401 self->io.fir_ext = CHIP_IO_EXTENT;
402 self->io.dma = info->dma;
403 self->io.fifo_size = 32;
404
405 /* Reserve the ioports that we need */
406 ret = request_region(self->io.fir_base, self->io.fir_ext, driver_name);
407 if (!ret) {
408 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n",
409 __func__, self->io.fir_base);
410 err = -ENODEV;
411 goto out1;
412 }
413
414 /* Initialize QoS for this device */
415 irda_init_max_qos_capabilies(&self->qos);
416
417 /* The only value we must override it the baudrate */
418 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
419 IR_115200|IR_576000|IR_1152000 |(IR_4000000 << 8);
420
421 self->qos.min_turn_time.bits = qos_mtt_bits;
422 irda_qos_bits_to_value(&self->qos);
423
424 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
425 self->rx_buff.truesize = 14384;
426 self->tx_buff.truesize = 14384;
427
428 /* Allocate memory if needed */
429 self->rx_buff.head =
430 dma_alloc_coherent(NULL, self->rx_buff.truesize,
431 &self->rx_buff_dma, GFP_KERNEL);
432 if (self->rx_buff.head == NULL) {
433 err = -ENOMEM;
434 goto out2;
435
436 }
437 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
438
439 self->tx_buff.head =
440 dma_alloc_coherent(NULL, self->tx_buff.truesize,
441 &self->tx_buff_dma, GFP_KERNEL);
442 if (self->tx_buff.head == NULL) {
443 err = -ENOMEM;
444 goto out3;
445 }
446 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
447
448 self->rx_buff.in_frame = FALSE;
449 self->rx_buff.state = OUTSIDE_FRAME;
450 self->tx_buff.data = self->tx_buff.head;
451 self->rx_buff.data = self->rx_buff.head;
452
453 /* Reset Tx queue info */
454 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
455 self->tx_fifo.tail = self->tx_buff.head;
456
457 /* Override the network functions we need to use */
458 dev->netdev_ops = &nsc_ircc_sir_ops;
459
460 err = register_netdev(dev);
461 if (err) {
462 IRDA_ERROR("%s(), register_netdev() failed!\n", __func__);
463 goto out4;
464 }
465 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
466
467 /* Check if user has supplied a valid dongle id or not */
468 if ((dongle_id <= 0) ||
469 (dongle_id >= ARRAY_SIZE(dongle_types))) {
470 dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
471
472 IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
473 dongle_types[dongle_id]);
474 } else {
475 IRDA_MESSAGE("%s, Using dongle: %s\n", driver_name,
476 dongle_types[dongle_id]);
477 }
478
479 self->io.dongle_id = dongle_id;
480 nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
481
482 self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
483 self->index, NULL, 0);
484 if (IS_ERR(self->pldev)) {
485 err = PTR_ERR(self->pldev);
486 goto out5;
487 }
488 platform_set_drvdata(self->pldev, self);
489
490 return chip_index;
491
492 out5:
493 unregister_netdev(dev);
494 out4:
495 dma_free_coherent(NULL, self->tx_buff.truesize,
496 self->tx_buff.head, self->tx_buff_dma);
497 out3:
498 dma_free_coherent(NULL, self->rx_buff.truesize,
499 self->rx_buff.head, self->rx_buff_dma);
500 out2:
501 release_region(self->io.fir_base, self->io.fir_ext);
502 out1:
503 free_netdev(dev);
504 dev_self[chip_index] = NULL;
505 return err;
506 }
507
508 /*
509 * Function nsc_ircc_close (self)
510 *
511 * Close driver instance
512 *
513 */
514 static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
515 {
516 int iobase;
517
518 IRDA_DEBUG(4, "%s()\n", __func__);
519
520 IRDA_ASSERT(self != NULL, return -1;);
521
522 iobase = self->io.fir_base;
523
524 platform_device_unregister(self->pldev);
525
526 /* Remove netdevice */
527 unregister_netdev(self->netdev);
528
529 /* Release the PORT that this driver is using */
530 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n",
531 __func__, self->io.fir_base);
532 release_region(self->io.fir_base, self->io.fir_ext);
533
534 if (self->tx_buff.head)
535 dma_free_coherent(NULL, self->tx_buff.truesize,
536 self->tx_buff.head, self->tx_buff_dma);
537
538 if (self->rx_buff.head)
539 dma_free_coherent(NULL, self->rx_buff.truesize,
540 self->rx_buff.head, self->rx_buff_dma);
541
542 dev_self[self->index] = NULL;
543 free_netdev(self->netdev);
544
545 return 0;
546 }
547
548 /*
549 * Function nsc_ircc_init_108 (iobase, cfg_base, irq, dma)
550 *
551 * Initialize the NSC '108 chip
552 *
553 */
554 static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info)
555 {
556 int cfg_base = info->cfg_base;
557 __u8 temp=0;
558
559 outb(2, cfg_base); /* Mode Control Register (MCTL) */
560 outb(0x00, cfg_base+1); /* Disable device */
561
562 /* Base Address and Interrupt Control Register (BAIC) */
563 outb(CFG_108_BAIC, cfg_base);
564 switch (info->fir_base) {
565 case 0x3e8: outb(0x14, cfg_base+1); break;
566 case 0x2e8: outb(0x15, cfg_base+1); break;
567 case 0x3f8: outb(0x16, cfg_base+1); break;
568 case 0x2f8: outb(0x17, cfg_base+1); break;
569 default: IRDA_ERROR("%s(), invalid base_address", __func__);
570 }
571
572 /* Control Signal Routing Register (CSRT) */
573 switch (info->irq) {
574 case 3: temp = 0x01; break;
575 case 4: temp = 0x02; break;
576 case 5: temp = 0x03; break;
577 case 7: temp = 0x04; break;
578 case 9: temp = 0x05; break;
579 case 11: temp = 0x06; break;
580 case 15: temp = 0x07; break;
581 default: IRDA_ERROR("%s(), invalid irq", __func__);
582 }
583 outb(CFG_108_CSRT, cfg_base);
584
585 switch (info->dma) {
586 case 0: outb(0x08+temp, cfg_base+1); break;
587 case 1: outb(0x10+temp, cfg_base+1); break;
588 case 3: outb(0x18+temp, cfg_base+1); break;
589 default: IRDA_ERROR("%s(), invalid dma", __func__);
590 }
591
592 outb(CFG_108_MCTL, cfg_base); /* Mode Control Register (MCTL) */
593 outb(0x03, cfg_base+1); /* Enable device */
594
595 return 0;
596 }
597
598 /*
599 * Function nsc_ircc_probe_108 (chip, info)
600 *
601 *
602 *
603 */
604 static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info)
605 {
606 int cfg_base = info->cfg_base;
607 int reg;
608
609 /* Read address and interrupt control register (BAIC) */
610 outb(CFG_108_BAIC, cfg_base);
611 reg = inb(cfg_base+1);
612
613 switch (reg & 0x03) {
614 case 0:
615 info->fir_base = 0x3e8;
616 break;
617 case 1:
618 info->fir_base = 0x2e8;
619 break;
620 case 2:
621 info->fir_base = 0x3f8;
622 break;
623 case 3:
624 info->fir_base = 0x2f8;
625 break;
626 }
627 info->sir_base = info->fir_base;
628 IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__,
629 info->fir_base);
630
631 /* Read control signals routing register (CSRT) */
632 outb(CFG_108_CSRT, cfg_base);
633 reg = inb(cfg_base+1);
634
635 switch (reg & 0x07) {
636 case 0:
637 info->irq = -1;
638 break;
639 case 1:
640 info->irq = 3;
641 break;
642 case 2:
643 info->irq = 4;
644 break;
645 case 3:
646 info->irq = 5;
647 break;
648 case 4:
649 info->irq = 7;
650 break;
651 case 5:
652 info->irq = 9;
653 break;
654 case 6:
655 info->irq = 11;
656 break;
657 case 7:
658 info->irq = 15;
659 break;
660 }
661 IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq);
662
663 /* Currently we only read Rx DMA but it will also be used for Tx */
664 switch ((reg >> 3) & 0x03) {
665 case 0:
666 info->dma = -1;
667 break;
668 case 1:
669 info->dma = 0;
670 break;
671 case 2:
672 info->dma = 1;
673 break;
674 case 3:
675 info->dma = 3;
676 break;
677 }
678 IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma);
679
680 /* Read mode control register (MCTL) */
681 outb(CFG_108_MCTL, cfg_base);
682 reg = inb(cfg_base+1);
683
684 info->enabled = reg & 0x01;
685 info->suspended = !((reg >> 1) & 0x01);
686
687 return 0;
688 }
689
690 /*
691 * Function nsc_ircc_init_338 (chip, info)
692 *
693 * Initialize the NSC '338 chip. Remember that the 87338 needs two
694 * consecutive writes to the data registers while CPU interrupts are
695 * disabled. The 97338 does not require this, but shouldn't be any
696 * harm if we do it anyway.
697 */
698 static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info)
699 {
700 /* No init yet */
701
702 return 0;
703 }
704
705 /*
706 * Function nsc_ircc_probe_338 (chip, info)
707 *
708 *
709 *
710 */
711 static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info)
712 {
713 int cfg_base = info->cfg_base;
714 int reg, com = 0;
715 int pnp;
716
717 /* Read funtion enable register (FER) */
718 outb(CFG_338_FER, cfg_base);
719 reg = inb(cfg_base+1);
720
721 info->enabled = (reg >> 2) & 0x01;
722
723 /* Check if we are in Legacy or PnP mode */
724 outb(CFG_338_PNP0, cfg_base);
725 reg = inb(cfg_base+1);
726
727 pnp = (reg >> 3) & 0x01;
728 if (pnp) {
729 IRDA_DEBUG(2, "(), Chip is in PnP mode\n");
730 outb(0x46, cfg_base);
731 reg = (inb(cfg_base+1) & 0xfe) << 2;
732
733 outb(0x47, cfg_base);
734 reg |= ((inb(cfg_base+1) & 0xfc) << 8);
735
736 info->fir_base = reg;
737 } else {
738 /* Read function address register (FAR) */
739 outb(CFG_338_FAR, cfg_base);
740 reg = inb(cfg_base+1);
741
742 switch ((reg >> 4) & 0x03) {
743 case 0:
744 info->fir_base = 0x3f8;
745 break;
746 case 1:
747 info->fir_base = 0x2f8;
748 break;
749 case 2:
750 com = 3;
751 break;
752 case 3:
753 com = 4;
754 break;
755 }
756
757 if (com) {
758 switch ((reg >> 6) & 0x03) {
759 case 0:
760 if (com == 3)
761 info->fir_base = 0x3e8;
762 else
763 info->fir_base = 0x2e8;
764 break;
765 case 1:
766 if (com == 3)
767 info->fir_base = 0x338;
768 else
769 info->fir_base = 0x238;
770 break;
771 case 2:
772 if (com == 3)
773 info->fir_base = 0x2e8;
774 else
775 info->fir_base = 0x2e0;
776 break;
777 case 3:
778 if (com == 3)
779 info->fir_base = 0x220;
780 else
781 info->fir_base = 0x228;
782 break;
783 }
784 }
785 }
786 info->sir_base = info->fir_base;
787
788 /* Read PnP register 1 (PNP1) */
789 outb(CFG_338_PNP1, cfg_base);
790 reg = inb(cfg_base+1);
791
792 info->irq = reg >> 4;
793
794 /* Read PnP register 3 (PNP3) */
795 outb(CFG_338_PNP3, cfg_base);
796 reg = inb(cfg_base+1);
797
798 info->dma = (reg & 0x07) - 1;
799
800 /* Read power and test register (PTR) */
801 outb(CFG_338_PTR, cfg_base);
802 reg = inb(cfg_base+1);
803
804 info->suspended = reg & 0x01;
805
806 return 0;
807 }
808
809
810 /*
811 * Function nsc_ircc_init_39x (chip, info)
812 *
813 * Now that we know it's a '39x (see probe below), we need to
814 * configure it so we can use it.
815 *
816 * The NSC '338 chip is a Super I/O chip with a "bank" architecture,
817 * the configuration of the different functionality (serial, parallel,
818 * floppy...) are each in a different bank (Logical Device Number).
819 * The base address, irq and dma configuration registers are common
820 * to all functionalities (index 0x30 to 0x7F).
821 * There is only one configuration register specific to the
822 * serial port, CFG_39X_SPC.
823 * JeanII
824 *
825 * Note : this code was written by Jan Frey <janfrey@web.de>
826 */
827 static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info)
828 {
829 int cfg_base = info->cfg_base;
830 int enabled;
831
832 /* User is sure about his config... accept it. */
833 IRDA_DEBUG(2, "%s(): nsc_ircc_init_39x (user settings): "
834 "io=0x%04x, irq=%d, dma=%d\n",
835 __func__, info->fir_base, info->irq, info->dma);
836
837 /* Access bank for SP2 */
838 outb(CFG_39X_LDN, cfg_base);
839 outb(0x02, cfg_base+1);
840
841 /* Configure SP2 */
842
843 /* We want to enable the device if not enabled */
844 outb(CFG_39X_ACT, cfg_base);
845 enabled = inb(cfg_base+1) & 0x01;
846
847 if (!enabled) {
848 /* Enable the device */
849 outb(CFG_39X_SIOCF1, cfg_base);
850 outb(0x01, cfg_base+1);
851 /* May want to update info->enabled. Jean II */
852 }
853
854 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
855 * power mode (wake up from sleep mode) (bit 1) */
856 outb(CFG_39X_SPC, cfg_base);
857 outb(0x82, cfg_base+1);
858
859 return 0;
860 }
861
862 /*
863 * Function nsc_ircc_probe_39x (chip, info)
864 *
865 * Test if we really have a '39x chip at the given address
866 *
867 * Note : this code was written by Jan Frey <janfrey@web.de>
868 */
869 static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
870 {
871 int cfg_base = info->cfg_base;
872 int reg1, reg2, irq, irqt, dma1, dma2;
873 int enabled, susp;
874
875 IRDA_DEBUG(2, "%s(), nsc_ircc_probe_39x, base=%d\n",
876 __func__, cfg_base);
877
878 /* This function should be executed with irq off to avoid
879 * another driver messing with the Super I/O bank - Jean II */
880
881 /* Access bank for SP2 */
882 outb(CFG_39X_LDN, cfg_base);
883 outb(0x02, cfg_base+1);
884
885 /* Read infos about SP2 ; store in info struct */
886 outb(CFG_39X_BASEH, cfg_base);
887 reg1 = inb(cfg_base+1);
888 outb(CFG_39X_BASEL, cfg_base);
889 reg2 = inb(cfg_base+1);
890 info->fir_base = (reg1 << 8) | reg2;
891
892 outb(CFG_39X_IRQNUM, cfg_base);
893 irq = inb(cfg_base+1);
894 outb(CFG_39X_IRQSEL, cfg_base);
895 irqt = inb(cfg_base+1);
896 info->irq = irq;
897
898 outb(CFG_39X_DMA0, cfg_base);
899 dma1 = inb(cfg_base+1);
900 outb(CFG_39X_DMA1, cfg_base);
901 dma2 = inb(cfg_base+1);
902 info->dma = dma1 -1;
903
904 outb(CFG_39X_ACT, cfg_base);
905 info->enabled = enabled = inb(cfg_base+1) & 0x01;
906
907 outb(CFG_39X_SPC, cfg_base);
908 susp = 1 - ((inb(cfg_base+1) & 0x02) >> 1);
909
910 IRDA_DEBUG(2, "%s(): io=0x%02x%02x, irq=%d (type %d), rxdma=%d, txdma=%d, enabled=%d (suspended=%d)\n", __func__, reg1,reg2,irq,irqt,dma1,dma2,enabled,susp);
911
912 /* Configure SP2 */
913
914 /* We want to enable the device if not enabled */
915 outb(CFG_39X_ACT, cfg_base);
916 enabled = inb(cfg_base+1) & 0x01;
917
918 if (!enabled) {
919 /* Enable the device */
920 outb(CFG_39X_SIOCF1, cfg_base);
921 outb(0x01, cfg_base+1);
922 /* May want to update info->enabled. Jean II */
923 }
924
925 /* Enable UART bank switching (bit 7) ; Sets the chip to normal
926 * power mode (wake up from sleep mode) (bit 1) */
927 outb(CFG_39X_SPC, cfg_base);
928 outb(0x82, cfg_base+1);
929
930 return 0;
931 }
932
933 #ifdef CONFIG_PNP
934 /* PNP probing */
935 static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
936 {
937 memset(&pnp_info, 0, sizeof(chipio_t));
938 pnp_info.irq = -1;
939 pnp_info.dma = -1;
940 pnp_succeeded = 1;
941
942 if (id->driver_data & NSC_FORCE_DONGLE_TYPE9)
943 dongle_id = 0x9;
944
945 /* There doesn't seem to be any way of getting the cfg_base.
946 * On my box, cfg_base is in the PnP descriptor of the
947 * motherboard. Oh well... Jean II */
948
949 if (pnp_port_valid(dev, 0) &&
950 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
951 pnp_info.fir_base = pnp_port_start(dev, 0);
952
953 if (pnp_irq_valid(dev, 0) &&
954 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
955 pnp_info.irq = pnp_irq(dev, 0);
956
957 if (pnp_dma_valid(dev, 0) &&
958 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
959 pnp_info.dma = pnp_dma(dev, 0);
960
961 IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
962 __func__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
963
964 if((pnp_info.fir_base == 0) ||
965 (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
966 /* Returning an error will disable the device. Yuck ! */
967 //return -EINVAL;
968 pnp_succeeded = 0;
969 }
970
971 return 0;
972 }
973 #endif
974
975 /*
976 * Function nsc_ircc_setup (info)
977 *
978 * Returns non-negative on success.
979 *
980 */
981 static int nsc_ircc_setup(chipio_t *info)
982 {
983 int version;
984 int iobase = info->fir_base;
985
986 /* Read the Module ID */
987 switch_bank(iobase, BANK3);
988 version = inb(iobase+MID);
989
990 IRDA_DEBUG(2, "%s() Driver %s Found chip version %02x\n",
991 __func__, driver_name, version);
992
993 /* Should be 0x2? */
994 if (0x20 != (version & 0xf0)) {
995 IRDA_ERROR("%s, Wrong chip version %02x\n",
996 driver_name, version);
997 return -1;
998 }
999
1000 /* Switch to advanced mode */
1001 switch_bank(iobase, BANK2);
1002 outb(ECR1_EXT_SL, iobase+ECR1);
1003 switch_bank(iobase, BANK0);
1004
1005 /* Set FIFO threshold to TX17, RX16, reset and enable FIFO's */
1006 switch_bank(iobase, BANK0);
1007 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1008
1009 outb(0x03, iobase+LCR); /* 8 bit word length */
1010 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/
1011
1012 /* Set FIFO size to 32 */
1013 switch_bank(iobase, BANK2);
1014 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1015
1016 /* IRCR2: FEND_MD is not set */
1017 switch_bank(iobase, BANK5);
1018 outb(0x02, iobase+4);
1019
1020 /* Make sure that some defaults are OK */
1021 switch_bank(iobase, BANK6);
1022 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */
1023 outb(0x0a, iobase+1); /* Set MIR pulse width */
1024 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */
1025 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */
1026
1027 /* Enable receive interrupts */
1028 switch_bank(iobase, BANK0);
1029 outb(IER_RXHDL_IE, iobase+IER);
1030
1031 return 0;
1032 }
1033
1034 /*
1035 * Function nsc_ircc_read_dongle_id (void)
1036 *
1037 * Try to read dongle indentification. This procedure needs to be executed
1038 * once after power-on/reset. It also needs to be used whenever you suspect
1039 * that the user may have plugged/unplugged the IrDA Dongle.
1040 */
1041 static int nsc_ircc_read_dongle_id (int iobase)
1042 {
1043 int dongle_id;
1044 __u8 bank;
1045
1046 bank = inb(iobase+BSR);
1047
1048 /* Select Bank 7 */
1049 switch_bank(iobase, BANK7);
1050
1051 /* IRCFG4: IRSL0_DS and IRSL21_DS are cleared */
1052 outb(0x00, iobase+7);
1053
1054 /* ID0, 1, and 2 are pulled up/down very slowly */
1055 udelay(50);
1056
1057 /* IRCFG1: read the ID bits */
1058 dongle_id = inb(iobase+4) & 0x0f;
1059
1060 #ifdef BROKEN_DONGLE_ID
1061 if (dongle_id == 0x0a)
1062 dongle_id = 0x09;
1063 #endif
1064 /* Go back to bank 0 before returning */
1065 switch_bank(iobase, BANK0);
1066
1067 outb(bank, iobase+BSR);
1068
1069 return dongle_id;
1070 }
1071
1072 /*
1073 * Function nsc_ircc_init_dongle_interface (iobase, dongle_id)
1074 *
1075 * This function initializes the dongle for the transceiver that is
1076 * used. This procedure needs to be executed once after
1077 * power-on/reset. It also needs to be used whenever you suspect that
1078 * the dongle is changed.
1079 */
1080 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id)
1081 {
1082 int bank;
1083
1084 /* Save current bank */
1085 bank = inb(iobase+BSR);
1086
1087 /* Select Bank 7 */
1088 switch_bank(iobase, BANK7);
1089
1090 /* IRCFG4: set according to dongle_id */
1091 switch (dongle_id) {
1092 case 0x00: /* same as */
1093 case 0x01: /* Differential serial interface */
1094 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1095 __func__, dongle_types[dongle_id]);
1096 break;
1097 case 0x02: /* same as */
1098 case 0x03: /* Reserved */
1099 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1100 __func__, dongle_types[dongle_id]);
1101 break;
1102 case 0x04: /* Sharp RY5HD01 */
1103 break;
1104 case 0x05: /* Reserved, but this is what the Thinkpad reports */
1105 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1106 __func__, dongle_types[dongle_id]);
1107 break;
1108 case 0x06: /* Single-ended serial interface */
1109 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1110 __func__, dongle_types[dongle_id]);
1111 break;
1112 case 0x07: /* Consumer-IR only */
1113 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1114 __func__, dongle_types[dongle_id]);
1115 break;
1116 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1117 IRDA_DEBUG(0, "%s(), %s\n",
1118 __func__, dongle_types[dongle_id]);
1119 break;
1120 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1121 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1122 break;
1123 case 0x0A: /* same as */
1124 case 0x0B: /* Reserved */
1125 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1126 __func__, dongle_types[dongle_id]);
1127 break;
1128 case 0x0C: /* same as */
1129 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1130 /*
1131 * Set irsl0 as input, irsl[1-2] as output, and separate
1132 * inputs are used for SIR and MIR/FIR
1133 */
1134 outb(0x48, iobase+7);
1135 break;
1136 case 0x0E: /* Supports SIR Mode only */
1137 outb(0x28, iobase+7); /* Set irsl[0-2] as output */
1138 break;
1139 case 0x0F: /* No dongle connected */
1140 IRDA_DEBUG(0, "%s(), %s\n",
1141 __func__, dongle_types[dongle_id]);
1142
1143 switch_bank(iobase, BANK0);
1144 outb(0x62, iobase+MCR);
1145 break;
1146 default:
1147 IRDA_DEBUG(0, "%s(), invalid dongle_id %#x",
1148 __func__, dongle_id);
1149 }
1150
1151 /* IRCFG1: IRSL1 and 2 are set to IrDA mode */
1152 outb(0x00, iobase+4);
1153
1154 /* Restore bank register */
1155 outb(bank, iobase+BSR);
1156
1157 } /* set_up_dongle_interface */
1158
1159 /*
1160 * Function nsc_ircc_change_dongle_speed (iobase, speed, dongle_id)
1161 *
1162 * Change speed of the attach dongle
1163 *
1164 */
1165 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id)
1166 {
1167 __u8 bank;
1168
1169 /* Save current bank */
1170 bank = inb(iobase+BSR);
1171
1172 /* Select Bank 7 */
1173 switch_bank(iobase, BANK7);
1174
1175 /* IRCFG1: set according to dongle_id */
1176 switch (dongle_id) {
1177 case 0x00: /* same as */
1178 case 0x01: /* Differential serial interface */
1179 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1180 __func__, dongle_types[dongle_id]);
1181 break;
1182 case 0x02: /* same as */
1183 case 0x03: /* Reserved */
1184 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1185 __func__, dongle_types[dongle_id]);
1186 break;
1187 case 0x04: /* Sharp RY5HD01 */
1188 break;
1189 case 0x05: /* Reserved */
1190 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1191 __func__, dongle_types[dongle_id]);
1192 break;
1193 case 0x06: /* Single-ended serial interface */
1194 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1195 __func__, dongle_types[dongle_id]);
1196 break;
1197 case 0x07: /* Consumer-IR only */
1198 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1199 __func__, dongle_types[dongle_id]);
1200 break;
1201 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
1202 IRDA_DEBUG(0, "%s(), %s\n",
1203 __func__, dongle_types[dongle_id]);
1204 outb(0x00, iobase+4);
1205 if (speed > 115200)
1206 outb(0x01, iobase+4);
1207 break;
1208 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
1209 outb(0x01, iobase+4);
1210
1211 if (speed == 4000000) {
1212 /* There was a cli() there, but we now are already
1213 * under spin_lock_irqsave() - JeanII */
1214 outb(0x81, iobase+4);
1215 outb(0x80, iobase+4);
1216 } else
1217 outb(0x00, iobase+4);
1218 break;
1219 case 0x0A: /* same as */
1220 case 0x0B: /* Reserved */
1221 IRDA_DEBUG(0, "%s(), %s not defined by irda yet\n",
1222 __func__, dongle_types[dongle_id]);
1223 break;
1224 case 0x0C: /* same as */
1225 case 0x0D: /* HP HSDL-1100/HSDL-2100 */
1226 break;
1227 case 0x0E: /* Supports SIR Mode only */
1228 break;
1229 case 0x0F: /* No dongle connected */
1230 IRDA_DEBUG(0, "%s(), %s is not for IrDA mode\n",
1231 __func__, dongle_types[dongle_id]);
1232
1233 switch_bank(iobase, BANK0);
1234 outb(0x62, iobase+MCR);
1235 break;
1236 default:
1237 IRDA_DEBUG(0, "%s(), invalid data_rate\n", __func__);
1238 }
1239 /* Restore bank register */
1240 outb(bank, iobase+BSR);
1241 }
1242
1243 /*
1244 * Function nsc_ircc_change_speed (self, baud)
1245 *
1246 * Change the speed of the device
1247 *
1248 * This function *must* be called with irq off and spin-lock.
1249 */
1250 static __u8 nsc_ircc_change_speed(struct nsc_ircc_cb *self, __u32 speed)
1251 {
1252 struct net_device *dev = self->netdev;
1253 __u8 mcr = MCR_SIR;
1254 int iobase;
1255 __u8 bank;
1256 __u8 ier; /* Interrupt enable register */
1257
1258 IRDA_DEBUG(2, "%s(), speed=%d\n", __func__, speed);
1259
1260 IRDA_ASSERT(self != NULL, return 0;);
1261
1262 iobase = self->io.fir_base;
1263
1264 /* Update accounting for new speed */
1265 self->io.speed = speed;
1266
1267 /* Save current bank */
1268 bank = inb(iobase+BSR);
1269
1270 /* Disable interrupts */
1271 switch_bank(iobase, BANK0);
1272 outb(0, iobase+IER);
1273
1274 /* Select Bank 2 */
1275 switch_bank(iobase, BANK2);
1276
1277 outb(0x00, iobase+BGDH);
1278 switch (speed) {
1279 case 9600: outb(0x0c, iobase+BGDL); break;
1280 case 19200: outb(0x06, iobase+BGDL); break;
1281 case 38400: outb(0x03, iobase+BGDL); break;
1282 case 57600: outb(0x02, iobase+BGDL); break;
1283 case 115200: outb(0x01, iobase+BGDL); break;
1284 case 576000:
1285 switch_bank(iobase, BANK5);
1286
1287 /* IRCR2: MDRS is set */
1288 outb(inb(iobase+4) | 0x04, iobase+4);
1289
1290 mcr = MCR_MIR;
1291 IRDA_DEBUG(0, "%s(), handling baud of 576000\n", __func__);
1292 break;
1293 case 1152000:
1294 mcr = MCR_MIR;
1295 IRDA_DEBUG(0, "%s(), handling baud of 1152000\n", __func__);
1296 break;
1297 case 4000000:
1298 mcr = MCR_FIR;
1299 IRDA_DEBUG(0, "%s(), handling baud of 4000000\n", __func__);
1300 break;
1301 default:
1302 mcr = MCR_FIR;
1303 IRDA_DEBUG(0, "%s(), unknown baud rate of %d\n",
1304 __func__, speed);
1305 break;
1306 }
1307
1308 /* Set appropriate speed mode */
1309 switch_bank(iobase, BANK0);
1310 outb(mcr | MCR_TX_DFR, iobase+MCR);
1311
1312 /* Give some hits to the transceiver */
1313 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
1314
1315 /* Set FIFO threshold to TX17, RX16 */
1316 switch_bank(iobase, BANK0);
1317 outb(0x00, iobase+FCR);
1318 outb(FCR_FIFO_EN, iobase+FCR);
1319 outb(FCR_RXTH| /* Set Rx FIFO threshold */
1320 FCR_TXTH| /* Set Tx FIFO threshold */
1321 FCR_TXSR| /* Reset Tx FIFO */
1322 FCR_RXSR| /* Reset Rx FIFO */
1323 FCR_FIFO_EN, /* Enable FIFOs */
1324 iobase+FCR);
1325
1326 /* Set FIFO size to 32 */
1327 switch_bank(iobase, BANK2);
1328 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2);
1329
1330 /* Enable some interrupts so we can receive frames */
1331 switch_bank(iobase, BANK0);
1332 if (speed > 115200) {
1333 /* Install FIR xmit handler */
1334 dev->netdev_ops = &nsc_ircc_fir_ops;
1335 ier = IER_SFIF_IE;
1336 nsc_ircc_dma_receive(self);
1337 } else {
1338 /* Install SIR xmit handler */
1339 dev->netdev_ops = &nsc_ircc_sir_ops;
1340 ier = IER_RXHDL_IE;
1341 }
1342 /* Set our current interrupt mask */
1343 outb(ier, iobase+IER);
1344
1345 /* Restore BSR */
1346 outb(bank, iobase+BSR);
1347
1348 /* Make sure interrupt handlers keep the proper interrupt mask */
1349 return(ier);
1350 }
1351
1352 /*
1353 * Function nsc_ircc_hard_xmit (skb, dev)
1354 *
1355 * Transmit the frame!
1356 *
1357 */
1358 static int nsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev)
1359 {
1360 struct nsc_ircc_cb *self;
1361 unsigned long flags;
1362 int iobase;
1363 __s32 speed;
1364 __u8 bank;
1365
1366 self = netdev_priv(dev);
1367
1368 IRDA_ASSERT(self != NULL, return 0;);
1369
1370 iobase = self->io.fir_base;
1371
1372 netif_stop_queue(dev);
1373
1374 /* Make sure tests *& speed change are atomic */
1375 spin_lock_irqsave(&self->lock, flags);
1376
1377 /* Check if we need to change the speed */
1378 speed = irda_get_next_speed(skb);
1379 if ((speed != self->io.speed) && (speed != -1)) {
1380 /* Check for empty frame. */
1381 if (!skb->len) {
1382 /* If we just sent a frame, we get called before
1383 * the last bytes get out (because of the SIR FIFO).
1384 * If this is the case, let interrupt handler change
1385 * the speed itself... Jean II */
1386 if (self->io.direction == IO_RECV) {
1387 nsc_ircc_change_speed(self, speed);
1388 /* TODO : For SIR->SIR, the next packet
1389 * may get corrupted - Jean II */
1390 netif_wake_queue(dev);
1391 } else {
1392 self->new_speed = speed;
1393 /* Queue will be restarted after speed change
1394 * to make sure packets gets through the
1395 * proper xmit handler - Jean II */
1396 }
1397 dev->trans_start = jiffies;
1398 spin_unlock_irqrestore(&self->lock, flags);
1399 dev_kfree_skb(skb);
1400 return 0;
1401 } else
1402 self->new_speed = speed;
1403 }
1404
1405 /* Save current bank */
1406 bank = inb(iobase+BSR);
1407
1408 self->tx_buff.data = self->tx_buff.head;
1409
1410 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
1411 self->tx_buff.truesize);
1412
1413 dev->stats.tx_bytes += self->tx_buff.len;
1414
1415 /* Add interrupt on tx low level (will fire immediately) */
1416 switch_bank(iobase, BANK0);
1417 outb(IER_TXLDL_IE, iobase+IER);
1418
1419 /* Restore bank register */
1420 outb(bank, iobase+BSR);
1421
1422 dev->trans_start = jiffies;
1423 spin_unlock_irqrestore(&self->lock, flags);
1424
1425 dev_kfree_skb(skb);
1426
1427 return 0;
1428 }
1429
1430 static int nsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev)
1431 {
1432 struct nsc_ircc_cb *self;
1433 unsigned long flags;
1434 int iobase;
1435 __s32 speed;
1436 __u8 bank;
1437 int mtt, diff;
1438
1439 self = netdev_priv(dev);
1440 iobase = self->io.fir_base;
1441
1442 netif_stop_queue(dev);
1443
1444 /* Make sure tests *& speed change are atomic */
1445 spin_lock_irqsave(&self->lock, flags);
1446
1447 /* Check if we need to change the speed */
1448 speed = irda_get_next_speed(skb);
1449 if ((speed != self->io.speed) && (speed != -1)) {
1450 /* Check for empty frame. */
1451 if (!skb->len) {
1452 /* If we are currently transmitting, defer to
1453 * interrupt handler. - Jean II */
1454 if(self->tx_fifo.len == 0) {
1455 nsc_ircc_change_speed(self, speed);
1456 netif_wake_queue(dev);
1457 } else {
1458 self->new_speed = speed;
1459 /* Keep queue stopped :
1460 * the speed change operation may change the
1461 * xmit handler, and we want to make sure
1462 * the next packet get through the proper
1463 * Tx path, so block the Tx queue until
1464 * the speed change has been done.
1465 * Jean II */
1466 }
1467 dev->trans_start = jiffies;
1468 spin_unlock_irqrestore(&self->lock, flags);
1469 dev_kfree_skb(skb);
1470 return 0;
1471 } else {
1472 /* Change speed after current frame */
1473 self->new_speed = speed;
1474 }
1475 }
1476
1477 /* Save current bank */
1478 bank = inb(iobase+BSR);
1479
1480 /* Register and copy this frame to DMA memory */
1481 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1482 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1483 self->tx_fifo.tail += skb->len;
1484
1485 dev->stats.tx_bytes += skb->len;
1486
1487 skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1488 skb->len);
1489 self->tx_fifo.len++;
1490 self->tx_fifo.free++;
1491
1492 /* Start transmit only if there is currently no transmit going on */
1493 if (self->tx_fifo.len == 1) {
1494 /* Check if we must wait the min turn time or not */
1495 mtt = irda_get_mtt(skb);
1496 if (mtt) {
1497 /* Check how much time we have used already */
1498 do_gettimeofday(&self->now);
1499 diff = self->now.tv_usec - self->stamp.tv_usec;
1500 if (diff < 0)
1501 diff += 1000000;
1502
1503 /* Check if the mtt is larger than the time we have
1504 * already used by all the protocol processing
1505 */
1506 if (mtt > diff) {
1507 mtt -= diff;
1508
1509 /*
1510 * Use timer if delay larger than 125 us, and
1511 * use udelay for smaller values which should
1512 * be acceptable
1513 */
1514 if (mtt > 125) {
1515 /* Adjust for timer resolution */
1516 mtt = mtt / 125;
1517
1518 /* Setup timer */
1519 switch_bank(iobase, BANK4);
1520 outb(mtt & 0xff, iobase+TMRL);
1521 outb((mtt >> 8) & 0x0f, iobase+TMRH);
1522
1523 /* Start timer */
1524 outb(IRCR1_TMR_EN, iobase+IRCR1);
1525 self->io.direction = IO_XMIT;
1526
1527 /* Enable timer interrupt */
1528 switch_bank(iobase, BANK0);
1529 outb(IER_TMR_IE, iobase+IER);
1530
1531 /* Timer will take care of the rest */
1532 goto out;
1533 } else
1534 udelay(mtt);
1535 }
1536 }
1537 /* Enable DMA interrupt */
1538 switch_bank(iobase, BANK0);
1539 outb(IER_DMA_IE, iobase+IER);
1540
1541 /* Transmit frame */
1542 nsc_ircc_dma_xmit(self, iobase);
1543 }
1544 out:
1545 /* Not busy transmitting anymore if window is not full,
1546 * and if we don't need to change speed */
1547 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0))
1548 netif_wake_queue(self->netdev);
1549
1550 /* Restore bank register */
1551 outb(bank, iobase+BSR);
1552
1553 dev->trans_start = jiffies;
1554 spin_unlock_irqrestore(&self->lock, flags);
1555 dev_kfree_skb(skb);
1556
1557 return 0;
1558 }
1559
1560 /*
1561 * Function nsc_ircc_dma_xmit (self, iobase)
1562 *
1563 * Transmit data using DMA
1564 *
1565 */
1566 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase)
1567 {
1568 int bsr;
1569
1570 /* Save current bank */
1571 bsr = inb(iobase+BSR);
1572
1573 /* Disable DMA */
1574 switch_bank(iobase, BANK0);
1575 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1576
1577 self->io.direction = IO_XMIT;
1578
1579 /* Choose transmit DMA channel */
1580 switch_bank(iobase, BANK2);
1581 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1582
1583 irda_setup_dma(self->io.dma,
1584 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1585 self->tx_buff.head) + self->tx_buff_dma,
1586 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1587 DMA_TX_MODE);
1588
1589 /* Enable DMA and SIR interaction pulse */
1590 switch_bank(iobase, BANK0);
1591 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR);
1592
1593 /* Restore bank register */
1594 outb(bsr, iobase+BSR);
1595 }
1596
1597 /*
1598 * Function nsc_ircc_pio_xmit (self, iobase)
1599 *
1600 * Transmit data using PIO. Returns the number of bytes that actually
1601 * got transferred
1602 *
1603 */
1604 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size)
1605 {
1606 int actual = 0;
1607 __u8 bank;
1608
1609 IRDA_DEBUG(4, "%s()\n", __func__);
1610
1611 /* Save current bank */
1612 bank = inb(iobase+BSR);
1613
1614 switch_bank(iobase, BANK0);
1615 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) {
1616 IRDA_DEBUG(4, "%s(), warning, FIFO not empty yet!\n",
1617 __func__);
1618
1619 /* FIFO may still be filled to the Tx interrupt threshold */
1620 fifo_size -= 17;
1621 }
1622
1623 /* Fill FIFO with current frame */
1624 while ((fifo_size-- > 0) && (actual < len)) {
1625 /* Transmit next byte */
1626 outb(buf[actual++], iobase+TXD);
1627 }
1628
1629 IRDA_DEBUG(4, "%s(), fifo_size %d ; %d sent of %d\n",
1630 __func__, fifo_size, actual, len);
1631
1632 /* Restore bank */
1633 outb(bank, iobase+BSR);
1634
1635 return actual;
1636 }
1637
1638 /*
1639 * Function nsc_ircc_dma_xmit_complete (self)
1640 *
1641 * The transfer of a frame in finished. This function will only be called
1642 * by the interrupt handler
1643 *
1644 */
1645 static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
1646 {
1647 int iobase;
1648 __u8 bank;
1649 int ret = TRUE;
1650
1651 IRDA_DEBUG(2, "%s()\n", __func__);
1652
1653 iobase = self->io.fir_base;
1654
1655 /* Save current bank */
1656 bank = inb(iobase+BSR);
1657
1658 /* Disable DMA */
1659 switch_bank(iobase, BANK0);
1660 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1661
1662 /* Check for underrrun! */
1663 if (inb(iobase+ASCR) & ASCR_TXUR) {
1664 self->netdev->stats.tx_errors++;
1665 self->netdev->stats.tx_fifo_errors++;
1666
1667 /* Clear bit, by writing 1 into it */
1668 outb(ASCR_TXUR, iobase+ASCR);
1669 } else {
1670 self->netdev->stats.tx_packets++;
1671 }
1672
1673 /* Finished with this frame, so prepare for next */
1674 self->tx_fifo.ptr++;
1675 self->tx_fifo.len--;
1676
1677 /* Any frames to be sent back-to-back? */
1678 if (self->tx_fifo.len) {
1679 nsc_ircc_dma_xmit(self, iobase);
1680
1681 /* Not finished yet! */
1682 ret = FALSE;
1683 } else {
1684 /* Reset Tx FIFO info */
1685 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1686 self->tx_fifo.tail = self->tx_buff.head;
1687 }
1688
1689 /* Make sure we have room for more frames and
1690 * that we don't need to change speed */
1691 if ((self->tx_fifo.free < MAX_TX_WINDOW) && (self->new_speed == 0)) {
1692 /* Not busy transmitting anymore */
1693 /* Tell the network layer, that we can accept more frames */
1694 netif_wake_queue(self->netdev);
1695 }
1696
1697 /* Restore bank */
1698 outb(bank, iobase+BSR);
1699
1700 return ret;
1701 }
1702
1703 /*
1704 * Function nsc_ircc_dma_receive (self)
1705 *
1706 * Get ready for receiving a frame. The device will initiate a DMA
1707 * if it starts to receive a frame.
1708 *
1709 */
1710 static int nsc_ircc_dma_receive(struct nsc_ircc_cb *self)
1711 {
1712 int iobase;
1713 __u8 bsr;
1714
1715 iobase = self->io.fir_base;
1716
1717 /* Reset Tx FIFO info */
1718 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1719 self->tx_fifo.tail = self->tx_buff.head;
1720
1721 /* Save current bank */
1722 bsr = inb(iobase+BSR);
1723
1724 /* Disable DMA */
1725 switch_bank(iobase, BANK0);
1726 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
1727
1728 /* Choose DMA Rx, DMA Fairness, and Advanced mode */
1729 switch_bank(iobase, BANK2);
1730 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1);
1731
1732 self->io.direction = IO_RECV;
1733 self->rx_buff.data = self->rx_buff.head;
1734
1735 /* Reset Rx FIFO. This will also flush the ST_FIFO */
1736 switch_bank(iobase, BANK0);
1737 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR);
1738
1739 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1740 self->st_fifo.tail = self->st_fifo.head = 0;
1741
1742 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1743 DMA_RX_MODE);
1744
1745 /* Enable DMA */
1746 switch_bank(iobase, BANK0);
1747 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR);
1748
1749 /* Restore bank register */
1750 outb(bsr, iobase+BSR);
1751
1752 return 0;
1753 }
1754
1755 /*
1756 * Function nsc_ircc_dma_receive_complete (self)
1757 *
1758 * Finished with receiving frames
1759 *
1760 *
1761 */
1762 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase)
1763 {
1764 struct st_fifo *st_fifo;
1765 struct sk_buff *skb;
1766 __u8 status;
1767 __u8 bank;
1768 int len;
1769
1770 st_fifo = &self->st_fifo;
1771
1772 /* Save current bank */
1773 bank = inb(iobase+BSR);
1774
1775 /* Read all entries in status FIFO */
1776 switch_bank(iobase, BANK5);
1777 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) {
1778 /* We must empty the status FIFO no matter what */
1779 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8);
1780
1781 if (st_fifo->tail >= MAX_RX_WINDOW) {
1782 IRDA_DEBUG(0, "%s(), window is full!\n", __func__);
1783 continue;
1784 }
1785
1786 st_fifo->entries[st_fifo->tail].status = status;
1787 st_fifo->entries[st_fifo->tail].len = len;
1788 st_fifo->pending_bytes += len;
1789 st_fifo->tail++;
1790 st_fifo->len++;
1791 }
1792 /* Try to process all entries in status FIFO */
1793 while (st_fifo->len > 0) {
1794 /* Get first entry */
1795 status = st_fifo->entries[st_fifo->head].status;
1796 len = st_fifo->entries[st_fifo->head].len;
1797 st_fifo->pending_bytes -= len;
1798 st_fifo->head++;
1799 st_fifo->len--;
1800
1801 /* Check for errors */
1802 if (status & FRM_ST_ERR_MSK) {
1803 if (status & FRM_ST_LOST_FR) {
1804 /* Add number of lost frames to stats */
1805 self->netdev->stats.rx_errors += len;
1806 } else {
1807 /* Skip frame */
1808 self->netdev->stats.rx_errors++;
1809
1810 self->rx_buff.data += len;
1811
1812 if (status & FRM_ST_MAX_LEN)
1813 self->netdev->stats.rx_length_errors++;
1814
1815 if (status & FRM_ST_PHY_ERR)
1816 self->netdev->stats.rx_frame_errors++;
1817
1818 if (status & FRM_ST_BAD_CRC)
1819 self->netdev->stats.rx_crc_errors++;
1820 }
1821 /* The errors below can be reported in both cases */
1822 if (status & FRM_ST_OVR1)
1823 self->netdev->stats.rx_fifo_errors++;
1824
1825 if (status & FRM_ST_OVR2)
1826 self->netdev->stats.rx_fifo_errors++;
1827 } else {
1828 /*
1829 * First we must make sure that the frame we
1830 * want to deliver is all in main memory. If we
1831 * cannot tell, then we check if the Rx FIFO is
1832 * empty. If not then we will have to take a nap
1833 * and try again later.
1834 */
1835 if (st_fifo->pending_bytes < self->io.fifo_size) {
1836 switch_bank(iobase, BANK0);
1837 if (inb(iobase+LSR) & LSR_RXDA) {
1838 /* Put this entry back in fifo */
1839 st_fifo->head--;
1840 st_fifo->len++;
1841 st_fifo->pending_bytes += len;
1842 st_fifo->entries[st_fifo->head].status = status;
1843 st_fifo->entries[st_fifo->head].len = len;
1844 /*
1845 * DMA not finished yet, so try again
1846 * later, set timer value, resolution
1847 * 125 us
1848 */
1849 switch_bank(iobase, BANK4);
1850 outb(0x02, iobase+TMRL); /* x 125 us */
1851 outb(0x00, iobase+TMRH);
1852
1853 /* Start timer */
1854 outb(IRCR1_TMR_EN, iobase+IRCR1);
1855
1856 /* Restore bank register */
1857 outb(bank, iobase+BSR);
1858
1859 return FALSE; /* I'll be back! */
1860 }
1861 }
1862
1863 /*
1864 * Remember the time we received this frame, so we can
1865 * reduce the min turn time a bit since we will know
1866 * how much time we have used for protocol processing
1867 */
1868 do_gettimeofday(&self->stamp);
1869
1870 skb = dev_alloc_skb(len+1);
1871 if (skb == NULL) {
1872 IRDA_WARNING("%s(), memory squeeze, "
1873 "dropping frame.\n",
1874 __func__);
1875 self->netdev->stats.rx_dropped++;
1876
1877 /* Restore bank register */
1878 outb(bank, iobase+BSR);
1879
1880 return FALSE;
1881 }
1882
1883 /* Make sure IP header gets aligned */
1884 skb_reserve(skb, 1);
1885
1886 /* Copy frame without CRC */
1887 if (self->io.speed < 4000000) {
1888 skb_put(skb, len-2);
1889 skb_copy_to_linear_data(skb,
1890 self->rx_buff.data,
1891 len - 2);
1892 } else {
1893 skb_put(skb, len-4);
1894 skb_copy_to_linear_data(skb,
1895 self->rx_buff.data,
1896 len - 4);
1897 }
1898
1899 /* Move to next frame */
1900 self->rx_buff.data += len;
1901 self->netdev->stats.rx_bytes += len;
1902 self->netdev->stats.rx_packets++;
1903
1904 skb->dev = self->netdev;
1905 skb_reset_mac_header(skb);
1906 skb->protocol = htons(ETH_P_IRDA);
1907 netif_rx(skb);
1908 }
1909 }
1910 /* Restore bank register */
1911 outb(bank, iobase+BSR);
1912
1913 return TRUE;
1914 }
1915
1916 /*
1917 * Function nsc_ircc_pio_receive (self)
1918 *
1919 * Receive all data in receiver FIFO
1920 *
1921 */
1922 static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self)
1923 {
1924 __u8 byte;
1925 int iobase;
1926
1927 iobase = self->io.fir_base;
1928
1929 /* Receive all characters in Rx FIFO */
1930 do {
1931 byte = inb(iobase+RXD);
1932 async_unwrap_char(self->netdev, &self->netdev->stats,
1933 &self->rx_buff, byte);
1934 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */
1935 }
1936
1937 /*
1938 * Function nsc_ircc_sir_interrupt (self, eir)
1939 *
1940 * Handle SIR interrupt
1941 *
1942 */
1943 static void nsc_ircc_sir_interrupt(struct nsc_ircc_cb *self, int eir)
1944 {
1945 int actual;
1946
1947 /* Check if transmit FIFO is low on data */
1948 if (eir & EIR_TXLDL_EV) {
1949 /* Write data left in transmit buffer */
1950 actual = nsc_ircc_pio_write(self->io.fir_base,
1951 self->tx_buff.data,
1952 self->tx_buff.len,
1953 self->io.fifo_size);
1954 self->tx_buff.data += actual;
1955 self->tx_buff.len -= actual;
1956
1957 self->io.direction = IO_XMIT;
1958
1959 /* Check if finished */
1960 if (self->tx_buff.len > 0)
1961 self->ier = IER_TXLDL_IE;
1962 else {
1963
1964 self->netdev->stats.tx_packets++;
1965 netif_wake_queue(self->netdev);
1966 self->ier = IER_TXEMP_IE;
1967 }
1968
1969 }
1970 /* Check if transmission has completed */
1971 if (eir & EIR_TXEMP_EV) {
1972 /* Turn around and get ready to receive some data */
1973 self->io.direction = IO_RECV;
1974 self->ier = IER_RXHDL_IE;
1975 /* Check if we need to change the speed?
1976 * Need to be after self->io.direction to avoid race with
1977 * nsc_ircc_hard_xmit_sir() - Jean II */
1978 if (self->new_speed) {
1979 IRDA_DEBUG(2, "%s(), Changing speed!\n", __func__);
1980 self->ier = nsc_ircc_change_speed(self,
1981 self->new_speed);
1982 self->new_speed = 0;
1983 netif_wake_queue(self->netdev);
1984
1985 /* Check if we are going to FIR */
1986 if (self->io.speed > 115200) {
1987 /* No need to do anymore SIR stuff */
1988 return;
1989 }
1990 }
1991 }
1992
1993 /* Rx FIFO threshold or timeout */
1994 if (eir & EIR_RXHDL_EV) {
1995 nsc_ircc_pio_receive(self);
1996
1997 /* Keep receiving */
1998 self->ier = IER_RXHDL_IE;
1999 }
2000 }
2001
2002 /*
2003 * Function nsc_ircc_fir_interrupt (self, eir)
2004 *
2005 * Handle MIR/FIR interrupt
2006 *
2007 */
2008 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase,
2009 int eir)
2010 {
2011 __u8 bank;
2012
2013 bank = inb(iobase+BSR);
2014
2015 /* Status FIFO event*/
2016 if (eir & EIR_SFIF_EV) {
2017 /* Check if DMA has finished */
2018 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2019 /* Wait for next status FIFO interrupt */
2020 self->ier = IER_SFIF_IE;
2021 } else {
2022 self->ier = IER_SFIF_IE | IER_TMR_IE;
2023 }
2024 } else if (eir & EIR_TMR_EV) { /* Timer finished */
2025 /* Disable timer */
2026 switch_bank(iobase, BANK4);
2027 outb(0, iobase+IRCR1);
2028
2029 /* Clear timer event */
2030 switch_bank(iobase, BANK0);
2031 outb(ASCR_CTE, iobase+ASCR);
2032
2033 /* Check if this is a Tx timer interrupt */
2034 if (self->io.direction == IO_XMIT) {
2035 nsc_ircc_dma_xmit(self, iobase);
2036
2037 /* Interrupt on DMA */
2038 self->ier = IER_DMA_IE;
2039 } else {
2040 /* Check (again) if DMA has finished */
2041 if (nsc_ircc_dma_receive_complete(self, iobase)) {
2042 self->ier = IER_SFIF_IE;
2043 } else {
2044 self->ier = IER_SFIF_IE | IER_TMR_IE;
2045 }
2046 }
2047 } else if (eir & EIR_DMA_EV) {
2048 /* Finished with all transmissions? */
2049 if (nsc_ircc_dma_xmit_complete(self)) {
2050 if(self->new_speed != 0) {
2051 /* As we stop the Tx queue, the speed change
2052 * need to be done when the Tx fifo is
2053 * empty. Ask for a Tx done interrupt */
2054 self->ier = IER_TXEMP_IE;
2055 } else {
2056 /* Check if there are more frames to be
2057 * transmitted */
2058 if (irda_device_txqueue_empty(self->netdev)) {
2059 /* Prepare for receive */
2060 nsc_ircc_dma_receive(self);
2061 self->ier = IER_SFIF_IE;
2062 } else
2063 IRDA_WARNING("%s(), potential "
2064 "Tx queue lockup !\n",
2065 __func__);
2066 }
2067 } else {
2068 /* Not finished yet, so interrupt on DMA again */
2069 self->ier = IER_DMA_IE;
2070 }
2071 } else if (eir & EIR_TXEMP_EV) {
2072 /* The Tx FIFO has totally drained out, so now we can change
2073 * the speed... - Jean II */
2074 self->ier = nsc_ircc_change_speed(self, self->new_speed);
2075 self->new_speed = 0;
2076 netif_wake_queue(self->netdev);
2077 /* Note : nsc_ircc_change_speed() restarted Rx fifo */
2078 }
2079
2080 outb(bank, iobase+BSR);
2081 }
2082
2083 /*
2084 * Function nsc_ircc_interrupt (irq, dev_id, regs)
2085 *
2086 * An interrupt from the chip has arrived. Time to do some work
2087 *
2088 */
2089 static irqreturn_t nsc_ircc_interrupt(int irq, void *dev_id)
2090 {
2091 struct net_device *dev = dev_id;
2092 struct nsc_ircc_cb *self;
2093 __u8 bsr, eir;
2094 int iobase;
2095
2096 self = netdev_priv(dev);
2097
2098 spin_lock(&self->lock);
2099
2100 iobase = self->io.fir_base;
2101
2102 bsr = inb(iobase+BSR); /* Save current bank */
2103
2104 switch_bank(iobase, BANK0);
2105 self->ier = inb(iobase+IER);
2106 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */
2107
2108 outb(0, iobase+IER); /* Disable interrupts */
2109
2110 if (eir) {
2111 /* Dispatch interrupt handler for the current speed */
2112 if (self->io.speed > 115200)
2113 nsc_ircc_fir_interrupt(self, iobase, eir);
2114 else
2115 nsc_ircc_sir_interrupt(self, eir);
2116 }
2117
2118 outb(self->ier, iobase+IER); /* Restore interrupts */
2119 outb(bsr, iobase+BSR); /* Restore bank register */
2120
2121 spin_unlock(&self->lock);
2122 return IRQ_RETVAL(eir);
2123 }
2124
2125 /*
2126 * Function nsc_ircc_is_receiving (self)
2127 *
2128 * Return TRUE is we are currently receiving a frame
2129 *
2130 */
2131 static int nsc_ircc_is_receiving(struct nsc_ircc_cb *self)
2132 {
2133 unsigned long flags;
2134 int status = FALSE;
2135 int iobase;
2136 __u8 bank;
2137
2138 IRDA_ASSERT(self != NULL, return FALSE;);
2139
2140 spin_lock_irqsave(&self->lock, flags);
2141
2142 if (self->io.speed > 115200) {
2143 iobase = self->io.fir_base;
2144
2145 /* Check if rx FIFO is not empty */
2146 bank = inb(iobase+BSR);
2147 switch_bank(iobase, BANK2);
2148 if ((inb(iobase+RXFLV) & 0x3f) != 0) {
2149 /* We are receiving something */
2150 status = TRUE;
2151 }
2152 outb(bank, iobase+BSR);
2153 } else
2154 status = (self->rx_buff.state != OUTSIDE_FRAME);
2155
2156 spin_unlock_irqrestore(&self->lock, flags);
2157
2158 return status;
2159 }
2160
2161 /*
2162 * Function nsc_ircc_net_open (dev)
2163 *
2164 * Start the device
2165 *
2166 */
2167 static int nsc_ircc_net_open(struct net_device *dev)
2168 {
2169 struct nsc_ircc_cb *self;
2170 int iobase;
2171 char hwname[32];
2172 __u8 bank;
2173
2174 IRDA_DEBUG(4, "%s()\n", __func__);
2175
2176 IRDA_ASSERT(dev != NULL, return -1;);
2177 self = netdev_priv(dev);
2178
2179 IRDA_ASSERT(self != NULL, return 0;);
2180
2181 iobase = self->io.fir_base;
2182
2183 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0, dev->name, dev)) {
2184 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2185 driver_name, self->io.irq);
2186 return -EAGAIN;
2187 }
2188 /*
2189 * Always allocate the DMA channel after the IRQ, and clean up on
2190 * failure.
2191 */
2192 if (request_dma(self->io.dma, dev->name)) {
2193 IRDA_WARNING("%s, unable to allocate dma=%d\n",
2194 driver_name, self->io.dma);
2195 free_irq(self->io.irq, dev);
2196 return -EAGAIN;
2197 }
2198
2199 /* Save current bank */
2200 bank = inb(iobase+BSR);
2201
2202 /* turn on interrupts */
2203 switch_bank(iobase, BANK0);
2204 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER);
2205
2206 /* Restore bank register */
2207 outb(bank, iobase+BSR);
2208
2209 /* Ready to play! */
2210 netif_start_queue(dev);
2211
2212 /* Give self a hardware name */
2213 sprintf(hwname, "NSC-FIR @ 0x%03x", self->io.fir_base);
2214
2215 /*
2216 * Open new IrLAP layer instance, now that everything should be
2217 * initialized properly
2218 */
2219 self->irlap = irlap_open(dev, &self->qos, hwname);
2220
2221 return 0;
2222 }
2223
2224 /*
2225 * Function nsc_ircc_net_close (dev)
2226 *
2227 * Stop the device
2228 *
2229 */
2230 static int nsc_ircc_net_close(struct net_device *dev)
2231 {
2232 struct nsc_ircc_cb *self;
2233 int iobase;
2234 __u8 bank;
2235
2236 IRDA_DEBUG(4, "%s()\n", __func__);
2237
2238 IRDA_ASSERT(dev != NULL, return -1;);
2239
2240 self = netdev_priv(dev);
2241 IRDA_ASSERT(self != NULL, return 0;);
2242
2243 /* Stop device */
2244 netif_stop_queue(dev);
2245
2246 /* Stop and remove instance of IrLAP */
2247 if (self->irlap)
2248 irlap_close(self->irlap);
2249 self->irlap = NULL;
2250
2251 iobase = self->io.fir_base;
2252
2253 disable_dma(self->io.dma);
2254
2255 /* Save current bank */
2256 bank = inb(iobase+BSR);
2257
2258 /* Disable interrupts */
2259 switch_bank(iobase, BANK0);
2260 outb(0, iobase+IER);
2261
2262 free_irq(self->io.irq, dev);
2263 free_dma(self->io.dma);
2264
2265 /* Restore bank register */
2266 outb(bank, iobase+BSR);
2267
2268 return 0;
2269 }
2270
2271 /*
2272 * Function nsc_ircc_net_ioctl (dev, rq, cmd)
2273 *
2274 * Process IOCTL commands for this device
2275 *
2276 */
2277 static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2278 {
2279 struct if_irda_req *irq = (struct if_irda_req *) rq;
2280 struct nsc_ircc_cb *self;
2281 unsigned long flags;
2282 int ret = 0;
2283
2284 IRDA_ASSERT(dev != NULL, return -1;);
2285
2286 self = netdev_priv(dev);
2287
2288 IRDA_ASSERT(self != NULL, return -1;);
2289
2290 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name, cmd);
2291
2292 switch (cmd) {
2293 case SIOCSBANDWIDTH: /* Set bandwidth */
2294 if (!capable(CAP_NET_ADMIN)) {
2295 ret = -EPERM;
2296 break;
2297 }
2298 spin_lock_irqsave(&self->lock, flags);
2299 nsc_ircc_change_speed(self, irq->ifr_baudrate);
2300 spin_unlock_irqrestore(&self->lock, flags);
2301 break;
2302 case SIOCSMEDIABUSY: /* Set media busy */
2303 if (!capable(CAP_NET_ADMIN)) {
2304 ret = -EPERM;
2305 break;
2306 }
2307 irda_device_set_media_busy(self->netdev, TRUE);
2308 break;
2309 case SIOCGRECEIVING: /* Check if we are receiving right now */
2310 /* This is already protected */
2311 irq->ifr_receiving = nsc_ircc_is_receiving(self);
2312 break;
2313 default:
2314 ret = -EOPNOTSUPP;
2315 }
2316 return ret;
2317 }
2318
2319 static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
2320 {
2321 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2322 int bank;
2323 unsigned long flags;
2324 int iobase = self->io.fir_base;
2325
2326 if (self->io.suspended)
2327 return 0;
2328
2329 IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
2330
2331 rtnl_lock();
2332 if (netif_running(self->netdev)) {
2333 netif_device_detach(self->netdev);
2334 spin_lock_irqsave(&self->lock, flags);
2335 /* Save current bank */
2336 bank = inb(iobase+BSR);
2337
2338 /* Disable interrupts */
2339 switch_bank(iobase, BANK0);
2340 outb(0, iobase+IER);
2341
2342 /* Restore bank register */
2343 outb(bank, iobase+BSR);
2344
2345 spin_unlock_irqrestore(&self->lock, flags);
2346 free_irq(self->io.irq, self->netdev);
2347 disable_dma(self->io.dma);
2348 }
2349 self->io.suspended = 1;
2350 rtnl_unlock();
2351
2352 return 0;
2353 }
2354
2355 static int nsc_ircc_resume(struct platform_device *dev)
2356 {
2357 struct nsc_ircc_cb *self = platform_get_drvdata(dev);
2358 unsigned long flags;
2359
2360 if (!self->io.suspended)
2361 return 0;
2362
2363 IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
2364
2365 rtnl_lock();
2366 nsc_ircc_setup(&self->io);
2367 nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
2368
2369 if (netif_running(self->netdev)) {
2370 if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
2371 self->netdev->name, self->netdev)) {
2372 IRDA_WARNING("%s, unable to allocate irq=%d\n",
2373 driver_name, self->io.irq);
2374
2375 /*
2376 * Don't fail resume process, just kill this
2377 * network interface
2378 */
2379 unregister_netdevice(self->netdev);
2380 } else {
2381 spin_lock_irqsave(&self->lock, flags);
2382 nsc_ircc_change_speed(self, self->io.speed);
2383 spin_unlock_irqrestore(&self->lock, flags);
2384 netif_device_attach(self->netdev);
2385 }
2386
2387 } else {
2388 spin_lock_irqsave(&self->lock, flags);
2389 nsc_ircc_change_speed(self, 9600);
2390 spin_unlock_irqrestore(&self->lock, flags);
2391 }
2392 self->io.suspended = 0;
2393 rtnl_unlock();
2394
2395 return 0;
2396 }
2397
2398 MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
2399 MODULE_DESCRIPTION("NSC IrDA Device Driver");
2400 MODULE_LICENSE("GPL");
2401
2402
2403 module_param(qos_mtt_bits, int, 0);
2404 MODULE_PARM_DESC(qos_mtt_bits, "Minimum Turn Time");
2405 module_param_array(io, int, NULL, 0);
2406 MODULE_PARM_DESC(io, "Base I/O addresses");
2407 module_param_array(irq, int, NULL, 0);
2408 MODULE_PARM_DESC(irq, "IRQ lines");
2409 module_param_array(dma, int, NULL, 0);
2410 MODULE_PARM_DESC(dma, "DMA channels");
2411 module_param(dongle_id, int, 0);
2412 MODULE_PARM_DESC(dongle_id, "Type-id of used dongle");
2413
2414 module_init(nsc_ircc_init);
2415 module_exit(nsc_ircc_cleanup);
2416
Linux with added FPC-III support