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x86, UV: Fix for nodes with memory and no cpus
[linux/fpc-iii.git] / drivers / net / netxen / netxen_nic_ctx.c
blob9234473bc08a752bfb06a45d740e30d198e9f091
1 /*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
28 *
29 */
30
31 #include "netxen_nic_hw.h"
32 #include "netxen_nic.h"
33 #include "netxen_nic_phan_reg.h"
34
35 #define NXHAL_VERSION 1
36
37 static int
38 netxen_api_lock(struct netxen_adapter *adapter)
39 {
40 u32 done = 0, timeout = 0;
41
42 for (;;) {
43 /* Acquire PCIE HW semaphore5 */
44 netxen_nic_read_w0(adapter,
45 NETXEN_PCIE_REG(PCIE_SEM5_LOCK), &done);
46
47 if (done == 1)
48 break;
49
50 if (++timeout >= NX_OS_CRB_RETRY_COUNT) {
51 printk(KERN_ERR "%s: lock timeout.\n", __func__);
52 return -1;
53 }
54
55 msleep(1);
56 }
57
58 #if 0
59 netxen_nic_write_w1(adapter,
60 NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER);
61 #endif
62 return 0;
63 }
64
65 static int
66 netxen_api_unlock(struct netxen_adapter *adapter)
67 {
68 u32 val;
69
70 /* Release PCIE HW semaphore5 */
71 netxen_nic_read_w0(adapter,
72 NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK), &val);
73 return 0;
74 }
75
76 static u32
77 netxen_poll_rsp(struct netxen_adapter *adapter)
78 {
79 u32 rsp = NX_CDRP_RSP_OK;
80 int timeout = 0;
81
82 do {
83 /* give atleast 1ms for firmware to respond */
84 msleep(1);
85
86 if (++timeout > NX_OS_CRB_RETRY_COUNT)
87 return NX_CDRP_RSP_TIMEOUT;
88
89 netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, &rsp);
90 } while (!NX_CDRP_IS_RSP(rsp));
91
92 return rsp;
93 }
94
95 static u32
96 netxen_issue_cmd(struct netxen_adapter *adapter,
97 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
98 {
99 u32 rsp;
100 u32 signature = 0;
101 u32 rcode = NX_RCODE_SUCCESS;
102
103 signature = NX_CDRP_SIGNATURE_MAKE(pci_fn, version);
104
105 /* Acquire semaphore before accessing CRB */
106 if (netxen_api_lock(adapter))
107 return NX_RCODE_TIMEOUT;
108
109 netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, signature);
110
111 netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, arg1);
112
113 netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, arg2);
114
115 netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, arg3);
116
117 netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET,
118 NX_CDRP_FORM_CMD(cmd));
119
120 rsp = netxen_poll_rsp(adapter);
121
122 if (rsp == NX_CDRP_RSP_TIMEOUT) {
123 printk(KERN_ERR "%s: card response timeout.\n",
124 netxen_nic_driver_name);
125
126 rcode = NX_RCODE_TIMEOUT;
127 } else if (rsp == NX_CDRP_RSP_FAIL) {
128 netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode);
129
130 printk(KERN_ERR "%s: failed card response code:0x%x\n",
131 netxen_nic_driver_name, rcode);
132 }
133
134 /* Release semaphore */
135 netxen_api_unlock(adapter);
136
137 return rcode;
138 }
139
140 int
141 nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu)
142 {
143 u32 rcode = NX_RCODE_SUCCESS;
144 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
145
146 if (recv_ctx->state == NX_HOST_CTX_STATE_ACTIVE)
147 rcode = netxen_issue_cmd(adapter,
148 adapter->ahw.pci_func,
149 NXHAL_VERSION,
150 recv_ctx->context_id,
151 mtu,
152 0,
153 NX_CDRP_CMD_SET_MTU);
154
155 if (rcode != NX_RCODE_SUCCESS)
156 return -EIO;
157
158 return 0;
159 }
160
161 static int
162 nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
163 {
164 void *addr;
165 nx_hostrq_rx_ctx_t *prq;
166 nx_cardrsp_rx_ctx_t *prsp;
167 nx_hostrq_rds_ring_t *prq_rds;
168 nx_hostrq_sds_ring_t *prq_sds;
169 nx_cardrsp_rds_ring_t *prsp_rds;
170 nx_cardrsp_sds_ring_t *prsp_sds;
171 struct nx_host_rds_ring *rds_ring;
172 struct nx_host_sds_ring *sds_ring;
173
174 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
175 u64 phys_addr;
176
177 int i, nrds_rings, nsds_rings;
178 size_t rq_size, rsp_size;
179 u32 cap, reg, val;
180
181 int err;
182
183 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
184
185 nrds_rings = adapter->max_rds_rings;
186 nsds_rings = adapter->max_sds_rings;
187
188 rq_size =
189 SIZEOF_HOSTRQ_RX(nx_hostrq_rx_ctx_t, nrds_rings, nsds_rings);
190 rsp_size =
191 SIZEOF_CARDRSP_RX(nx_cardrsp_rx_ctx_t, nrds_rings, nsds_rings);
192
193 addr = pci_alloc_consistent(adapter->pdev,
194 rq_size, &hostrq_phys_addr);
195 if (addr == NULL)
196 return -ENOMEM;
197 prq = (nx_hostrq_rx_ctx_t *)addr;
198
199 addr = pci_alloc_consistent(adapter->pdev,
200 rsp_size, &cardrsp_phys_addr);
201 if (addr == NULL) {
202 err = -ENOMEM;
203 goto out_free_rq;
204 }
205 prsp = (nx_cardrsp_rx_ctx_t *)addr;
206
207 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
208
209 cap = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN);
210 cap |= (NX_CAP0_JUMBO_CONTIGUOUS | NX_CAP0_LRO_CONTIGUOUS);
211
212 prq->capabilities[0] = cpu_to_le32(cap);
213 prq->host_int_crb_mode =
214 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
215 prq->host_rds_crb_mode =
216 cpu_to_le32(NX_HOST_RDS_CRB_MODE_UNIQUE);
217
218 prq->num_rds_rings = cpu_to_le16(nrds_rings);
219 prq->num_sds_rings = cpu_to_le16(nsds_rings);
220 prq->rds_ring_offset = cpu_to_le32(0);
221
222 val = le32_to_cpu(prq->rds_ring_offset) +
223 (sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
224 prq->sds_ring_offset = cpu_to_le32(val);
225
226 prq_rds = (nx_hostrq_rds_ring_t *)(prq->data +
227 le32_to_cpu(prq->rds_ring_offset));
228
229 for (i = 0; i < nrds_rings; i++) {
230
231 rds_ring = &recv_ctx->rds_rings[i];
232
233 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
234 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
235 prq_rds[i].ring_kind = cpu_to_le32(i);
236 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
237 }
238
239 prq_sds = (nx_hostrq_sds_ring_t *)(prq->data +
240 le32_to_cpu(prq->sds_ring_offset));
241
242 for (i = 0; i < nsds_rings; i++) {
243
244 sds_ring = &recv_ctx->sds_rings[i];
245
246 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
247 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
248 prq_sds[i].msi_index = cpu_to_le16(i);
249 }
250
251 phys_addr = hostrq_phys_addr;
252 err = netxen_issue_cmd(adapter,
253 adapter->ahw.pci_func,
254 NXHAL_VERSION,
255 (u32)(phys_addr >> 32),
256 (u32)(phys_addr & 0xffffffff),
257 rq_size,
258 NX_CDRP_CMD_CREATE_RX_CTX);
259 if (err) {
260 printk(KERN_WARNING
261 "Failed to create rx ctx in firmware%d\n", err);
262 goto out_free_rsp;
263 }
264
265
266 prsp_rds = ((nx_cardrsp_rds_ring_t *)
267 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
268
269 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
270 rds_ring = &recv_ctx->rds_rings[i];
271
272 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
273 rds_ring->crb_rcv_producer = NETXEN_NIC_REG(reg - 0x200);
274 }
275
276 prsp_sds = ((nx_cardrsp_sds_ring_t *)
277 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
278
279 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
280 sds_ring = &recv_ctx->sds_rings[i];
281
282 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
283 sds_ring->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200);
284
285 reg = le32_to_cpu(prsp_sds[i].interrupt_crb);
286 sds_ring->crb_intr_mask = NETXEN_NIC_REG(reg - 0x200);
287 }
288
289 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
290 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
291 recv_ctx->virt_port = prsp->virt_port;
292
293 out_free_rsp:
294 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
295 out_free_rq:
296 pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
297 return err;
298 }
299
300 static void
301 nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter)
302 {
303 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
304
305 if (netxen_issue_cmd(adapter,
306 adapter->ahw.pci_func,
307 NXHAL_VERSION,
308 recv_ctx->context_id,
309 NX_DESTROY_CTX_RESET,
310 0,
311 NX_CDRP_CMD_DESTROY_RX_CTX)) {
312
313 printk(KERN_WARNING
314 "%s: Failed to destroy rx ctx in firmware\n",
315 netxen_nic_driver_name);
316 }
317 }
318
319 static int
320 nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
321 {
322 nx_hostrq_tx_ctx_t *prq;
323 nx_hostrq_cds_ring_t *prq_cds;
324 nx_cardrsp_tx_ctx_t *prsp;
325 void *rq_addr, *rsp_addr;
326 size_t rq_size, rsp_size;
327 u32 temp;
328 int err = 0;
329 u64 offset, phys_addr;
330 dma_addr_t rq_phys_addr, rsp_phys_addr;
331
332 rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t);
333 rq_addr = pci_alloc_consistent(adapter->pdev,
334 rq_size, &rq_phys_addr);
335 if (!rq_addr)
336 return -ENOMEM;
337
338 rsp_size = SIZEOF_CARDRSP_TX(nx_cardrsp_tx_ctx_t);
339 rsp_addr = pci_alloc_consistent(adapter->pdev,
340 rsp_size, &rsp_phys_addr);
341 if (!rsp_addr) {
342 err = -ENOMEM;
343 goto out_free_rq;
344 }
345
346 memset(rq_addr, 0, rq_size);
347 prq = (nx_hostrq_tx_ctx_t *)rq_addr;
348
349 memset(rsp_addr, 0, rsp_size);
350 prsp = (nx_cardrsp_tx_ctx_t *)rsp_addr;
351
352 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
353
354 temp = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN | NX_CAP0_LSO);
355 prq->capabilities[0] = cpu_to_le32(temp);
356
357 prq->host_int_crb_mode =
358 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
359
360 prq->interrupt_ctl = 0;
361 prq->msi_index = 0;
362
363 prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr);
364
365 offset = adapter->ctx_desc_phys_addr+sizeof(struct netxen_ring_ctx);
366 prq->cmd_cons_dma_addr = cpu_to_le64(offset);
367
368 prq_cds = &prq->cds_ring;
369
370 prq_cds->host_phys_addr =
371 cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
372
373 prq_cds->ring_size = cpu_to_le32(adapter->num_txd);
374
375 phys_addr = rq_phys_addr;
376 err = netxen_issue_cmd(adapter,
377 adapter->ahw.pci_func,
378 NXHAL_VERSION,
379 (u32)(phys_addr >> 32),
380 ((u32)phys_addr & 0xffffffff),
381 rq_size,
382 NX_CDRP_CMD_CREATE_TX_CTX);
383
384 if (err == NX_RCODE_SUCCESS) {
385 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
386 adapter->crb_addr_cmd_producer =
387 NETXEN_NIC_REG(temp - 0x200);
388 #if 0
389 adapter->tx_state =
390 le32_to_cpu(prsp->host_ctx_state);
391 #endif
392 adapter->tx_context_id =
393 le16_to_cpu(prsp->context_id);
394 } else {
395 printk(KERN_WARNING
396 "Failed to create tx ctx in firmware%d\n", err);
397 err = -EIO;
398 }
399
400 pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
401
402 out_free_rq:
403 pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
404
405 return err;
406 }
407
408 static void
409 nx_fw_cmd_destroy_tx_ctx(struct netxen_adapter *adapter)
410 {
411 if (netxen_issue_cmd(adapter,
412 adapter->ahw.pci_func,
413 NXHAL_VERSION,
414 adapter->tx_context_id,
415 NX_DESTROY_CTX_RESET,
416 0,
417 NX_CDRP_CMD_DESTROY_TX_CTX)) {
418
419 printk(KERN_WARNING
420 "%s: Failed to destroy tx ctx in firmware\n",
421 netxen_nic_driver_name);
422 }
423 }
424
425 static u64 ctx_addr_sig_regs[][3] = {
426 {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
427 {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
428 {NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
429 {NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
430 };
431
432 #define CRB_CTX_ADDR_REG_LO(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][0])
433 #define CRB_CTX_ADDR_REG_HI(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][2])
434 #define CRB_CTX_SIGNATURE_REG(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][1])
435
436 #define lower32(x) ((u32)((x) & 0xffffffff))
437 #define upper32(x) ((u32)(((u64)(x) >> 32) & 0xffffffff))
438
439 static struct netxen_recv_crb recv_crb_registers[] = {
440 /* Instance 0 */
441 {
442 /* crb_rcv_producer: */
443 {
444 NETXEN_NIC_REG(0x100),
445 /* Jumbo frames */
446 NETXEN_NIC_REG(0x110),
447 /* LRO */
448 NETXEN_NIC_REG(0x120)
449 },
450 /* crb_sts_consumer: */
451 NETXEN_NIC_REG(0x138),
452 },
453 /* Instance 1 */
454 {
455 /* crb_rcv_producer: */
456 {
457 NETXEN_NIC_REG(0x144),
458 /* Jumbo frames */
459 NETXEN_NIC_REG(0x154),
460 /* LRO */
461 NETXEN_NIC_REG(0x164)
462 },
463 /* crb_sts_consumer: */
464 NETXEN_NIC_REG(0x17c),
465 },
466 /* Instance 2 */
467 {
468 /* crb_rcv_producer: */
469 {
470 NETXEN_NIC_REG(0x1d8),
471 /* Jumbo frames */
472 NETXEN_NIC_REG(0x1f8),
473 /* LRO */
474 NETXEN_NIC_REG(0x208)
475 },
476 /* crb_sts_consumer: */
477 NETXEN_NIC_REG(0x220),
478 },
479 /* Instance 3 */
480 {
481 /* crb_rcv_producer: */
482 {
483 NETXEN_NIC_REG(0x22c),
484 /* Jumbo frames */
485 NETXEN_NIC_REG(0x23c),
486 /* LRO */
487 NETXEN_NIC_REG(0x24c)
488 },
489 /* crb_sts_consumer: */
490 NETXEN_NIC_REG(0x264),
491 },
492 };
493
494 static int
495 netxen_init_old_ctx(struct netxen_adapter *adapter)
496 {
497 struct netxen_recv_context *recv_ctx;
498 struct nx_host_rds_ring *rds_ring;
499 struct nx_host_sds_ring *sds_ring;
500 int ring;
501 int func_id = adapter->portnum;
502
503 adapter->ctx_desc->cmd_ring_addr =
504 cpu_to_le64(adapter->ahw.cmd_desc_phys_addr);
505 adapter->ctx_desc->cmd_ring_size =
506 cpu_to_le32(adapter->num_txd);
507
508 recv_ctx = &adapter->recv_ctx;
509
510 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
511 rds_ring = &recv_ctx->rds_rings[ring];
512
513 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_addr =
514 cpu_to_le64(rds_ring->phys_addr);
515 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_size =
516 cpu_to_le32(rds_ring->num_desc);
517 }
518 sds_ring = &recv_ctx->sds_rings[0];
519 adapter->ctx_desc->sts_ring_addr = cpu_to_le64(sds_ring->phys_addr);
520 adapter->ctx_desc->sts_ring_size = cpu_to_le32(sds_ring->num_desc);
521
522 adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_LO(func_id),
523 lower32(adapter->ctx_desc_phys_addr));
524 adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_HI(func_id),
525 upper32(adapter->ctx_desc_phys_addr));
526 adapter->pci_write_normalize(adapter, CRB_CTX_SIGNATURE_REG(func_id),
527 NETXEN_CTX_SIGNATURE | func_id);
528 return 0;
529 }
530
531 static uint32_t sw_int_mask[4] = {
532 CRB_SW_INT_MASK_0, CRB_SW_INT_MASK_1,
533 CRB_SW_INT_MASK_2, CRB_SW_INT_MASK_3
534 };
535
536 int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
537 {
538 struct netxen_hardware_context *hw = &adapter->ahw;
539 u32 state = 0;
540 void *addr;
541 int err = 0;
542 int ring;
543 struct netxen_recv_context *recv_ctx;
544 struct nx_host_rds_ring *rds_ring;
545 struct nx_host_sds_ring *sds_ring;
546
547 struct pci_dev *pdev = adapter->pdev;
548 struct net_device *netdev = adapter->netdev;
549
550 err = netxen_receive_peg_ready(adapter);
551 if (err) {
552 printk(KERN_ERR "Rcv Peg initialization not complete:%x.\n",
553 state);
554 return err;
555 }
556
557 addr = pci_alloc_consistent(pdev,
558 sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
559 &adapter->ctx_desc_phys_addr);
560
561 if (addr == NULL) {
562 dev_err(&pdev->dev, "failed to allocate hw context\n");
563 return -ENOMEM;
564 }
565 memset(addr, 0, sizeof(struct netxen_ring_ctx));
566 adapter->ctx_desc = (struct netxen_ring_ctx *)addr;
567 adapter->ctx_desc->ctx_id = cpu_to_le32(adapter->portnum);
568 adapter->ctx_desc->cmd_consumer_offset =
569 cpu_to_le64(adapter->ctx_desc_phys_addr +
570 sizeof(struct netxen_ring_ctx));
571 adapter->cmd_consumer =
572 (__le32 *)(((char *)addr) + sizeof(struct netxen_ring_ctx));
573
574 /* cmd desc ring */
575 addr = pci_alloc_consistent(pdev,
576 TX_DESC_RINGSIZE(adapter),
577 &hw->cmd_desc_phys_addr);
578
579 if (addr == NULL) {
580 dev_err(&pdev->dev, "%s: failed to allocate tx desc ring\n",
581 netdev->name);
582 return -ENOMEM;
583 }
584
585 hw->cmd_desc_head = (struct cmd_desc_type0 *)addr;
586
587 recv_ctx = &adapter->recv_ctx;
588
589 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
590 rds_ring = &recv_ctx->rds_rings[ring];
591 addr = pci_alloc_consistent(adapter->pdev,
592 RCV_DESC_RINGSIZE(rds_ring),
593 &rds_ring->phys_addr);
594 if (addr == NULL) {
595 dev_err(&pdev->dev,
596 "%s: failed to allocate rds ring [%d]\n",
597 netdev->name, ring);
598 err = -ENOMEM;
599 goto err_out_free;
600 }
601 rds_ring->desc_head = (struct rcv_desc *)addr;
602
603 if (adapter->fw_major < 4)
604 rds_ring->crb_rcv_producer =
605 recv_crb_registers[adapter->portnum].
606 crb_rcv_producer[ring];
607 }
608
609 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
610 sds_ring = &recv_ctx->sds_rings[ring];
611
612 addr = pci_alloc_consistent(adapter->pdev,
613 STATUS_DESC_RINGSIZE(sds_ring),
614 &sds_ring->phys_addr);
615 if (addr == NULL) {
616 dev_err(&pdev->dev,
617 "%s: failed to allocate sds ring [%d]\n",
618 netdev->name, ring);
619 err = -ENOMEM;
620 goto err_out_free;
621 }
622 sds_ring->desc_head = (struct status_desc *)addr;
623 }
624
625
626 if (adapter->fw_major >= 4) {
627 adapter->intr_scheme = INTR_SCHEME_PERPORT;
628 adapter->msi_mode = MSI_MODE_MULTIFUNC;
629
630 err = nx_fw_cmd_create_rx_ctx(adapter);
631 if (err)
632 goto err_out_free;
633 err = nx_fw_cmd_create_tx_ctx(adapter);
634 if (err)
635 goto err_out_free;
636 } else {
637 sds_ring = &recv_ctx->sds_rings[0];
638 sds_ring->crb_sts_consumer =
639 recv_crb_registers[adapter->portnum].crb_sts_consumer;
640
641 adapter->intr_scheme = adapter->pci_read_normalize(adapter,
642 CRB_NIC_CAPABILITIES_FW);
643 adapter->msi_mode = adapter->pci_read_normalize(adapter,
644 CRB_NIC_MSI_MODE_FW);
645 recv_ctx->sds_rings[0].crb_intr_mask =
646 sw_int_mask[adapter->portnum];
647
648 err = netxen_init_old_ctx(adapter);
649 if (err) {
650 netxen_free_hw_resources(adapter);
651 return err;
652 }
653
654 }
655
656 return 0;
657
658 err_out_free:
659 netxen_free_hw_resources(adapter);
660 return err;
661 }
662
663 void netxen_free_hw_resources(struct netxen_adapter *adapter)
664 {
665 struct netxen_recv_context *recv_ctx;
666 struct nx_host_rds_ring *rds_ring;
667 struct nx_host_sds_ring *sds_ring;
668 int ring;
669
670 if (adapter->fw_major >= 4) {
671 nx_fw_cmd_destroy_tx_ctx(adapter);
672 nx_fw_cmd_destroy_rx_ctx(adapter);
673 }
674
675 if (adapter->ctx_desc != NULL) {
676 pci_free_consistent(adapter->pdev,
677 sizeof(struct netxen_ring_ctx) +
678 sizeof(uint32_t),
679 adapter->ctx_desc,
680 adapter->ctx_desc_phys_addr);
681 adapter->ctx_desc = NULL;
682 }
683
684 if (adapter->ahw.cmd_desc_head != NULL) {
685 pci_free_consistent(adapter->pdev,
686 sizeof(struct cmd_desc_type0) *
687 adapter->num_txd,
688 adapter->ahw.cmd_desc_head,
689 adapter->ahw.cmd_desc_phys_addr);
690 adapter->ahw.cmd_desc_head = NULL;
691 }
692
693 recv_ctx = &adapter->recv_ctx;
694 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
695 rds_ring = &recv_ctx->rds_rings[ring];
696
697 if (rds_ring->desc_head != NULL) {
698 pci_free_consistent(adapter->pdev,
699 RCV_DESC_RINGSIZE(rds_ring),
700 rds_ring->desc_head,
701 rds_ring->phys_addr);
702 rds_ring->desc_head = NULL;
703 }
704 }
705
706 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
707 sds_ring = &recv_ctx->sds_rings[ring];
708
709 if (sds_ring->desc_head != NULL) {
710 pci_free_consistent(adapter->pdev,
711 STATUS_DESC_RINGSIZE(sds_ring),
712 sds_ring->desc_head,
713 sds_ring->phys_addr);
714 sds_ring->desc_head = NULL;
715 }
716 }
717 }
718
Linux with added FPC-III support