drivers/net/netxen/netxen_nic_niu.c

   1 /*
   2  * Copyright (C) 2003 - 2009 NetXen, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18  * MA  02111-1307, USA.
  19  *
  20  * The full GNU General Public License is included in this distribution
  21  * in the file called LICENSE.
  22  *
  23  * Contact Information:
  24  *    info@netxen.com
  25  * NetXen Inc,
  26  * 18922 Forge Drive
  27  * Cupertino, CA 95014-0701
  28  *
  29  */
  30
  31 #include "netxen_nic.h"
  32
  33 #define NETXEN_GB_MAC_SOFT_RESET        0x80000000
  34 #define NETXEN_GB_MAC_RESET_PROT_BLK   0x000F0000
  35 #define NETXEN_GB_MAC_ENABLE_TX_RX     0x00000005
  36 #define NETXEN_GB_MAC_PAUSED_FRMS      0x00000020
  37
  38 static long phy_lock_timeout = 100000000;
  39
  40 static int phy_lock(struct netxen_adapter *adapter)
  41 {
  42         int i;
  43         int done = 0, timeout = 0;
  44
  45         while (!done) {
  46                 done = netxen_nic_reg_read(adapter,
  47                                 NETXEN_PCIE_REG(PCIE_SEM3_LOCK));
  48                 if (done == 1)
  49                         break;
  50                 if (timeout >= phy_lock_timeout) {
  51                         return -1;
  52                 }
  53                 timeout++;
  54                 if (!in_atomic())
  55                         schedule();
  56                 else {
  57                         for (i = 0; i < 20; i++)
  58                                 cpu_relax();
  59                 }
  60         }
  61
  62         netxen_crb_writelit_adapter(adapter,
  63                         NETXEN_PHY_LOCK_ID, PHY_LOCK_DRIVER);
  64         return 0;
  65 }
  66
  67 static int phy_unlock(struct netxen_adapter *adapter)
  68 {
  69         adapter->pci_read_immediate(adapter, NETXEN_PCIE_REG(PCIE_SEM3_UNLOCK));
  70
  71         return 0;
  72 }
  73
  74 /*
  75  * netxen_niu_gbe_phy_read - read a register from the GbE PHY via
  76  * mii management interface.
  77  *
  78  * Note: The MII management interface goes through port 0.
  79  *      Individual phys are addressed as follows:
  80  * @param phy  [15:8]  phy id
  81  * @param reg  [7:0]   register number
  82  *
  83  * @returns  0 on success
  84  *        -1 on error
  85  *
  86  */
  87 int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
  88                                 __u32 * readval)
  89 {
  90         long timeout = 0;
  91         long result = 0;
  92         long restore = 0;
  93         long phy = adapter->physical_port;
  94         __u32 address;
  95         __u32 command;
  96         __u32 status;
  97         __u32 mac_cfg0;
  98
  99         if (phy_lock(adapter) != 0) {
 100                 return -1;
 101         }
 102
 103         /*
 104          * MII mgmt all goes through port 0 MAC interface,
 105          * so it cannot be in reset
 106          */
 107
 108         if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
 109                                   &mac_cfg0, 4))
 110                 return -EIO;
 111         if (netxen_gb_get_soft_reset(mac_cfg0)) {
 112                 __u32 temp;
 113                 temp = 0;
 114                 netxen_gb_tx_reset_pb(temp);
 115                 netxen_gb_rx_reset_pb(temp);
 116                 netxen_gb_tx_reset_mac(temp);
 117                 netxen_gb_rx_reset_mac(temp);
 118                 if (adapter->hw_write_wx(adapter,
 119                                            NETXEN_NIU_GB_MAC_CONFIG_0(0),
 120                                            &temp, 4))
 121                         return -EIO;
 122                 restore = 1;
 123         }
 124
 125         address = 0;
 126         netxen_gb_mii_mgmt_reg_addr(address, reg);
 127         netxen_gb_mii_mgmt_phy_addr(address, phy);
 128         if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
 129                                    &address, 4))
 130                 return -EIO;
 131         command = 0;            /* turn off any prior activity */
 132         if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
 133                                    &command, 4))
 134                 return -EIO;
 135         /* send read command */
 136         netxen_gb_mii_mgmt_set_read_cycle(command);
 137         if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
 138                                    &command, 4))
 139                 return -EIO;
 140
 141         status = 0;
 142         do {
 143                 if (adapter->hw_read_wx(adapter,
 144                                           NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
 145                                           &status, 4))
 146                         return -EIO;
 147                 timeout++;
 148         } while ((netxen_get_gb_mii_mgmt_busy(status)
 149                   || netxen_get_gb_mii_mgmt_notvalid(status))
 150                  && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
 151
 152         if (timeout < NETXEN_NIU_PHY_WAITMAX) {
 153                 if (adapter->hw_read_wx(adapter,
 154                                           NETXEN_NIU_GB_MII_MGMT_STATUS(0),
 155                                           readval, 4))
 156                         return -EIO;
 157                 result = 0;
 158         } else
 159                 result = -1;
 160
 161         if (restore)
 162                 if (adapter->hw_write_wx(adapter,
 163                                            NETXEN_NIU_GB_MAC_CONFIG_0(0),
 164                                            &mac_cfg0, 4))
 165                         return -EIO;
 166         phy_unlock(adapter);
 167         return result;
 168 }
 169
 170 /*
 171  * netxen_niu_gbe_phy_write - write a register to the GbE PHY via
 172  * mii management interface.
 173  *
 174  * Note: The MII management interface goes through port 0.
 175  *      Individual phys are addressed as follows:
 176  * @param phy      [15:8]  phy id
 177  * @param reg      [7:0]   register number
 178  *
 179  * @returns  0 on success
 180  *        -1 on error
 181  *
 182  */
 183 int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
 184                                 __u32 val)
 185 {
 186         long timeout = 0;
 187         long result = 0;
 188         long restore = 0;
 189         long phy = adapter->physical_port;
 190         __u32 address;
 191         __u32 command;
 192         __u32 status;
 193         __u32 mac_cfg0;
 194
 195         /*
 196          * MII mgmt all goes through port 0 MAC interface, so it
 197          * cannot be in reset
 198          */
 199
 200         if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
 201                                   &mac_cfg0, 4))
 202                 return -EIO;
 203         if (netxen_gb_get_soft_reset(mac_cfg0)) {
 204                 __u32 temp;
 205                 temp = 0;
 206                 netxen_gb_tx_reset_pb(temp);
 207                 netxen_gb_rx_reset_pb(temp);
 208                 netxen_gb_tx_reset_mac(temp);
 209                 netxen_gb_rx_reset_mac(temp);
 210
 211                 if (adapter->hw_write_wx(adapter,
 212                                            NETXEN_NIU_GB_MAC_CONFIG_0(0),
 213                                            &temp, 4))
 214                         return -EIO;
 215                 restore = 1;
 216         }
 217
 218         command = 0;            /* turn off any prior activity */
 219         if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
 220                                    &command, 4))
 221                 return -EIO;
 222
 223         address = 0;
 224         netxen_gb_mii_mgmt_reg_addr(address, reg);
 225         netxen_gb_mii_mgmt_phy_addr(address, phy);
 226         if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
 227                                    &address, 4))
 228                 return -EIO;
 229
 230         if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_CTRL(0),
 231                                    &val, 4))
 232                 return -EIO;
 233
 234         status = 0;
 235         do {
 236                 if (adapter->hw_read_wx(adapter,
 237                                           NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
 238                                           &status, 4))
 239                         return -EIO;
 240                 timeout++;
 241         } while ((netxen_get_gb_mii_mgmt_busy(status))
 242                  && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
 243
 244         if (timeout < NETXEN_NIU_PHY_WAITMAX)
 245                 result = 0;
 246         else
 247                 result = -EIO;
 248
 249         /* restore the state of port 0 MAC in case we tampered with it */
 250         if (restore)
 251                 if (adapter->hw_write_wx(adapter,
 252                                            NETXEN_NIU_GB_MAC_CONFIG_0(0),
 253                                            &mac_cfg0, 4))
 254                         return -EIO;
 255
 256         return result;
 257 }
 258
 259 int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter)
 260 {
 261         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x3f);
 262         return 0;
 263 }
 264
 265 int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter)
 266 {
 267         int result = 0;
 268         __u32 enable = 0;
 269         netxen_set_phy_int_link_status_changed(enable);
 270         netxen_set_phy_int_autoneg_completed(enable);
 271         netxen_set_phy_int_speed_changed(enable);
 272
 273         if (0 !=
 274             netxen_niu_gbe_phy_write(adapter,
 275                                      NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE,
 276                                      enable))
 277                 result = -EIO;
 278
 279         return result;
 280 }
 281
 282 int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter)
 283 {
 284         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x7f);
 285         return 0;
 286 }
 287
 288 int netxen_niu_gbe_disable_phy_interrupts(struct netxen_adapter *adapter)
 289 {
 290         int result = 0;
 291         if (0 !=
 292             netxen_niu_gbe_phy_write(adapter,
 293                                      NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE, 0))
 294                 result = -EIO;
 295
 296         return result;
 297 }
 298
 299 static int netxen_niu_gbe_clear_phy_interrupts(struct netxen_adapter *adapter)
 300 {
 301         int result = 0;
 302         if (0 !=
 303             netxen_niu_gbe_phy_write(adapter,
 304                                      NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS,
 305                                      -EIO))
 306                 result = -EIO;
 307
 308         return result;
 309 }
 310
 311 /*
 312  * netxen_niu_gbe_set_mii_mode- Set 10/100 Mbit Mode for GbE MAC
 313  *
 314  */
 315 static void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter,
 316                                         int port, long enable)
 317 {
 318         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2);
 319         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
 320                                     0x80000000);
 321         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
 322                                     0x0000f0025);
 323         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port),
 324                                     0xf1ff);
 325         netxen_crb_writelit_adapter(adapter,
 326                                     NETXEN_NIU_GB0_GMII_MODE + (port << 3), 0);
 327         netxen_crb_writelit_adapter(adapter,
 328                                     NETXEN_NIU_GB0_MII_MODE + (port << 3), 1);
 329         netxen_crb_writelit_adapter(adapter,
 330                                     (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
 331         netxen_crb_writelit_adapter(adapter,
 332                                     NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
 333
 334         if (enable) {
 335                 /*
 336                  * Do NOT enable flow control until a suitable solution for
 337                  *  shutting down pause frames is found.
 338                  */
 339                 netxen_crb_writelit_adapter(adapter,
 340                                             NETXEN_NIU_GB_MAC_CONFIG_0(port),
 341                                             0x5);
 342         }
 343
 344         if (netxen_niu_gbe_enable_phy_interrupts(adapter))
 345                 printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n");
 346         if (netxen_niu_gbe_clear_phy_interrupts(adapter))
 347                 printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n");
 348 }
 349
 350 /*
 351  * netxen_niu_gbe_set_gmii_mode- Set GbE Mode for GbE MAC
 352  */
 353 static void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter,
 354                                          int port, long enable)
 355 {
 356         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2);
 357         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
 358                                     0x80000000);
 359         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
 360                                     0x0000f0025);
 361         netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port),
 362                                     0xf2ff);
 363         netxen_crb_writelit_adapter(adapter,
 364                                     NETXEN_NIU_GB0_MII_MODE + (port << 3), 0);
 365         netxen_crb_writelit_adapter(adapter,
 366                                     NETXEN_NIU_GB0_GMII_MODE + (port << 3), 1);
 367         netxen_crb_writelit_adapter(adapter,
 368                                     (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
 369         netxen_crb_writelit_adapter(adapter,
 370                                     NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
 371
 372         if (enable) {
 373                 /*
 374                  * Do NOT enable flow control until a suitable solution for
 375                  *  shutting down pause frames is found.
 376                  */
 377                 netxen_crb_writelit_adapter(adapter,
 378                                             NETXEN_NIU_GB_MAC_CONFIG_0(port),
 379                                             0x5);
 380         }
 381
 382         if (netxen_niu_gbe_enable_phy_interrupts(adapter))
 383                 printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n");
 384         if (netxen_niu_gbe_clear_phy_interrupts(adapter))
 385                 printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n");
 386 }
 387
 388 int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port)
 389 {
 390         int result = 0;
 391         __u32 status;
 392
 393         if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
 394                 return 0;
 395
 396         if (adapter->disable_phy_interrupts)
 397                 adapter->disable_phy_interrupts(adapter);
 398         mdelay(2);
 399
 400         if (0 == netxen_niu_gbe_phy_read(adapter,
 401                         NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS, &status)) {
 402                 if (netxen_get_phy_link(status)) {
 403                         if (netxen_get_phy_speed(status) == 2) {
 404                                 netxen_niu_gbe_set_gmii_mode(adapter, port, 1);
 405                         } else if ((netxen_get_phy_speed(status) == 1)
 406                                    || (netxen_get_phy_speed(status) == 0)) {
 407                                 netxen_niu_gbe_set_mii_mode(adapter, port, 1);
 408                         } else {
 409                                 result = -1;
 410                         }
 411
 412                 } else {
 413                         /*
 414                          * We don't have link. Cable  must be unconnected.
 415                          * Enable phy interrupts so we take action when
 416                          * plugged in.
 417                          */
 418
 419                         netxen_crb_writelit_adapter(adapter,
 420                                                     NETXEN_NIU_GB_MAC_CONFIG_0
 421                                                     (port),
 422                                                     NETXEN_GB_MAC_SOFT_RESET);
 423                         netxen_crb_writelit_adapter(adapter,
 424                                                     NETXEN_NIU_GB_MAC_CONFIG_0
 425                                                     (port),
 426                                                     NETXEN_GB_MAC_RESET_PROT_BLK
 427                                                     | NETXEN_GB_MAC_ENABLE_TX_RX
 428                                                     |
 429                                                     NETXEN_GB_MAC_PAUSED_FRMS);
 430                         if (netxen_niu_gbe_clear_phy_interrupts(adapter))
 431                                 printk(KERN_ERR PFX
 432                                        "ERROR clearing PHY interrupts\n");
 433                         if (netxen_niu_gbe_enable_phy_interrupts(adapter))
 434                                 printk(KERN_ERR PFX
 435                                        "ERROR enabling PHY interrupts\n");
 436                         if (netxen_niu_gbe_clear_phy_interrupts(adapter))
 437                                 printk(KERN_ERR PFX
 438                                        "ERROR clearing PHY interrupts\n");
 439                         result = -1;
 440                 }
 441         } else {
 442                 result = -EIO;
 443         }
 444         return result;
 445 }
 446
 447 int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
 448 {
 449         if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
 450                 netxen_crb_writelit_adapter(adapter,
 451                         NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447);
 452                 netxen_crb_writelit_adapter(adapter,
 453                         NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
 454         }
 455
 456         return 0;
 457 }
 458
 459 /*
 460  * Return the current station MAC address.
 461  * Note that the passed-in value must already be in network byte order.
 462  */
 463 static int netxen_niu_macaddr_get(struct netxen_adapter *adapter,
 464                                   netxen_ethernet_macaddr_t * addr)
 465 {
 466         u32 stationhigh;
 467         u32 stationlow;
 468         int phy = adapter->physical_port;
 469         u8 val[8];
 470
 471         if (addr == NULL)
 472                 return -EINVAL;
 473         if ((phy < 0) || (phy > 3))
 474                 return -EINVAL;
 475
 476         if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_0(phy),
 477                                   &stationhigh, 4))
 478                 return -EIO;
 479         if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_1(phy),
 480                                   &stationlow, 4))
 481                 return -EIO;
 482         ((__le32 *)val)[1] = cpu_to_le32(stationhigh);
 483         ((__le32 *)val)[0] = cpu_to_le32(stationlow);
 484
 485         memcpy(addr, val + 2, 6);
 486
 487         return 0;
 488 }
 489
 490 /*
 491  * Set the station MAC address.
 492  * Note that the passed-in value must already be in network byte order.
 493  */
 494 int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
 495                            netxen_ethernet_macaddr_t addr)
 496 {
 497         u8 temp[4];
 498         u32 val;
 499         int phy = adapter->physical_port;
 500         unsigned char mac_addr[6];
 501         int i;
 502
 503         if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
 504                 return 0;
 505
 506         for (i = 0; i < 10; i++) {
 507                 temp[0] = temp[1] = 0;
 508                 memcpy(temp + 2, addr, 2);
 509                 val = le32_to_cpu(*(__le32 *)temp);
 510                 if (adapter->hw_write_wx(adapter,
 511                                 NETXEN_NIU_GB_STATION_ADDR_1(phy), &val, 4))
 512                         return -EIO;
 513
 514                 memcpy(temp, ((u8 *) addr) + 2, sizeof(__le32));
 515                 val = le32_to_cpu(*(__le32 *)temp);
 516                 if (adapter->hw_write_wx(adapter,
 517                                 NETXEN_NIU_GB_STATION_ADDR_0(phy), &val, 4))
 518                         return -2;
 519
 520                 netxen_niu_macaddr_get(adapter,
 521                                        (netxen_ethernet_macaddr_t *) mac_addr);
 522                 if (memcmp(mac_addr, addr, 6) == 0)
 523                         break;
 524         }
 525
 526         if (i == 10) {
 527                 printk(KERN_ERR "%s: cannot set Mac addr for %s\n",
 528                        netxen_nic_driver_name, adapter->netdev->name);
 529                 printk(KERN_ERR "MAC address set: %pM.\n", addr);
 530                 printk(KERN_ERR "MAC address get: %pM.\n", mac_addr);
 531         }
 532         return 0;
 533 }
 534
 535 /* Disable a GbE interface */
 536 int netxen_niu_disable_gbe_port(struct netxen_adapter *adapter)
 537 {
 538         __u32 mac_cfg0;
 539         u32 port = adapter->physical_port;
 540
 541         if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
 542                 return 0;
 543
 544         if (port > NETXEN_NIU_MAX_GBE_PORTS)
 545                 return -EINVAL;
 546         mac_cfg0 = 0;
 547         netxen_gb_soft_reset(mac_cfg0);
 548         if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
 549                                    &mac_cfg0, 4))
 550                 return -EIO;
 551         return 0;
 552 }
 553
 554 /* Disable an XG interface */
 555 int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
 556 {
 557         __u32 mac_cfg;
 558         u32 port = adapter->physical_port;
 559
 560         if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
 561                 return 0;
 562
 563         if (port > NETXEN_NIU_MAX_XG_PORTS)
 564                 return -EINVAL;
 565
 566         mac_cfg = 0;
 567         if (adapter->hw_write_wx(adapter,
 568                 NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), &mac_cfg, 4))
 569                 return -EIO;
 570         return 0;
 571 }
 572
 573 /* Set promiscuous mode for a GbE interface */
 574 int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
 575                 u32 mode)
 576 {
 577         __u32 reg;
 578         u32 port = adapter->physical_port;
 579
 580         if (port > NETXEN_NIU_MAX_GBE_PORTS)
 581                 return -EINVAL;
 582
 583         /* save previous contents */
 584         if (adapter->hw_read_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
 585                                   &reg, 4))
 586                 return -EIO;
 587         if (mode == NETXEN_NIU_PROMISC_MODE) {
 588                 switch (port) {
 589                 case 0:
 590                         netxen_clear_gb_drop_gb0(reg);
 591                         break;
 592                 case 1:
 593                         netxen_clear_gb_drop_gb1(reg);
 594                         break;
 595                 case 2:
 596                         netxen_clear_gb_drop_gb2(reg);
 597                         break;
 598                 case 3:
 599                         netxen_clear_gb_drop_gb3(reg);
 600                         break;
 601                 default:
 602                         return -EIO;
 603                 }
 604         } else {
 605                 switch (port) {
 606                 case 0:
 607                         netxen_set_gb_drop_gb0(reg);
 608                         break;
 609                 case 1:
 610                         netxen_set_gb_drop_gb1(reg);
 611                         break;
 612                 case 2:
 613                         netxen_set_gb_drop_gb2(reg);
 614                         break;
 615                 case 3:
 616                         netxen_set_gb_drop_gb3(reg);
 617                         break;
 618                 default:
 619                         return -EIO;
 620                 }
 621         }
 622         if (adapter->hw_write_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
 623                                    &reg, 4))
 624                 return -EIO;
 625         return 0;
 626 }
 627
 628 /*
 629  * Set the MAC address for an XG port
 630  * Note that the passed-in value must already be in network byte order.
 631  */
 632 int netxen_niu_xg_macaddr_set(struct netxen_adapter *adapter,
 633                               netxen_ethernet_macaddr_t addr)
 634 {
 635         int phy = adapter->physical_port;
 636         u8 temp[4];
 637         u32 val;
 638
 639         if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
 640                 return 0;
 641
 642         if ((phy < 0) || (phy > NETXEN_NIU_MAX_XG_PORTS))
 643                 return -EIO;
 644
 645         temp[0] = temp[1] = 0;
 646         switch (phy) {
 647         case 0:
 648             memcpy(temp + 2, addr, 2);
 649             val = le32_to_cpu(*(__le32 *)temp);
 650             if (adapter->hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_1,
 651                                 &val, 4))
 652                 return -EIO;
 653
 654             memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
 655             val = le32_to_cpu(*(__le32 *)temp);
 656             if (adapter->hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_HI,
 657                                 &val, 4))
 658                 return -EIO;
 659             break;
 660
 661         case 1:
 662             memcpy(temp + 2, addr, 2);
 663             val = le32_to_cpu(*(__le32 *)temp);
 664             if (adapter->hw_write_wx(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_1,
 665                                 &val, 4))
 666                 return -EIO;
 667
 668             memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
 669             val = le32_to_cpu(*(__le32 *)temp);
 670             if (adapter->hw_write_wx(adapter, NETXEN_NIU_XG1_STATION_ADDR_0_HI,
 671                                 &val, 4))
 672                 return -EIO;
 673             break;
 674
 675         default:
 676             printk(KERN_ERR "Unknown port %d\n", phy);
 677             break;
 678         }
 679
 680         return 0;
 681 }
 682
 683 int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
 684                 u32 mode)
 685 {
 686         __u32 reg;
 687         u32 port = adapter->physical_port;
 688
 689         if (port > NETXEN_NIU_MAX_XG_PORTS)
 690                 return -EINVAL;
 691
 692         if (adapter->hw_read_wx(adapter,
 693                 NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), &reg, 4))
 694                         return -EIO;
 695         if (mode == NETXEN_NIU_PROMISC_MODE)
 696                 reg = (reg | 0x2000UL);
 697         else
 698                 reg = (reg & ~0x2000UL);
 699
 700         if (mode == NETXEN_NIU_ALLMULTI_MODE)
 701                 reg = (reg | 0x1000UL);
 702         else
 703                 reg = (reg & ~0x1000UL);
 704
 705         netxen_crb_writelit_adapter(adapter,
 706                 NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
 707
 708         return 0;
 709 }