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x86, UV: Fix for nodes with memory and no cpus
[linux/fpc-iii.git] / drivers / video / offb.c
blobe1d9eeb1aeafe432f1e240e4bf30d895cc72c80d
1 /*
2 * linux/drivers/video/offb.c -- Open Firmware based frame buffer device
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven
5 *
6 * This driver is partly based on the PowerMac console driver:
7 *
8 * Copyright (C) 1996 Paul Mackerras
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 */
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/string.h>
19 #include <linux/mm.h>
20 #include <linux/slab.h>
21 #include <linux/vmalloc.h>
22 #include <linux/delay.h>
23 #include <linux/interrupt.h>
24 #include <linux/fb.h>
25 #include <linux/init.h>
26 #include <linux/ioport.h>
27 #include <linux/pci.h>
28 #include <asm/io.h>
29 #include <asm/prom.h>
30
31 #ifdef CONFIG_PPC64
32 #include <asm/pci-bridge.h>
33 #endif
34
35 #ifdef CONFIG_PPC32
36 #include <asm/bootx.h>
37 #endif
38
39 #include "macmodes.h"
40
41 /* Supported palette hacks */
42 enum {
43 cmap_unknown,
44 cmap_m64, /* ATI Mach64 */
45 cmap_r128, /* ATI Rage128 */
46 cmap_M3A, /* ATI Rage Mobility M3 Head A */
47 cmap_M3B, /* ATI Rage Mobility M3 Head B */
48 cmap_radeon, /* ATI Radeon */
49 cmap_gxt2000, /* IBM GXT2000 */
50 cmap_avivo, /* ATI R5xx */
51 };
52
53 struct offb_par {
54 volatile void __iomem *cmap_adr;
55 volatile void __iomem *cmap_data;
56 int cmap_type;
57 int blanked;
58 };
59
60 struct offb_par default_par;
61
62 #ifdef CONFIG_PPC32
63 extern boot_infos_t *boot_infos;
64 #endif
65
66 /* Definitions used by the Avivo palette hack */
67 #define AVIVO_DC_LUT_RW_SELECT 0x6480
68 #define AVIVO_DC_LUT_RW_MODE 0x6484
69 #define AVIVO_DC_LUT_RW_INDEX 0x6488
70 #define AVIVO_DC_LUT_SEQ_COLOR 0x648c
71 #define AVIVO_DC_LUT_PWL_DATA 0x6490
72 #define AVIVO_DC_LUT_30_COLOR 0x6494
73 #define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
74 #define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
75 #define AVIVO_DC_LUT_AUTOFILL 0x64a0
76
77 #define AVIVO_DC_LUTA_CONTROL 0x64c0
78 #define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
79 #define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
80 #define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
81 #define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
82 #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
83 #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
84
85 #define AVIVO_DC_LUTB_CONTROL 0x6cc0
86 #define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
87 #define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
88 #define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
89 #define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
90 #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
91 #define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
92
93 /*
94 * Set a single color register. The values supplied are already
95 * rounded down to the hardware's capabilities (according to the
96 * entries in the var structure). Return != 0 for invalid regno.
97 */
98
99 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
100 u_int transp, struct fb_info *info)
101 {
102 struct offb_par *par = (struct offb_par *) info->par;
103 int i, depth;
104 u32 *pal = info->pseudo_palette;
105
106 depth = info->var.bits_per_pixel;
107 if (depth == 16)
108 depth = (info->var.green.length == 5) ? 15 : 16;
109
110 if (regno > 255 ||
111 (depth == 16 && regno > 63) ||
112 (depth == 15 && regno > 31))
113 return 1;
114
115 if (regno < 16) {
116 switch (depth) {
117 case 15:
118 pal[regno] = (regno << 10) | (regno << 5) | regno;
119 break;
120 case 16:
121 pal[regno] = (regno << 11) | (regno << 5) | regno;
122 break;
123 case 24:
124 pal[regno] = (regno << 16) | (regno << 8) | regno;
125 break;
126 case 32:
127 i = (regno << 8) | regno;
128 pal[regno] = (i << 16) | i;
129 break;
130 }
131 }
132
133 red >>= 8;
134 green >>= 8;
135 blue >>= 8;
136
137 if (!par->cmap_adr)
138 return 0;
139
140 switch (par->cmap_type) {
141 case cmap_m64:
142 writeb(regno, par->cmap_adr);
143 writeb(red, par->cmap_data);
144 writeb(green, par->cmap_data);
145 writeb(blue, par->cmap_data);
146 break;
147 case cmap_M3A:
148 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
149 out_le32(par->cmap_adr + 0x58,
150 in_le32(par->cmap_adr + 0x58) & ~0x20);
151 case cmap_r128:
152 /* Set palette index & data */
153 out_8(par->cmap_adr + 0xb0, regno);
154 out_le32(par->cmap_adr + 0xb4,
155 (red << 16 | green << 8 | blue));
156 break;
157 case cmap_M3B:
158 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
159 out_le32(par->cmap_adr + 0x58,
160 in_le32(par->cmap_adr + 0x58) | 0x20);
161 /* Set palette index & data */
162 out_8(par->cmap_adr + 0xb0, regno);
163 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
164 break;
165 case cmap_radeon:
166 /* Set palette index & data (could be smarter) */
167 out_8(par->cmap_adr + 0xb0, regno);
168 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
169 break;
170 case cmap_gxt2000:
171 out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
172 (red << 16 | green << 8 | blue));
173 break;
174 case cmap_avivo:
175 /* Write to both LUTs for now */
176 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
177 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
178 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
179 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
180 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
181 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
182 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
183 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
184 break;
185 }
186
187 return 0;
188 }
189
190 /*
191 * Blank the display.
192 */
193
194 static int offb_blank(int blank, struct fb_info *info)
195 {
196 struct offb_par *par = (struct offb_par *) info->par;
197 int i, j;
198
199 if (!par->cmap_adr)
200 return 0;
201
202 if (!par->blanked)
203 if (!blank)
204 return 0;
205
206 par->blanked = blank;
207
208 if (blank)
209 for (i = 0; i < 256; i++) {
210 switch (par->cmap_type) {
211 case cmap_m64:
212 writeb(i, par->cmap_adr);
213 for (j = 0; j < 3; j++)
214 writeb(0, par->cmap_data);
215 break;
216 case cmap_M3A:
217 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
218 out_le32(par->cmap_adr + 0x58,
219 in_le32(par->cmap_adr + 0x58) & ~0x20);
220 case cmap_r128:
221 /* Set palette index & data */
222 out_8(par->cmap_adr + 0xb0, i);
223 out_le32(par->cmap_adr + 0xb4, 0);
224 break;
225 case cmap_M3B:
226 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
227 out_le32(par->cmap_adr + 0x58,
228 in_le32(par->cmap_adr + 0x58) | 0x20);
229 /* Set palette index & data */
230 out_8(par->cmap_adr + 0xb0, i);
231 out_le32(par->cmap_adr + 0xb4, 0);
232 break;
233 case cmap_radeon:
234 out_8(par->cmap_adr + 0xb0, i);
235 out_le32(par->cmap_adr + 0xb4, 0);
236 break;
237 case cmap_gxt2000:
238 out_le32(((unsigned __iomem *) par->cmap_adr) + i,
239 0);
240 break;
241 case cmap_avivo:
242 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
243 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
244 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
245 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
246 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
247 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
248 break;
249 }
250 } else
251 fb_set_cmap(&info->cmap, info);
252 return 0;
253 }
254
255 static int offb_set_par(struct fb_info *info)
256 {
257 struct offb_par *par = (struct offb_par *) info->par;
258
259 /* On avivo, initialize palette control */
260 if (par->cmap_type == cmap_avivo) {
261 writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
262 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
263 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
264 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
265 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
266 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
267 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
268 writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
269 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
270 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
271 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
272 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
273 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
274 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
275 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
276 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
277 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
278 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
279 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
280 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
281 }
282 return 0;
283 }
284
285 static struct fb_ops offb_ops = {
286 .owner = THIS_MODULE,
287 .fb_setcolreg = offb_setcolreg,
288 .fb_set_par = offb_set_par,
289 .fb_blank = offb_blank,
290 .fb_fillrect = cfb_fillrect,
291 .fb_copyarea = cfb_copyarea,
292 .fb_imageblit = cfb_imageblit,
293 };
294
295 static void __iomem *offb_map_reg(struct device_node *np, int index,
296 unsigned long offset, unsigned long size)
297 {
298 const u32 *addrp;
299 u64 asize, taddr;
300 unsigned int flags;
301
302 addrp = of_get_pci_address(np, index, &asize, &flags);
303 if (addrp == NULL)
304 addrp = of_get_address(np, index, &asize, &flags);
305 if (addrp == NULL)
306 return NULL;
307 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
308 return NULL;
309 if ((offset + size) > asize)
310 return NULL;
311 taddr = of_translate_address(np, addrp);
312 if (taddr == OF_BAD_ADDR)
313 return NULL;
314 return ioremap(taddr + offset, size);
315 }
316
317 static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
318 const char *name, unsigned long address)
319 {
320 struct offb_par *par = (struct offb_par *) info->par;
321
322 if (dp && !strncmp(name, "ATY,Rage128", 11)) {
323 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
324 if (par->cmap_adr)
325 par->cmap_type = cmap_r128;
326 } else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
327 || !strncmp(name, "ATY,RageM3p12A", 14))) {
328 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
329 if (par->cmap_adr)
330 par->cmap_type = cmap_M3A;
331 } else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
332 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
333 if (par->cmap_adr)
334 par->cmap_type = cmap_M3B;
335 } else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
336 par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
337 if (par->cmap_adr)
338 par->cmap_type = cmap_radeon;
339 } else if (!strncmp(name, "ATY,", 4)) {
340 unsigned long base = address & 0xff000000UL;
341 par->cmap_adr =
342 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
343 par->cmap_data = par->cmap_adr + 1;
344 par->cmap_type = cmap_m64;
345 } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
346 of_device_is_compatible(dp, "pci1014,21c"))) {
347 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
348 if (par->cmap_adr)
349 par->cmap_type = cmap_gxt2000;
350 } else if (dp && !strncmp(name, "vga,Display-", 12)) {
351 /* Look for AVIVO initialized by SLOF */
352 struct device_node *pciparent = of_get_parent(dp);
353 const u32 *vid, *did;
354 vid = of_get_property(pciparent, "vendor-id", NULL);
355 did = of_get_property(pciparent, "device-id", NULL);
356 /* This will match most R5xx */
357 if (vid && did && *vid == 0x1002 &&
358 ((*did >= 0x7100 && *did < 0x7800) ||
359 (*did >= 0x9400))) {
360 par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
361 if (par->cmap_adr)
362 par->cmap_type = cmap_avivo;
363 }
364 of_node_put(pciparent);
365 }
366 info->fix.visual = (par->cmap_type != cmap_unknown) ?
367 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
368 }
369
370 static void __init offb_init_fb(const char *name, const char *full_name,
371 int width, int height, int depth,
372 int pitch, unsigned long address,
373 int foreign_endian, struct device_node *dp)
374 {
375 unsigned long res_size = pitch * height * (depth + 7) / 8;
376 struct offb_par *par = &default_par;
377 unsigned long res_start = address;
378 struct fb_fix_screeninfo *fix;
379 struct fb_var_screeninfo *var;
380 struct fb_info *info;
381 int size;
382
383 if (!request_mem_region(res_start, res_size, "offb"))
384 return;
385
386 printk(KERN_INFO
387 "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
388 width, height, name, address, depth, pitch);
389 if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
390 printk(KERN_ERR "%s: can't use depth = %d\n", full_name,
391 depth);
392 release_mem_region(res_start, res_size);
393 return;
394 }
395
396 size = sizeof(struct fb_info) + sizeof(u32) * 16;
397
398 info = kmalloc(size, GFP_ATOMIC);
399
400 if (info == 0) {
401 release_mem_region(res_start, res_size);
402 return;
403 }
404 memset(info, 0, size);
405
406 fix = &info->fix;
407 var = &info->var;
408 info->par = par;
409
410 strcpy(fix->id, "OFfb ");
411 strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
412 fix->id[sizeof(fix->id) - 1] = '\0';
413
414 var->xres = var->xres_virtual = width;
415 var->yres = var->yres_virtual = height;
416 fix->line_length = pitch;
417
418 fix->smem_start = address;
419 fix->smem_len = pitch * height;
420 fix->type = FB_TYPE_PACKED_PIXELS;
421 fix->type_aux = 0;
422
423 par->cmap_type = cmap_unknown;
424 if (depth == 8)
425 offb_init_palette_hacks(info, dp, name, address);
426 else
427 fix->visual = FB_VISUAL_TRUECOLOR;
428
429 var->xoffset = var->yoffset = 0;
430 switch (depth) {
431 case 8:
432 var->bits_per_pixel = 8;
433 var->red.offset = 0;
434 var->red.length = 8;
435 var->green.offset = 0;
436 var->green.length = 8;
437 var->blue.offset = 0;
438 var->blue.length = 8;
439 var->transp.offset = 0;
440 var->transp.length = 0;
441 break;
442 case 15: /* RGB 555 */
443 var->bits_per_pixel = 16;
444 var->red.offset = 10;
445 var->red.length = 5;
446 var->green.offset = 5;
447 var->green.length = 5;
448 var->blue.offset = 0;
449 var->blue.length = 5;
450 var->transp.offset = 0;
451 var->transp.length = 0;
452 break;
453 case 16: /* RGB 565 */
454 var->bits_per_pixel = 16;
455 var->red.offset = 11;
456 var->red.length = 5;
457 var->green.offset = 5;
458 var->green.length = 6;
459 var->blue.offset = 0;
460 var->blue.length = 5;
461 var->transp.offset = 0;
462 var->transp.length = 0;
463 break;
464 case 32: /* RGB 888 */
465 var->bits_per_pixel = 32;
466 var->red.offset = 16;
467 var->red.length = 8;
468 var->green.offset = 8;
469 var->green.length = 8;
470 var->blue.offset = 0;
471 var->blue.length = 8;
472 var->transp.offset = 24;
473 var->transp.length = 8;
474 break;
475 }
476 var->red.msb_right = var->green.msb_right = var->blue.msb_right =
477 var->transp.msb_right = 0;
478 var->grayscale = 0;
479 var->nonstd = 0;
480 var->activate = 0;
481 var->height = var->width = -1;
482 var->pixclock = 10000;
483 var->left_margin = var->right_margin = 16;
484 var->upper_margin = var->lower_margin = 16;
485 var->hsync_len = var->vsync_len = 8;
486 var->sync = 0;
487 var->vmode = FB_VMODE_NONINTERLACED;
488
489 info->fbops = &offb_ops;
490 info->screen_base = ioremap(address, fix->smem_len);
491 info->pseudo_palette = (void *) (info + 1);
492 info->flags = FBINFO_DEFAULT | foreign_endian;
493
494 fb_alloc_cmap(&info->cmap, 256, 0);
495
496 if (register_framebuffer(info) < 0) {
497 iounmap(par->cmap_adr);
498 par->cmap_adr = NULL;
499 iounmap(info->screen_base);
500 kfree(info);
501 release_mem_region(res_start, res_size);
502 return;
503 }
504
505 printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n",
506 info->node, full_name);
507 }
508
509
510 static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
511 {
512 unsigned int len;
513 int i, width = 640, height = 480, depth = 8, pitch = 640;
514 unsigned int flags, rsize, addr_prop = 0;
515 unsigned long max_size = 0;
516 u64 rstart, address = OF_BAD_ADDR;
517 const u32 *pp, *addrp, *up;
518 u64 asize;
519 int foreign_endian = 0;
520
521 #ifdef __BIG_ENDIAN
522 if (of_get_property(dp, "little-endian", NULL))
523 foreign_endian = FBINFO_FOREIGN_ENDIAN;
524 #else
525 if (of_get_property(dp, "big-endian", NULL))
526 foreign_endian = FBINFO_FOREIGN_ENDIAN;
527 #endif
528
529 pp = of_get_property(dp, "linux,bootx-depth", &len);
530 if (pp == NULL)
531 pp = of_get_property(dp, "depth", &len);
532 if (pp && len == sizeof(u32))
533 depth = *pp;
534
535 pp = of_get_property(dp, "linux,bootx-width", &len);
536 if (pp == NULL)
537 pp = of_get_property(dp, "width", &len);
538 if (pp && len == sizeof(u32))
539 width = *pp;
540
541 pp = of_get_property(dp, "linux,bootx-height", &len);
542 if (pp == NULL)
543 pp = of_get_property(dp, "height", &len);
544 if (pp && len == sizeof(u32))
545 height = *pp;
546
547 pp = of_get_property(dp, "linux,bootx-linebytes", &len);
548 if (pp == NULL)
549 pp = of_get_property(dp, "linebytes", &len);
550 if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
551 pitch = *pp;
552 else
553 pitch = width * ((depth + 7) / 8);
554
555 rsize = (unsigned long)pitch * (unsigned long)height;
556
557 /* Ok, now we try to figure out the address of the framebuffer.
558 *
559 * Unfortunately, Open Firmware doesn't provide a standard way to do
560 * so. All we can do is a dodgy heuristic that happens to work in
561 * practice. On most machines, the "address" property contains what
562 * we need, though not on Matrox cards found in IBM machines. What I've
563 * found that appears to give good results is to go through the PCI
564 * ranges and pick one that is both big enough and if possible encloses
565 * the "address" property. If none match, we pick the biggest
566 */
567 up = of_get_property(dp, "linux,bootx-addr", &len);
568 if (up == NULL)
569 up = of_get_property(dp, "address", &len);
570 if (up && len == sizeof(u32))
571 addr_prop = *up;
572
573 /* Hack for when BootX is passing us */
574 if (no_real_node)
575 goto skip_addr;
576
577 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
578 != NULL; i++) {
579 int match_addrp = 0;
580
581 if (!(flags & IORESOURCE_MEM))
582 continue;
583 if (asize < rsize)
584 continue;
585 rstart = of_translate_address(dp, addrp);
586 if (rstart == OF_BAD_ADDR)
587 continue;
588 if (addr_prop && (rstart <= addr_prop) &&
589 ((rstart + asize) >= (addr_prop + rsize)))
590 match_addrp = 1;
591 if (match_addrp) {
592 address = addr_prop;
593 break;
594 }
595 if (rsize > max_size) {
596 max_size = rsize;
597 address = OF_BAD_ADDR;
598 }
599
600 if (address == OF_BAD_ADDR)
601 address = rstart;
602 }
603 skip_addr:
604 if (address == OF_BAD_ADDR && addr_prop)
605 address = (u64)addr_prop;
606 if (address != OF_BAD_ADDR) {
607 /* kludge for valkyrie */
608 if (strcmp(dp->name, "valkyrie") == 0)
609 address += 0x1000;
610 offb_init_fb(no_real_node ? "bootx" : dp->name,
611 no_real_node ? "display" : dp->full_name,
612 width, height, depth, pitch, address,
613 foreign_endian, no_real_node ? NULL : dp);
614 }
615 }
616
617 static int __init offb_init(void)
618 {
619 struct device_node *dp = NULL, *boot_disp = NULL;
620
621 if (fb_get_options("offb", NULL))
622 return -ENODEV;
623
624 /* Check if we have a MacOS display without a node spec */
625 if (of_get_property(of_chosen, "linux,bootx-noscreen", NULL) != NULL) {
626 /* The old code tried to work out which node was the MacOS
627 * display based on the address. I'm dropping that since the
628 * lack of a node spec only happens with old BootX versions
629 * (users can update) and with this code, they'll still get
630 * a display (just not the palette hacks).
631 */
632 offb_init_nodriver(of_chosen, 1);
633 }
634
635 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
636 if (of_get_property(dp, "linux,opened", NULL) &&
637 of_get_property(dp, "linux,boot-display", NULL)) {
638 boot_disp = dp;
639 offb_init_nodriver(dp, 0);
640 }
641 }
642 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
643 if (of_get_property(dp, "linux,opened", NULL) &&
644 dp != boot_disp)
645 offb_init_nodriver(dp, 0);
646 }
647
648 return 0;
649 }
650
651
652 module_init(offb_init);
653 MODULE_LICENSE("GPL");
Linux with added FPC-III support