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pch_uart: reference clock on CM-iTC
[linux/fpc-iii.git] / drivers / tty / serial / altera_uart.c
blob3a573528555e5b98d694a50417228b82ddaaa4ef
1 /*
2 * altera_uart.c -- Altera UART driver
3 *
4 * Based on mcf.c -- Freescale ColdFire UART driver
5 *
6 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
7 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
8 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/timer.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/console.h>
22 #include <linux/tty.h>
23 #include <linux/tty_flip.h>
24 #include <linux/serial.h>
25 #include <linux/serial_core.h>
26 #include <linux/platform_device.h>
27 #include <linux/io.h>
28 #include <linux/altera_uart.h>
29
30 #define DRV_NAME "altera_uart"
31 #define SERIAL_ALTERA_MAJOR 204
32 #define SERIAL_ALTERA_MINOR 213
33
34 /*
35 * Altera UART register definitions according to the Nios UART datasheet:
36 * http://www.altera.com/literature/ds/ds_nios_uart.pdf
37 */
38
39 #define ALTERA_UART_SIZE 32
40
41 #define ALTERA_UART_RXDATA_REG 0
42 #define ALTERA_UART_TXDATA_REG 4
43 #define ALTERA_UART_STATUS_REG 8
44 #define ALTERA_UART_CONTROL_REG 12
45 #define ALTERA_UART_DIVISOR_REG 16
46 #define ALTERA_UART_EOP_REG 20
47
48 #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
49 #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
50 #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
51 #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
52 #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
53 #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
54 #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
55 #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
56 #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
57 #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
58 #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
59 #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
60
61 /* Enable interrupt on... */
62 #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
63 #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
64 #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
65 #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
66 #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
67 #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
68 #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
69 #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
70 #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
71
72 #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
73 #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
74 #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
75 #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
76
77 /*
78 * Local per-uart structure.
79 */
80 struct altera_uart {
81 struct uart_port port;
82 struct timer_list tmr;
83 unsigned int sigs; /* Local copy of line sigs */
84 unsigned short imr; /* Local IMR mirror */
85 };
86
87 static u32 altera_uart_readl(struct uart_port *port, int reg)
88 {
89 return readl(port->membase + (reg << port->regshift));
90 }
91
92 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
93 {
94 writel(dat, port->membase + (reg << port->regshift));
95 }
96
97 static unsigned int altera_uart_tx_empty(struct uart_port *port)
98 {
99 return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
100 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
101 }
102
103 static unsigned int altera_uart_get_mctrl(struct uart_port *port)
104 {
105 struct altera_uart *pp = container_of(port, struct altera_uart, port);
106 unsigned int sigs;
107
108 sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
109 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
110 sigs |= (pp->sigs & TIOCM_RTS);
111
112 return sigs;
113 }
114
115 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
116 {
117 struct altera_uart *pp = container_of(port, struct altera_uart, port);
118
119 pp->sigs = sigs;
120 if (sigs & TIOCM_RTS)
121 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
122 else
123 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
124 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
125 }
126
127 static void altera_uart_start_tx(struct uart_port *port)
128 {
129 struct altera_uart *pp = container_of(port, struct altera_uart, port);
130
131 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
132 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
133 }
134
135 static void altera_uart_stop_tx(struct uart_port *port)
136 {
137 struct altera_uart *pp = container_of(port, struct altera_uart, port);
138
139 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
140 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
141 }
142
143 static void altera_uart_stop_rx(struct uart_port *port)
144 {
145 struct altera_uart *pp = container_of(port, struct altera_uart, port);
146
147 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
148 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
149 }
150
151 static void altera_uart_break_ctl(struct uart_port *port, int break_state)
152 {
153 struct altera_uart *pp = container_of(port, struct altera_uart, port);
154 unsigned long flags;
155
156 spin_lock_irqsave(&port->lock, flags);
157 if (break_state == -1)
158 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
159 else
160 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
161 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
162 spin_unlock_irqrestore(&port->lock, flags);
163 }
164
165 static void altera_uart_enable_ms(struct uart_port *port)
166 {
167 }
168
169 static void altera_uart_set_termios(struct uart_port *port,
170 struct ktermios *termios,
171 struct ktermios *old)
172 {
173 unsigned long flags;
174 unsigned int baud, baudclk;
175
176 baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
177 baudclk = port->uartclk / baud;
178
179 if (old)
180 tty_termios_copy_hw(termios, old);
181 tty_termios_encode_baud_rate(termios, baud, baud);
182
183 spin_lock_irqsave(&port->lock, flags);
184 uart_update_timeout(port, termios->c_cflag, baud);
185 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
186 spin_unlock_irqrestore(&port->lock, flags);
187 }
188
189 static void altera_uart_rx_chars(struct altera_uart *pp)
190 {
191 struct uart_port *port = &pp->port;
192 unsigned char ch, flag;
193 unsigned short status;
194
195 while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
196 ALTERA_UART_STATUS_RRDY_MSK) {
197 ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
198 flag = TTY_NORMAL;
199 port->icount.rx++;
200
201 if (status & ALTERA_UART_STATUS_E_MSK) {
202 altera_uart_writel(port, status,
203 ALTERA_UART_STATUS_REG);
204
205 if (status & ALTERA_UART_STATUS_BRK_MSK) {
206 port->icount.brk++;
207 if (uart_handle_break(port))
208 continue;
209 } else if (status & ALTERA_UART_STATUS_PE_MSK) {
210 port->icount.parity++;
211 } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
212 port->icount.overrun++;
213 } else if (status & ALTERA_UART_STATUS_FE_MSK) {
214 port->icount.frame++;
215 }
216
217 status &= port->read_status_mask;
218
219 if (status & ALTERA_UART_STATUS_BRK_MSK)
220 flag = TTY_BREAK;
221 else if (status & ALTERA_UART_STATUS_PE_MSK)
222 flag = TTY_PARITY;
223 else if (status & ALTERA_UART_STATUS_FE_MSK)
224 flag = TTY_FRAME;
225 }
226
227 if (uart_handle_sysrq_char(port, ch))
228 continue;
229 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
230 flag);
231 }
232
233 tty_flip_buffer_push(port->state->port.tty);
234 }
235
236 static void altera_uart_tx_chars(struct altera_uart *pp)
237 {
238 struct uart_port *port = &pp->port;
239 struct circ_buf *xmit = &port->state->xmit;
240
241 if (port->x_char) {
242 /* Send special char - probably flow control */
243 altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
244 port->x_char = 0;
245 port->icount.tx++;
246 return;
247 }
248
249 while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
250 ALTERA_UART_STATUS_TRDY_MSK) {
251 if (xmit->head == xmit->tail)
252 break;
253 altera_uart_writel(port, xmit->buf[xmit->tail],
254 ALTERA_UART_TXDATA_REG);
255 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
256 port->icount.tx++;
257 }
258
259 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
260 uart_write_wakeup(port);
261
262 if (xmit->head == xmit->tail) {
263 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
264 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
265 }
266 }
267
268 static irqreturn_t altera_uart_interrupt(int irq, void *data)
269 {
270 struct uart_port *port = data;
271 struct altera_uart *pp = container_of(port, struct altera_uart, port);
272 unsigned int isr;
273
274 isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
275
276 spin_lock(&port->lock);
277 if (isr & ALTERA_UART_STATUS_RRDY_MSK)
278 altera_uart_rx_chars(pp);
279 if (isr & ALTERA_UART_STATUS_TRDY_MSK)
280 altera_uart_tx_chars(pp);
281 spin_unlock(&port->lock);
282
283 return IRQ_RETVAL(isr);
284 }
285
286 static void altera_uart_timer(unsigned long data)
287 {
288 struct uart_port *port = (void *)data;
289 struct altera_uart *pp = container_of(port, struct altera_uart, port);
290
291 altera_uart_interrupt(0, port);
292 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
293 }
294
295 static void altera_uart_config_port(struct uart_port *port, int flags)
296 {
297 port->type = PORT_ALTERA_UART;
298
299 /* Clear mask, so no surprise interrupts. */
300 altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
301 /* Clear status register */
302 altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
303 }
304
305 static int altera_uart_startup(struct uart_port *port)
306 {
307 struct altera_uart *pp = container_of(port, struct altera_uart, port);
308 unsigned long flags;
309 int ret;
310
311 if (!port->irq) {
312 setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port);
313 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
314 return 0;
315 }
316
317 ret = request_irq(port->irq, altera_uart_interrupt, IRQF_DISABLED,
318 DRV_NAME, port);
319 if (ret) {
320 pr_err(DRV_NAME ": unable to attach Altera UART %d "
321 "interrupt vector=%d\n", port->line, port->irq);
322 return ret;
323 }
324
325 spin_lock_irqsave(&port->lock, flags);
326
327 /* Enable RX interrupts now */
328 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
329 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
330
331 spin_unlock_irqrestore(&port->lock, flags);
332
333 return 0;
334 }
335
336 static void altera_uart_shutdown(struct uart_port *port)
337 {
338 struct altera_uart *pp = container_of(port, struct altera_uart, port);
339 unsigned long flags;
340
341 spin_lock_irqsave(&port->lock, flags);
342
343 /* Disable all interrupts now */
344 pp->imr = 0;
345 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
346
347 spin_unlock_irqrestore(&port->lock, flags);
348
349 if (port->irq)
350 free_irq(port->irq, port);
351 else
352 del_timer_sync(&pp->tmr);
353 }
354
355 static const char *altera_uart_type(struct uart_port *port)
356 {
357 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
358 }
359
360 static int altera_uart_request_port(struct uart_port *port)
361 {
362 /* UARTs always present */
363 return 0;
364 }
365
366 static void altera_uart_release_port(struct uart_port *port)
367 {
368 /* Nothing to release... */
369 }
370
371 static int altera_uart_verify_port(struct uart_port *port,
372 struct serial_struct *ser)
373 {
374 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
375 return -EINVAL;
376 return 0;
377 }
378
379 /*
380 * Define the basic serial functions we support.
381 */
382 static struct uart_ops altera_uart_ops = {
383 .tx_empty = altera_uart_tx_empty,
384 .get_mctrl = altera_uart_get_mctrl,
385 .set_mctrl = altera_uart_set_mctrl,
386 .start_tx = altera_uart_start_tx,
387 .stop_tx = altera_uart_stop_tx,
388 .stop_rx = altera_uart_stop_rx,
389 .enable_ms = altera_uart_enable_ms,
390 .break_ctl = altera_uart_break_ctl,
391 .startup = altera_uart_startup,
392 .shutdown = altera_uart_shutdown,
393 .set_termios = altera_uart_set_termios,
394 .type = altera_uart_type,
395 .request_port = altera_uart_request_port,
396 .release_port = altera_uart_release_port,
397 .config_port = altera_uart_config_port,
398 .verify_port = altera_uart_verify_port,
399 };
400
401 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
402
403 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
404
405 int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
406 {
407 struct uart_port *port;
408 int i;
409
410 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
411 port = &altera_uart_ports[i].port;
412
413 port->line = i;
414 port->type = PORT_ALTERA_UART;
415 port->mapbase = platp[i].mapbase;
416 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
417 port->iotype = SERIAL_IO_MEM;
418 port->irq = platp[i].irq;
419 port->uartclk = platp[i].uartclk;
420 port->flags = UPF_BOOT_AUTOCONF;
421 port->ops = &altera_uart_ops;
422 port->private_data = platp;
423 }
424
425 return 0;
426 }
427
428 static void altera_uart_console_putc(struct uart_port *port, const char c)
429 {
430 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
431 ALTERA_UART_STATUS_TRDY_MSK))
432 cpu_relax();
433
434 writel(c, port->membase + ALTERA_UART_TXDATA_REG);
435 }
436
437 static void altera_uart_console_write(struct console *co, const char *s,
438 unsigned int count)
439 {
440 struct uart_port *port = &(altera_uart_ports + co->index)->port;
441
442 for (; count; count--, s++) {
443 altera_uart_console_putc(port, *s);
444 if (*s == '\n')
445 altera_uart_console_putc(port, '\r');
446 }
447 }
448
449 static int __init altera_uart_console_setup(struct console *co, char *options)
450 {
451 struct uart_port *port;
452 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
453 int bits = 8;
454 int parity = 'n';
455 int flow = 'n';
456
457 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
458 return -EINVAL;
459 port = &altera_uart_ports[co->index].port;
460 if (!port->membase)
461 return -ENODEV;
462
463 if (options)
464 uart_parse_options(options, &baud, &parity, &bits, &flow);
465
466 return uart_set_options(port, co, baud, parity, bits, flow);
467 }
468
469 static struct uart_driver altera_uart_driver;
470
471 static struct console altera_uart_console = {
472 .name = "ttyAL",
473 .write = altera_uart_console_write,
474 .device = uart_console_device,
475 .setup = altera_uart_console_setup,
476 .flags = CON_PRINTBUFFER,
477 .index = -1,
478 .data = &altera_uart_driver,
479 };
480
481 static int __init altera_uart_console_init(void)
482 {
483 register_console(&altera_uart_console);
484 return 0;
485 }
486
487 console_initcall(altera_uart_console_init);
488
489 #define ALTERA_UART_CONSOLE (&altera_uart_console)
490
491 #else
492
493 #define ALTERA_UART_CONSOLE NULL
494
495 #endif /* CONFIG_ALTERA_UART_CONSOLE */
496
497 /*
498 * Define the altera_uart UART driver structure.
499 */
500 static struct uart_driver altera_uart_driver = {
501 .owner = THIS_MODULE,
502 .driver_name = DRV_NAME,
503 .dev_name = "ttyAL",
504 .major = SERIAL_ALTERA_MAJOR,
505 .minor = SERIAL_ALTERA_MINOR,
506 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
507 .cons = ALTERA_UART_CONSOLE,
508 };
509
510 static int __devinit altera_uart_probe(struct platform_device *pdev)
511 {
512 struct altera_uart_platform_uart *platp = pdev->dev.platform_data;
513 struct uart_port *port;
514 struct resource *res_mem;
515 struct resource *res_irq;
516 int i = pdev->id;
517
518 /* -1 emphasizes that the platform must have one port, no .N suffix */
519 if (i == -1)
520 i = 0;
521
522 if (i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
523 return -EINVAL;
524
525 port = &altera_uart_ports[i].port;
526
527 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
528 if (res_mem)
529 port->mapbase = res_mem->start;
530 else if (platp->mapbase)
531 port->mapbase = platp->mapbase;
532 else
533 return -EINVAL;
534
535 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
536 if (res_irq)
537 port->irq = res_irq->start;
538 else if (platp->irq)
539 port->irq = platp->irq;
540
541 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
542 if (!port->membase)
543 return -ENOMEM;
544
545 if (platp)
546 port->regshift = platp->bus_shift;
547 else
548 port->regshift = 0;
549
550 port->line = i;
551 port->type = PORT_ALTERA_UART;
552 port->iotype = SERIAL_IO_MEM;
553 port->uartclk = platp->uartclk;
554 port->ops = &altera_uart_ops;
555 port->flags = UPF_BOOT_AUTOCONF;
556
557 uart_add_one_port(&altera_uart_driver, port);
558
559 return 0;
560 }
561
562 static int __devexit altera_uart_remove(struct platform_device *pdev)
563 {
564 struct uart_port *port;
565 int i = pdev->id;
566
567 if (i == -1)
568 i = 0;
569
570 port = &altera_uart_ports[i].port;
571 uart_remove_one_port(&altera_uart_driver, port);
572
573 return 0;
574 }
575
576 static struct platform_driver altera_uart_platform_driver = {
577 .probe = altera_uart_probe,
578 .remove = __devexit_p(altera_uart_remove),
579 .driver = {
580 .name = DRV_NAME,
581 .owner = THIS_MODULE,
582 .pm = NULL,
583 },
584 };
585
586 static int __init altera_uart_init(void)
587 {
588 int rc;
589
590 rc = uart_register_driver(&altera_uart_driver);
591 if (rc)
592 return rc;
593 rc = platform_driver_register(&altera_uart_platform_driver);
594 if (rc) {
595 uart_unregister_driver(&altera_uart_driver);
596 return rc;
597 }
598 return 0;
599 }
600
601 static void __exit altera_uart_exit(void)
602 {
603 platform_driver_unregister(&altera_uart_platform_driver);
604 uart_unregister_driver(&altera_uart_driver);
605 }
606
607 module_init(altera_uart_init);
608 module_exit(altera_uart_exit);
609
610 MODULE_DESCRIPTION("Altera UART driver");
611 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
612 MODULE_LICENSE("GPL");
613 MODULE_ALIAS("platform:" DRV_NAME);
614 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);
Linux with added FPC-III support