include/drm/drm_dsc.h

   1 /* SPDX-License-Identifier: MIT
   2  * Copyright (C) 2018 Intel Corp.
   3  *
   4  * Authors:
   5  * Manasi Navare <manasi.d.navare@intel.com>
   6  */
   7
   8 #ifndef DRM_DSC_H_
   9 #define DRM_DSC_H_
  10
  11 #include <drm/drm_dp_helper.h>
  12
  13 /* VESA Display Stream Compression DSC 1.2 constants */
  14 #define DSC_NUM_BUF_RANGES                      15
  15 #define DSC_MUX_WORD_SIZE_8_10_BPC              48
  16 #define DSC_MUX_WORD_SIZE_12_BPC                64
  17 #define DSC_RC_PIXELS_PER_GROUP                 3
  18 #define DSC_SCALE_DECREMENT_INTERVAL_MAX        4095
  19 #define DSC_RANGE_BPG_OFFSET_MASK               0x3f
  20
  21 /* DSC Rate Control Constants */
  22 #define DSC_RC_MODEL_SIZE_CONST             8192
  23 #define DSC_RC_EDGE_FACTOR_CONST            6
  24 #define DSC_RC_TGT_OFFSET_HI_CONST          3
  25 #define DSC_RC_TGT_OFFSET_LO_CONST          3
  26
  27 /* DSC PPS constants and macros */
  28 #define DSC_PPS_VERSION_MAJOR_SHIFT             4
  29 #define DSC_PPS_BPC_SHIFT                       4
  30 #define DSC_PPS_MSB_SHIFT                       8
  31 #define DSC_PPS_LSB_MASK                        (0xFF << 0)
  32 #define DSC_PPS_BPP_HIGH_MASK                   (0x3 << 8)
  33 #define DSC_PPS_VBR_EN_SHIFT                    2
  34 #define DSC_PPS_SIMPLE422_SHIFT                 3
  35 #define DSC_PPS_CONVERT_RGB_SHIFT               4
  36 #define DSC_PPS_BLOCK_PRED_EN_SHIFT             5
  37 #define DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK       (0x3 << 8)
  38 #define DSC_PPS_SCALE_DEC_INT_HIGH_MASK         (0xF << 8)
  39 #define DSC_PPS_RC_TGT_OFFSET_HI_SHIFT          4
  40 #define DSC_PPS_RC_RANGE_MINQP_SHIFT            11
  41 #define DSC_PPS_RC_RANGE_MAXQP_SHIFT            6
  42 #define DSC_PPS_NATIVE_420_SHIFT                1
  43 #define DSC_1_2_MAX_LINEBUF_DEPTH_BITS          16
  44 #define DSC_1_2_MAX_LINEBUF_DEPTH_VAL           0
  45 #define DSC_1_1_MAX_LINEBUF_DEPTH_BITS          13
  46
  47 /**
  48  * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
  49  *
  50  * This defines different rate control parameters used by the DSC engine
  51  * to compress the frame.
  52  */
  53 struct drm_dsc_rc_range_parameters {
  54         /**
  55          * @range_min_qp: Min Quantization Parameters allowed for this range
  56          */
  57         u8 range_min_qp;
  58         /**
  59          * @range_max_qp: Max Quantization Parameters allowed for this range
  60          */
  61         u8 range_max_qp;
  62         /**
  63          * @range_bpg_offset:
  64          * Bits/group offset to apply to target for this group
  65          */
  66         u8 range_bpg_offset;
  67 };
  68
  69 /**
  70  * struct drm_dsc_config - Parameters required to configure DSC
  71  *
  72  * Driver populates this structure with all the parameters required
  73  * to configure the display stream compression on the source.
  74  */
  75 struct drm_dsc_config {
  76         /**
  77          * @line_buf_depth:
  78          * Bits per component for previous reconstructed line buffer
  79          */
  80         u8 line_buf_depth;
  81         /**
  82          * @bits_per_component: Bits per component to code (8/10/12)
  83          */
  84         u8 bits_per_component;
  85         /**
  86          * @convert_rgb:
  87          * Flag to indicate if RGB - YCoCg conversion is needed
  88          * True if RGB input, False if YCoCg input
  89          */
  90         bool convert_rgb;
  91         /**
  92          * @slice_count: Number fo slices per line used by the DSC encoder
  93          */
  94         u8 slice_count;
  95         /**
  96          *  @slice_width: Width of each slice in pixels
  97          */
  98         u16 slice_width;
  99         /**
 100          * @slice_height: Slice height in pixels
 101          */
 102         u16 slice_height;
 103         /**
 104          * @simple_422: True if simple 4_2_2 mode is enabled else False
 105          */
 106         bool simple_422;
 107         /**
 108          * @pic_width: Width of the input display frame in pixels
 109          */
 110         u16 pic_width;
 111         /**
 112          * @pic_height: Vertical height of the input display frame
 113          */
 114         u16 pic_height;
 115         /**
 116          * @rc_tgt_offset_high:
 117          * Offset to bits/group used by RC to determine QP adjustment
 118          */
 119         u8 rc_tgt_offset_high;
 120         /**
 121          * @rc_tgt_offset_low:
 122          * Offset to bits/group used by RC to determine QP adjustment
 123          */
 124         u8 rc_tgt_offset_low;
 125         /**
 126          * @bits_per_pixel:
 127          * Target bits per pixel with 4 fractional bits, bits_per_pixel << 4
 128          */
 129         u16 bits_per_pixel;
 130         /**
 131          * @rc_edge_factor:
 132          * Factor to determine if an edge is present based on the bits produced
 133          */
 134         u8 rc_edge_factor;
 135         /**
 136          * @rc_quant_incr_limit1:
 137          * Slow down incrementing once the range reaches this value
 138          */
 139         u8 rc_quant_incr_limit1;
 140         /**
 141          * @rc_quant_incr_limit0:
 142          * Slow down incrementing once the range reaches this value
 143          */
 144         u8 rc_quant_incr_limit0;
 145         /**
 146          * @initial_xmit_delay:
 147          * Number of pixels to delay the initial transmission
 148          */
 149         u16 initial_xmit_delay;
 150         /**
 151          * @initial_dec_delay:
 152          * Initial decoder delay, number of pixel times that the decoder
 153          * accumulates data in its rate buffer before starting to decode
 154          * and output pixels.
 155          */
 156         u16  initial_dec_delay;
 157         /**
 158          * @block_pred_enable:
 159          * True if block prediction is used to code any groups within the
 160          * picture. False if BP not used
 161          */
 162         bool block_pred_enable;
 163         /**
 164          * @first_line_bpg_offset:
 165          * Number of additional bits allocated for each group on the first
 166          * line of slice.
 167          */
 168         u8 first_line_bpg_offset;
 169         /**
 170          * @initial_offset: Value to use for RC model offset at slice start
 171          */
 172         u16 initial_offset;
 173         /**
 174          * @rc_buf_thresh: Thresholds defining each of the buffer ranges
 175          */
 176         u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
 177         /**
 178          * @rc_range_params:
 179          * Parameters for each of the RC ranges defined in
 180          * &struct drm_dsc_rc_range_parameters
 181          */
 182         struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES];
 183         /**
 184          * @rc_model_size: Total size of RC model
 185          */
 186         u16 rc_model_size;
 187         /**
 188          * @flatness_min_qp: Minimum QP where flatness information is sent
 189          */
 190         u8 flatness_min_qp;
 191         /**
 192          * @flatness_max_qp: Maximum QP where flatness information is sent
 193          */
 194         u8 flatness_max_qp;
 195         /**
 196          * @initial_scale_value: Initial value for the scale factor
 197          */
 198         u8 initial_scale_value;
 199         /**
 200          * @scale_decrement_interval:
 201          * Specifies number of group times between decrementing the scale factor
 202          * at beginning of a slice.
 203          */
 204         u16 scale_decrement_interval;
 205         /**
 206          * @scale_increment_interval:
 207          * Number of group times between incrementing the scale factor value
 208          * used at the beginning of a slice.
 209          */
 210         u16 scale_increment_interval;
 211         /**
 212          * @nfl_bpg_offset: Non first line BPG offset to be used
 213          */
 214         u16 nfl_bpg_offset;
 215         /**
 216          * @slice_bpg_offset: BPG offset used to enforce slice bit
 217          */
 218         u16 slice_bpg_offset;
 219         /**
 220          * @final_offset: Final RC linear transformation offset value
 221          */
 222         u16 final_offset;
 223         /**
 224          * @vbr_enable: True if VBR mode is enabled, false if disabled
 225          */
 226         bool vbr_enable;
 227         /**
 228          * @mux_word_size: Mux word size (in bits) for SSM mode
 229          */
 230         u8 mux_word_size;
 231         /**
 232          * @slice_chunk_size:
 233          * The (max) size in bytes of the "chunks" that are used in slice
 234          * multiplexing.
 235          */
 236         u16 slice_chunk_size;
 237         /**
 238          * @rc_bits: Rate control buffer size in bits
 239          */
 240         u16 rc_bits;
 241         /**
 242          * @dsc_version_minor: DSC minor version
 243          */
 244         u8 dsc_version_minor;
 245         /**
 246          * @dsc_version_major: DSC major version
 247          */
 248         u8 dsc_version_major;
 249         /**
 250          * @native_422: True if Native 4:2:2 supported, else false
 251          */
 252         bool native_422;
 253         /**
 254          * @native_420: True if Native 4:2:0 supported else false.
 255          */
 256         bool native_420;
 257         /**
 258          * @second_line_bpg_offset:
 259          * Additional bits/grp for seconnd line of slice for native 4:2:0
 260          */
 261         u8 second_line_bpg_offset;
 262         /**
 263          * @nsl_bpg_offset:
 264          * Num of bits deallocated for each grp that is not in second line of
 265          * slice
 266          */
 267         u16 nsl_bpg_offset;
 268         /**
 269          * @second_line_offset_adj:
 270          * Offset adjustment for second line in Native 4:2:0 mode
 271          */
 272         u16 second_line_offset_adj;
 273 };
 274
 275 /**
 276  * struct picture_parameter_set - Represents 128 bytes of Picture Parameter Set
 277  *
 278  * The VESA DSC standard defines picture parameter set (PPS) which display
 279  * stream compression encoders must communicate to decoders.
 280  * The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in
 281  * this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2.
 282  * The PPS fields that span over more than a byte should be stored in Big Endian
 283  * format.
 284  */
 285 struct drm_dsc_picture_parameter_set {
 286         /**
 287          * @dsc_version:
 288          * PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC
 289          * PPS0[7:4] - dsc_version_major: Contains major version of DSC
 290          */
 291         u8 dsc_version;
 292         /**
 293          * @pps_identifier:
 294          * PPS1[7:0] - Application specific identifier that can be
 295          * used to differentiate between different PPS tables.
 296          */
 297         u8 pps_identifier;
 298         /**
 299          * @pps_reserved:
 300          * PPS2[7:0]- RESERVED Byte
 301          */
 302         u8 pps_reserved;
 303         /**
 304          * @pps_3:
 305          * PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to
 306          * generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits,
 307          * 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits,
 308          * 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2.
 309          * PPS3[7:4] - bits_per_component: Bits per component for the original
 310          * pixels of the encoded picture.
 311          * 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2)
 312          * 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also
 313          * allowed only when dsc_minor_version = 0x2)
 314          */
 315         u8 pps_3;
 316         /**
 317          * @pps_4:
 318          * PPS4[1:0] -These are the most significant 2 bits of
 319          * compressed BPP bits_per_pixel[9:0] syntax element.
 320          * PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled
 321          * PPS4[3] - simple_422: Indicates if decoder drops samples to
 322          * reconstruct the 4:2:2 picture.
 323          * PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is
 324          * active.
 325          * PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any
 326          * groups in picture
 327          * PPS4[7:6] - Reseved bits
 328          */
 329         u8 pps_4;
 330         /**
 331          * @bits_per_pixel_low:
 332          * PPS5[7:0] - This indicates the lower significant 8 bits of
 333          * the compressed BPP bits_per_pixel[9:0] element.
 334          */
 335         u8 bits_per_pixel_low;
 336         /**
 337          * @pic_height:
 338          * PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows
 339          * within the raster.
 340          */
 341         __be16 pic_height;
 342         /**
 343          * @pic_width:
 344          * PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within
 345          * the raster.
 346          */
 347         __be16 pic_width;
 348         /**
 349          * @slice_height:
 350          * PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.
 351          */
 352         __be16 slice_height;
 353         /**
 354          * @slice_width:
 355          * PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.
 356          */
 357         __be16 slice_width;
 358         /**
 359          * @chunk_size:
 360          * PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks
 361          * that are used for slice multiplexing.
 362          */
 363         __be16 chunk_size;
 364         /**
 365          * @initial_xmit_delay_high:
 366          * PPS16[1:0] - Most Significant two bits of initial transmission delay.
 367          * It specifies the number of pixel times that the encoder waits before
 368          * transmitting data from its rate buffer.
 369          * PPS16[7:2] - Reserved
 370          */
 371         u8 initial_xmit_delay_high;
 372         /**
 373          * @initial_xmit_delay_low:
 374          * PPS17[7:0] - Least significant 8 bits of initial transmission delay.
 375          */
 376         u8 initial_xmit_delay_low;
 377         /**
 378          * @initial_dec_delay:
 379          *
 380          * PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number
 381          * of pixel times that the decoder accumulates data in its rate buffer
 382          * before starting to decode and output pixels.
 383          */
 384         __be16 initial_dec_delay;
 385         /**
 386          * @pps20_reserved:
 387          *
 388          * PPS20[7:0] - Reserved
 389          */
 390         u8 pps20_reserved;
 391         /**
 392          * @initial_scale_value:
 393          * PPS21[5:0] - Initial rcXformScale factor used at beginning
 394          * of a slice.
 395          * PPS21[7:6] - Reserved
 396          */
 397         u8 initial_scale_value;
 398         /**
 399          * @scale_increment_interval:
 400          * PPS22[7:0], PPS23[7:0] - Number of group times between incrementing
 401          * the rcXformScale factor at end of a slice.
 402          */
 403         __be16 scale_increment_interval;
 404         /**
 405          * @scale_decrement_interval_high:
 406          * PPS24[3:0] - Higher 4 bits indicating number of group times between
 407          * decrementing the rcXformScale factor at beginning of a slice.
 408          * PPS24[7:4] - Reserved
 409          */
 410         u8 scale_decrement_interval_high;
 411         /**
 412          * @scale_decrement_interval_low:
 413          * PPS25[7:0] - Lower 8 bits of scale decrement interval
 414          */
 415         u8 scale_decrement_interval_low;
 416         /**
 417          * @pps26_reserved:
 418          * PPS26[7:0]
 419          */
 420         u8 pps26_reserved;
 421         /**
 422          * @first_line_bpg_offset:
 423          * PPS27[4:0] - Number of additional bits that are allocated
 424          * for each group on first line of a slice.
 425          * PPS27[7:5] - Reserved
 426          */
 427         u8 first_line_bpg_offset;
 428         /**
 429          * @nfl_bpg_offset:
 430          * PPS28[7:0], PPS29[7:0] - Number of bits including frac bits
 431          * deallocated for each group for groups after the first line of slice.
 432          */
 433         __be16 nfl_bpg_offset;
 434         /**
 435          * @slice_bpg_offset:
 436          * PPS30, PPS31[7:0] - Number of bits that are deallocated for each
 437          * group to enforce the slice constraint.
 438          */
 439         __be16 slice_bpg_offset;
 440         /**
 441          * @initial_offset:
 442          * PPS32,33[7:0] - Initial value for rcXformOffset
 443          */
 444         __be16 initial_offset;
 445         /**
 446          * @final_offset:
 447          * PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset
 448          */
 449         __be16 final_offset;
 450         /**
 451          * @flatness_min_qp:
 452          * PPS36[4:0] - Minimum QP at which flatness is signaled and
 453          * flatness QP adjustment is made.
 454          * PPS36[7:5] - Reserved
 455          */
 456         u8 flatness_min_qp;
 457         /**
 458          * @flatness_max_qp:
 459          * PPS37[4:0] - Max QP at which flatness is signalled and
 460          * the flatness adjustment is made.
 461          * PPS37[7:5] - Reserved
 462          */
 463         u8 flatness_max_qp;
 464         /**
 465          * @rc_model_size:
 466          * PPS38,39[7:0] - Number of bits within RC Model.
 467          */
 468         __be16 rc_model_size;
 469         /**
 470          * @rc_edge_factor:
 471          * PPS40[3:0] - Ratio of current activity vs, previous
 472          * activity to determine presence of edge.
 473          * PPS40[7:4] - Reserved
 474          */
 475         u8 rc_edge_factor;
 476         /**
 477          * @rc_quant_incr_limit0:
 478          * PPS41[4:0] - QP threshold used in short term RC
 479          * PPS41[7:5] - Reserved
 480          */
 481         u8 rc_quant_incr_limit0;
 482         /**
 483          * @rc_quant_incr_limit1:
 484          * PPS42[4:0] - QP threshold used in short term RC
 485          * PPS42[7:5] - Reserved
 486          */
 487         u8 rc_quant_incr_limit1;
 488         /**
 489          * @rc_tgt_offset:
 490          * PPS43[3:0] - Lower end of the variability range around the target
 491          * bits per group that is allowed by short term RC.
 492          * PPS43[7:4]- Upper end of the variability range around the target
 493          * bits per group that i allowed by short term rc.
 494          */
 495         u8 rc_tgt_offset;
 496         /**
 497          * @rc_buf_thresh:
 498          * PPS44[7:0] - PPS57[7:0] - Specifies the thresholds in RC model for
 499          * the 15 ranges defined by 14 thresholds.
 500          */
 501         u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
 502         /**
 503          * @rc_range_parameters:
 504          * PPS58[7:0] - PPS87[7:0]
 505          * Parameters that correspond to each of the 15 ranges.
 506          */
 507         __be16 rc_range_parameters[DSC_NUM_BUF_RANGES];
 508         /**
 509          * @native_422_420:
 510          * PPS88[0] - 0 = Native 4:2:2 not used
 511          * 1 = Native 4:2:2 used
 512          * PPS88[1] - 0 = Native 4:2:0 not use
 513          * 1 = Native 4:2:0 used
 514          * PPS88[7:2] - Reserved 6 bits
 515          */
 516         u8 native_422_420;
 517         /**
 518          * @second_line_bpg_offset:
 519          * PPS89[4:0] - Additional bits/group budget for the
 520          * second line of a slice in Native 4:2:0 mode.
 521          * Set to 0 if DSC minor version is 1 or native420 is 0.
 522          * PPS89[7:5] - Reserved
 523          */
 524         u8 second_line_bpg_offset;
 525         /**
 526          * @nsl_bpg_offset:
 527          * PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated
 528          * for each group that is not in the second line of a slice.
 529          */
 530         __be16 nsl_bpg_offset;
 531         /**
 532          * @second_line_offset_adj:
 533          * PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second
 534          * line in Native 4:2:0 mode.
 535          */
 536         __be16 second_line_offset_adj;
 537         /**
 538          * @pps_long_94_reserved:
 539          * PPS 94, 95, 96, 97 - Reserved
 540          */
 541         u32 pps_long_94_reserved;
 542         /**
 543          * @pps_long_98_reserved:
 544          * PPS 98, 99, 100, 101 - Reserved
 545          */
 546         u32 pps_long_98_reserved;
 547         /**
 548          * @pps_long_102_reserved:
 549          * PPS 102, 103, 104, 105 - Reserved
 550          */
 551         u32 pps_long_102_reserved;
 552         /**
 553          * @pps_long_106_reserved:
 554          * PPS 106, 107, 108, 109 - reserved
 555          */
 556         u32 pps_long_106_reserved;
 557         /**
 558          * @pps_long_110_reserved:
 559          * PPS 110, 111, 112, 113 - reserved
 560          */
 561         u32 pps_long_110_reserved;
 562         /**
 563          * @pps_long_114_reserved:
 564          * PPS 114 - 117 - reserved
 565          */
 566         u32 pps_long_114_reserved;
 567         /**
 568          * @pps_long_118_reserved:
 569          * PPS 118 - 121 - reserved
 570          */
 571         u32 pps_long_118_reserved;
 572         /**
 573          * @pps_long_122_reserved:
 574          * PPS 122- 125 - reserved
 575          */
 576         u32 pps_long_122_reserved;
 577         /**
 578          * @pps_short_126_reserved:
 579          * PPS 126, 127 - reserved
 580          */
 581         __be16 pps_short_126_reserved;
 582 } __packed;
 583
 584 /**
 585  * struct drm_dsc_pps_infoframe - DSC infoframe carrying the Picture Parameter
 586  * Set Metadata
 587  *
 588  * This structure represents the DSC PPS infoframe required to send the Picture
 589  * Parameter Set metadata required before enabling VESA Display Stream
 590  * Compression. This is based on the DP Secondary Data Packet structure and
 591  * comprises of SDP Header as defined &struct struct dp_sdp_header in drm_dp_helper.h
 592  * and PPS payload defined in &struct drm_dsc_picture_parameter_set.
 593  *
 594  * @pps_header: Header for PPS as per DP SDP header format of type
 595  *              &struct dp_sdp_header
 596  * @pps_payload: PPS payload fields as per DSC specification Table 4-1
 597  *               as represented in &struct drm_dsc_picture_parameter_set
 598  */
 599 struct drm_dsc_pps_infoframe {
 600         struct dp_sdp_header pps_header;
 601         struct drm_dsc_picture_parameter_set pps_payload;
 602 } __packed;
 603
 604 void drm_dsc_dp_pps_header_init(struct dp_sdp_header *pps_header);
 605 void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_sdp,
 606                                 const struct drm_dsc_config *dsc_cfg);
 607 int drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg);
 608
 609 #endif /* _DRM_DSC_H_ */