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drm: powerpc can use a simpler drm_io_prot()
[linux/fpc-iii.git] / drivers / gpu / drm / exynos / exynos_drm_g2d.c
blobdf7a77d3eff84b769342f04114a31a040a843769
1 /*
2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundationr
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/clk.h>
12 #include <linux/err.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/slab.h>
18 #include <linux/workqueue.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-attrs.h>
21 #include <linux/of.h>
22
23 #include <drm/drmP.h>
24 #include <drm/exynos_drm.h>
25 #include "exynos_drm_drv.h"
26 #include "exynos_drm_g2d.h"
27 #include "exynos_drm_gem.h"
28 #include "exynos_drm_iommu.h"
29
30 #define G2D_HW_MAJOR_VER 4
31 #define G2D_HW_MINOR_VER 1
32
33 /* vaild register range set from user: 0x0104 ~ 0x0880 */
34 #define G2D_VALID_START 0x0104
35 #define G2D_VALID_END 0x0880
36
37 /* general registers */
38 #define G2D_SOFT_RESET 0x0000
39 #define G2D_INTEN 0x0004
40 #define G2D_INTC_PEND 0x000C
41 #define G2D_DMA_SFR_BASE_ADDR 0x0080
42 #define G2D_DMA_COMMAND 0x0084
43 #define G2D_DMA_STATUS 0x008C
44 #define G2D_DMA_HOLD_CMD 0x0090
45
46 /* command registers */
47 #define G2D_BITBLT_START 0x0100
48
49 /* registers for base address */
50 #define G2D_SRC_BASE_ADDR 0x0304
51 #define G2D_SRC_COLOR_MODE 0x030C
52 #define G2D_SRC_LEFT_TOP 0x0310
53 #define G2D_SRC_RIGHT_BOTTOM 0x0314
54 #define G2D_SRC_PLANE2_BASE_ADDR 0x0318
55 #define G2D_DST_BASE_ADDR 0x0404
56 #define G2D_DST_COLOR_MODE 0x040C
57 #define G2D_DST_LEFT_TOP 0x0410
58 #define G2D_DST_RIGHT_BOTTOM 0x0414
59 #define G2D_DST_PLANE2_BASE_ADDR 0x0418
60 #define G2D_PAT_BASE_ADDR 0x0500
61 #define G2D_MSK_BASE_ADDR 0x0520
62
63 /* G2D_SOFT_RESET */
64 #define G2D_SFRCLEAR (1 << 1)
65 #define G2D_R (1 << 0)
66
67 /* G2D_INTEN */
68 #define G2D_INTEN_ACF (1 << 3)
69 #define G2D_INTEN_UCF (1 << 2)
70 #define G2D_INTEN_GCF (1 << 1)
71 #define G2D_INTEN_SCF (1 << 0)
72
73 /* G2D_INTC_PEND */
74 #define G2D_INTP_ACMD_FIN (1 << 3)
75 #define G2D_INTP_UCMD_FIN (1 << 2)
76 #define G2D_INTP_GCMD_FIN (1 << 1)
77 #define G2D_INTP_SCMD_FIN (1 << 0)
78
79 /* G2D_DMA_COMMAND */
80 #define G2D_DMA_HALT (1 << 2)
81 #define G2D_DMA_CONTINUE (1 << 1)
82 #define G2D_DMA_START (1 << 0)
83
84 /* G2D_DMA_STATUS */
85 #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17)
86 #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1)
87 #define G2D_DMA_DONE (1 << 0)
88 #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
89
90 /* G2D_DMA_HOLD_CMD */
91 #define G2D_USER_HOLD (1 << 2)
92 #define G2D_LIST_HOLD (1 << 1)
93 #define G2D_BITBLT_HOLD (1 << 0)
94
95 /* G2D_BITBLT_START */
96 #define G2D_START_CASESEL (1 << 2)
97 #define G2D_START_NHOLT (1 << 1)
98 #define G2D_START_BITBLT (1 << 0)
99
100 /* buffer color format */
101 #define G2D_FMT_XRGB8888 0
102 #define G2D_FMT_ARGB8888 1
103 #define G2D_FMT_RGB565 2
104 #define G2D_FMT_XRGB1555 3
105 #define G2D_FMT_ARGB1555 4
106 #define G2D_FMT_XRGB4444 5
107 #define G2D_FMT_ARGB4444 6
108 #define G2D_FMT_PACKED_RGB888 7
109 #define G2D_FMT_A8 11
110 #define G2D_FMT_L8 12
111
112 /* buffer valid length */
113 #define G2D_LEN_MIN 1
114 #define G2D_LEN_MAX 8000
115
116 #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
117 #define G2D_CMDLIST_NUM 64
118 #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
119 #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
120
121 /* maximum buffer pool size of userptr is 64MB as default */
122 #define MAX_POOL (64 * 1024 * 1024)
123
124 enum {
125 BUF_TYPE_GEM = 1,
126 BUF_TYPE_USERPTR,
127 };
128
129 enum g2d_reg_type {
130 REG_TYPE_NONE = -1,
131 REG_TYPE_SRC,
132 REG_TYPE_SRC_PLANE2,
133 REG_TYPE_DST,
134 REG_TYPE_DST_PLANE2,
135 REG_TYPE_PAT,
136 REG_TYPE_MSK,
137 MAX_REG_TYPE_NR
138 };
139
140 /* cmdlist data structure */
141 struct g2d_cmdlist {
142 u32 head;
143 unsigned long data[G2D_CMDLIST_DATA_NUM];
144 u32 last; /* last data offset */
145 };
146
147 /*
148 * A structure of buffer description
149 *
150 * @format: color format
151 * @left_x: the x coordinates of left top corner
152 * @top_y: the y coordinates of left top corner
153 * @right_x: the x coordinates of right bottom corner
154 * @bottom_y: the y coordinates of right bottom corner
155 *
156 */
157 struct g2d_buf_desc {
158 unsigned int format;
159 unsigned int left_x;
160 unsigned int top_y;
161 unsigned int right_x;
162 unsigned int bottom_y;
163 };
164
165 /*
166 * A structure of buffer information
167 *
168 * @map_nr: manages the number of mapped buffers
169 * @reg_types: stores regitster type in the order of requested command
170 * @handles: stores buffer handle in its reg_type position
171 * @types: stores buffer type in its reg_type position
172 * @descs: stores buffer description in its reg_type position
173 *
174 */
175 struct g2d_buf_info {
176 unsigned int map_nr;
177 enum g2d_reg_type reg_types[MAX_REG_TYPE_NR];
178 unsigned long handles[MAX_REG_TYPE_NR];
179 unsigned int types[MAX_REG_TYPE_NR];
180 struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
181 };
182
183 struct drm_exynos_pending_g2d_event {
184 struct drm_pending_event base;
185 struct drm_exynos_g2d_event event;
186 };
187
188 struct g2d_cmdlist_userptr {
189 struct list_head list;
190 dma_addr_t dma_addr;
191 unsigned long userptr;
192 unsigned long size;
193 struct page **pages;
194 unsigned int npages;
195 struct sg_table *sgt;
196 struct vm_area_struct *vma;
197 atomic_t refcount;
198 bool in_pool;
199 bool out_of_list;
200 };
201 struct g2d_cmdlist_node {
202 struct list_head list;
203 struct g2d_cmdlist *cmdlist;
204 dma_addr_t dma_addr;
205 struct g2d_buf_info buf_info;
206
207 struct drm_exynos_pending_g2d_event *event;
208 };
209
210 struct g2d_runqueue_node {
211 struct list_head list;
212 struct list_head run_cmdlist;
213 struct list_head event_list;
214 struct drm_file *filp;
215 pid_t pid;
216 struct completion complete;
217 int async;
218 };
219
220 struct g2d_data {
221 struct device *dev;
222 struct clk *gate_clk;
223 void __iomem *regs;
224 int irq;
225 struct workqueue_struct *g2d_workq;
226 struct work_struct runqueue_work;
227 struct exynos_drm_subdrv subdrv;
228 bool suspended;
229
230 /* cmdlist */
231 struct g2d_cmdlist_node *cmdlist_node;
232 struct list_head free_cmdlist;
233 struct mutex cmdlist_mutex;
234 dma_addr_t cmdlist_pool;
235 void *cmdlist_pool_virt;
236 struct dma_attrs cmdlist_dma_attrs;
237
238 /* runqueue*/
239 struct g2d_runqueue_node *runqueue_node;
240 struct list_head runqueue;
241 struct mutex runqueue_mutex;
242 struct kmem_cache *runqueue_slab;
243
244 unsigned long current_pool;
245 unsigned long max_pool;
246 };
247
248 static int g2d_init_cmdlist(struct g2d_data *g2d)
249 {
250 struct device *dev = g2d->dev;
251 struct g2d_cmdlist_node *node = g2d->cmdlist_node;
252 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
253 int nr;
254 int ret;
255 struct g2d_buf_info *buf_info;
256
257 init_dma_attrs(&g2d->cmdlist_dma_attrs);
258 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
259
260 g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev,
261 G2D_CMDLIST_POOL_SIZE,
262 &g2d->cmdlist_pool, GFP_KERNEL,
263 &g2d->cmdlist_dma_attrs);
264 if (!g2d->cmdlist_pool_virt) {
265 dev_err(dev, "failed to allocate dma memory\n");
266 return -ENOMEM;
267 }
268
269 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
270 if (!node) {
271 dev_err(dev, "failed to allocate memory\n");
272 ret = -ENOMEM;
273 goto err;
274 }
275
276 for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
277 unsigned int i;
278
279 node[nr].cmdlist =
280 g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
281 node[nr].dma_addr =
282 g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
283
284 buf_info = &node[nr].buf_info;
285 for (i = 0; i < MAX_REG_TYPE_NR; i++)
286 buf_info->reg_types[i] = REG_TYPE_NONE;
287
288 list_add_tail(&node[nr].list, &g2d->free_cmdlist);
289 }
290
291 return 0;
292
293 err:
294 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
295 g2d->cmdlist_pool_virt,
296 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
297 return ret;
298 }
299
300 static void g2d_fini_cmdlist(struct g2d_data *g2d)
301 {
302 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
303
304 kfree(g2d->cmdlist_node);
305 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
306 g2d->cmdlist_pool_virt,
307 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
308 }
309
310 static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
311 {
312 struct device *dev = g2d->dev;
313 struct g2d_cmdlist_node *node;
314
315 mutex_lock(&g2d->cmdlist_mutex);
316 if (list_empty(&g2d->free_cmdlist)) {
317 dev_err(dev, "there is no free cmdlist\n");
318 mutex_unlock(&g2d->cmdlist_mutex);
319 return NULL;
320 }
321
322 node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
323 list);
324 list_del_init(&node->list);
325 mutex_unlock(&g2d->cmdlist_mutex);
326
327 return node;
328 }
329
330 static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
331 {
332 mutex_lock(&g2d->cmdlist_mutex);
333 list_move_tail(&node->list, &g2d->free_cmdlist);
334 mutex_unlock(&g2d->cmdlist_mutex);
335 }
336
337 static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
338 struct g2d_cmdlist_node *node)
339 {
340 struct g2d_cmdlist_node *lnode;
341
342 if (list_empty(&g2d_priv->inuse_cmdlist))
343 goto add_to_list;
344
345 /* this links to base address of new cmdlist */
346 lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
347 struct g2d_cmdlist_node, list);
348 lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
349
350 add_to_list:
351 list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
352
353 if (node->event)
354 list_add_tail(&node->event->base.link, &g2d_priv->event_list);
355 }
356
357 static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
358 unsigned long obj,
359 bool force)
360 {
361 struct g2d_cmdlist_userptr *g2d_userptr =
362 (struct g2d_cmdlist_userptr *)obj;
363
364 if (!obj)
365 return;
366
367 if (force)
368 goto out;
369
370 atomic_dec(&g2d_userptr->refcount);
371
372 if (atomic_read(&g2d_userptr->refcount) > 0)
373 return;
374
375 if (g2d_userptr->in_pool)
376 return;
377
378 out:
379 exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt,
380 DMA_BIDIRECTIONAL);
381
382 exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
383 g2d_userptr->npages,
384 g2d_userptr->vma);
385
386 exynos_gem_put_vma(g2d_userptr->vma);
387
388 if (!g2d_userptr->out_of_list)
389 list_del_init(&g2d_userptr->list);
390
391 sg_free_table(g2d_userptr->sgt);
392 kfree(g2d_userptr->sgt);
393
394 drm_free_large(g2d_userptr->pages);
395 kfree(g2d_userptr);
396 }
397
398 static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
399 unsigned long userptr,
400 unsigned long size,
401 struct drm_file *filp,
402 unsigned long *obj)
403 {
404 struct drm_exynos_file_private *file_priv = filp->driver_priv;
405 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
406 struct g2d_cmdlist_userptr *g2d_userptr;
407 struct g2d_data *g2d;
408 struct page **pages;
409 struct sg_table *sgt;
410 struct vm_area_struct *vma;
411 unsigned long start, end;
412 unsigned int npages, offset;
413 int ret;
414
415 if (!size) {
416 DRM_ERROR("invalid userptr size.\n");
417 return ERR_PTR(-EINVAL);
418 }
419
420 g2d = dev_get_drvdata(g2d_priv->dev);
421
422 /* check if userptr already exists in userptr_list. */
423 list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
424 if (g2d_userptr->userptr == userptr) {
425 /*
426 * also check size because there could be same address
427 * and different size.
428 */
429 if (g2d_userptr->size == size) {
430 atomic_inc(&g2d_userptr->refcount);
431 *obj = (unsigned long)g2d_userptr;
432
433 return &g2d_userptr->dma_addr;
434 }
435
436 /*
437 * at this moment, maybe g2d dma is accessing this
438 * g2d_userptr memory region so just remove this
439 * g2d_userptr object from userptr_list not to be
440 * referred again and also except it the userptr
441 * pool to be released after the dma access completion.
442 */
443 g2d_userptr->out_of_list = true;
444 g2d_userptr->in_pool = false;
445 list_del_init(&g2d_userptr->list);
446
447 break;
448 }
449 }
450
451 g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
452 if (!g2d_userptr)
453 return ERR_PTR(-ENOMEM);
454
455 atomic_set(&g2d_userptr->refcount, 1);
456
457 start = userptr & PAGE_MASK;
458 offset = userptr & ~PAGE_MASK;
459 end = PAGE_ALIGN(userptr + size);
460 npages = (end - start) >> PAGE_SHIFT;
461 g2d_userptr->npages = npages;
462
463 pages = drm_calloc_large(npages, sizeof(struct page *));
464 if (!pages) {
465 DRM_ERROR("failed to allocate pages.\n");
466 ret = -ENOMEM;
467 goto err_free;
468 }
469
470 down_read(&current->mm->mmap_sem);
471 vma = find_vma(current->mm, userptr);
472 if (!vma) {
473 up_read(&current->mm->mmap_sem);
474 DRM_ERROR("failed to get vm region.\n");
475 ret = -EFAULT;
476 goto err_free_pages;
477 }
478
479 if (vma->vm_end < userptr + size) {
480 up_read(&current->mm->mmap_sem);
481 DRM_ERROR("vma is too small.\n");
482 ret = -EFAULT;
483 goto err_free_pages;
484 }
485
486 g2d_userptr->vma = exynos_gem_get_vma(vma);
487 if (!g2d_userptr->vma) {
488 up_read(&current->mm->mmap_sem);
489 DRM_ERROR("failed to copy vma.\n");
490 ret = -ENOMEM;
491 goto err_free_pages;
492 }
493
494 g2d_userptr->size = size;
495
496 ret = exynos_gem_get_pages_from_userptr(start & PAGE_MASK,
497 npages, pages, vma);
498 if (ret < 0) {
499 up_read(&current->mm->mmap_sem);
500 DRM_ERROR("failed to get user pages from userptr.\n");
501 goto err_put_vma;
502 }
503
504 up_read(&current->mm->mmap_sem);
505 g2d_userptr->pages = pages;
506
507 sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
508 if (!sgt) {
509 ret = -ENOMEM;
510 goto err_free_userptr;
511 }
512
513 ret = sg_alloc_table_from_pages(sgt, pages, npages, offset,
514 size, GFP_KERNEL);
515 if (ret < 0) {
516 DRM_ERROR("failed to get sgt from pages.\n");
517 goto err_free_sgt;
518 }
519
520 g2d_userptr->sgt = sgt;
521
522 ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt,
523 DMA_BIDIRECTIONAL);
524 if (ret < 0) {
525 DRM_ERROR("failed to map sgt with dma region.\n");
526 goto err_sg_free_table;
527 }
528
529 g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
530 g2d_userptr->userptr = userptr;
531
532 list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
533
534 if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
535 g2d->current_pool += npages << PAGE_SHIFT;
536 g2d_userptr->in_pool = true;
537 }
538
539 *obj = (unsigned long)g2d_userptr;
540
541 return &g2d_userptr->dma_addr;
542
543 err_sg_free_table:
544 sg_free_table(sgt);
545
546 err_free_sgt:
547 kfree(sgt);
548
549 err_free_userptr:
550 exynos_gem_put_pages_to_userptr(g2d_userptr->pages,
551 g2d_userptr->npages,
552 g2d_userptr->vma);
553
554 err_put_vma:
555 exynos_gem_put_vma(g2d_userptr->vma);
556
557 err_free_pages:
558 drm_free_large(pages);
559
560 err_free:
561 kfree(g2d_userptr);
562
563 return ERR_PTR(ret);
564 }
565
566 static void g2d_userptr_free_all(struct drm_device *drm_dev,
567 struct g2d_data *g2d,
568 struct drm_file *filp)
569 {
570 struct drm_exynos_file_private *file_priv = filp->driver_priv;
571 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
572 struct g2d_cmdlist_userptr *g2d_userptr, *n;
573
574 list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
575 if (g2d_userptr->in_pool)
576 g2d_userptr_put_dma_addr(drm_dev,
577 (unsigned long)g2d_userptr,
578 true);
579
580 g2d->current_pool = 0;
581 }
582
583 static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
584 {
585 enum g2d_reg_type reg_type;
586
587 switch (reg_offset) {
588 case G2D_SRC_BASE_ADDR:
589 case G2D_SRC_COLOR_MODE:
590 case G2D_SRC_LEFT_TOP:
591 case G2D_SRC_RIGHT_BOTTOM:
592 reg_type = REG_TYPE_SRC;
593 break;
594 case G2D_SRC_PLANE2_BASE_ADDR:
595 reg_type = REG_TYPE_SRC_PLANE2;
596 break;
597 case G2D_DST_BASE_ADDR:
598 case G2D_DST_COLOR_MODE:
599 case G2D_DST_LEFT_TOP:
600 case G2D_DST_RIGHT_BOTTOM:
601 reg_type = REG_TYPE_DST;
602 break;
603 case G2D_DST_PLANE2_BASE_ADDR:
604 reg_type = REG_TYPE_DST_PLANE2;
605 break;
606 case G2D_PAT_BASE_ADDR:
607 reg_type = REG_TYPE_PAT;
608 break;
609 case G2D_MSK_BASE_ADDR:
610 reg_type = REG_TYPE_MSK;
611 break;
612 default:
613 reg_type = REG_TYPE_NONE;
614 DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
615 break;
616 }
617
618 return reg_type;
619 }
620
621 static unsigned long g2d_get_buf_bpp(unsigned int format)
622 {
623 unsigned long bpp;
624
625 switch (format) {
626 case G2D_FMT_XRGB8888:
627 case G2D_FMT_ARGB8888:
628 bpp = 4;
629 break;
630 case G2D_FMT_RGB565:
631 case G2D_FMT_XRGB1555:
632 case G2D_FMT_ARGB1555:
633 case G2D_FMT_XRGB4444:
634 case G2D_FMT_ARGB4444:
635 bpp = 2;
636 break;
637 case G2D_FMT_PACKED_RGB888:
638 bpp = 3;
639 break;
640 default:
641 bpp = 1;
642 break;
643 }
644
645 return bpp;
646 }
647
648 static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
649 enum g2d_reg_type reg_type,
650 unsigned long size)
651 {
652 unsigned int width, height;
653 unsigned long area;
654
655 /*
656 * check source and destination buffers only.
657 * so the others are always valid.
658 */
659 if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
660 return true;
661
662 width = buf_desc->right_x - buf_desc->left_x;
663 if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
664 DRM_ERROR("width[%u] is out of range!\n", width);
665 return false;
666 }
667
668 height = buf_desc->bottom_y - buf_desc->top_y;
669 if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
670 DRM_ERROR("height[%u] is out of range!\n", height);
671 return false;
672 }
673
674 area = (unsigned long)width * (unsigned long)height *
675 g2d_get_buf_bpp(buf_desc->format);
676 if (area > size) {
677 DRM_ERROR("area[%lu] is out of range[%lu]!\n", area, size);
678 return false;
679 }
680
681 return true;
682 }
683
684 static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
685 struct g2d_cmdlist_node *node,
686 struct drm_device *drm_dev,
687 struct drm_file *file)
688 {
689 struct g2d_cmdlist *cmdlist = node->cmdlist;
690 struct g2d_buf_info *buf_info = &node->buf_info;
691 int offset;
692 int ret;
693 int i;
694
695 for (i = 0; i < buf_info->map_nr; i++) {
696 struct g2d_buf_desc *buf_desc;
697 enum g2d_reg_type reg_type;
698 int reg_pos;
699 unsigned long handle;
700 dma_addr_t *addr;
701
702 reg_pos = cmdlist->last - 2 * (i + 1);
703
704 offset = cmdlist->data[reg_pos];
705 handle = cmdlist->data[reg_pos + 1];
706
707 reg_type = g2d_get_reg_type(offset);
708 if (reg_type == REG_TYPE_NONE) {
709 ret = -EFAULT;
710 goto err;
711 }
712
713 buf_desc = &buf_info->descs[reg_type];
714
715 if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
716 unsigned long size;
717
718 size = exynos_drm_gem_get_size(drm_dev, handle, file);
719 if (!size) {
720 ret = -EFAULT;
721 goto err;
722 }
723
724 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
725 size)) {
726 ret = -EFAULT;
727 goto err;
728 }
729
730 addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
731 file);
732 if (IS_ERR(addr)) {
733 ret = -EFAULT;
734 goto err;
735 }
736 } else {
737 struct drm_exynos_g2d_userptr g2d_userptr;
738
739 if (copy_from_user(&g2d_userptr, (void __user *)handle,
740 sizeof(struct drm_exynos_g2d_userptr))) {
741 ret = -EFAULT;
742 goto err;
743 }
744
745 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
746 g2d_userptr.size)) {
747 ret = -EFAULT;
748 goto err;
749 }
750
751 addr = g2d_userptr_get_dma_addr(drm_dev,
752 g2d_userptr.userptr,
753 g2d_userptr.size,
754 file,
755 &handle);
756 if (IS_ERR(addr)) {
757 ret = -EFAULT;
758 goto err;
759 }
760 }
761
762 cmdlist->data[reg_pos + 1] = *addr;
763 buf_info->reg_types[i] = reg_type;
764 buf_info->handles[reg_type] = handle;
765 }
766
767 return 0;
768
769 err:
770 buf_info->map_nr = i;
771 return ret;
772 }
773
774 static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
775 struct g2d_cmdlist_node *node,
776 struct drm_file *filp)
777 {
778 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
779 struct g2d_buf_info *buf_info = &node->buf_info;
780 int i;
781
782 for (i = 0; i < buf_info->map_nr; i++) {
783 struct g2d_buf_desc *buf_desc;
784 enum g2d_reg_type reg_type;
785 unsigned long handle;
786
787 reg_type = buf_info->reg_types[i];
788
789 buf_desc = &buf_info->descs[reg_type];
790 handle = buf_info->handles[reg_type];
791
792 if (buf_info->types[reg_type] == BUF_TYPE_GEM)
793 exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
794 filp);
795 else
796 g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
797 false);
798
799 buf_info->reg_types[i] = REG_TYPE_NONE;
800 buf_info->handles[reg_type] = 0;
801 buf_info->types[reg_type] = 0;
802 memset(buf_desc, 0x00, sizeof(*buf_desc));
803 }
804
805 buf_info->map_nr = 0;
806 }
807
808 static void g2d_dma_start(struct g2d_data *g2d,
809 struct g2d_runqueue_node *runqueue_node)
810 {
811 struct g2d_cmdlist_node *node =
812 list_first_entry(&runqueue_node->run_cmdlist,
813 struct g2d_cmdlist_node, list);
814 int ret;
815
816 ret = pm_runtime_get_sync(g2d->dev);
817 if (ret < 0)
818 return;
819
820 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
821 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
822 }
823
824 static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
825 {
826 struct g2d_runqueue_node *runqueue_node;
827
828 if (list_empty(&g2d->runqueue))
829 return NULL;
830
831 runqueue_node = list_first_entry(&g2d->runqueue,
832 struct g2d_runqueue_node, list);
833 list_del_init(&runqueue_node->list);
834 return runqueue_node;
835 }
836
837 static void g2d_free_runqueue_node(struct g2d_data *g2d,
838 struct g2d_runqueue_node *runqueue_node)
839 {
840 struct g2d_cmdlist_node *node;
841
842 if (!runqueue_node)
843 return;
844
845 mutex_lock(&g2d->cmdlist_mutex);
846 /*
847 * commands in run_cmdlist have been completed so unmap all gem
848 * objects in each command node so that they are unreferenced.
849 */
850 list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
851 g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
852 list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
853 mutex_unlock(&g2d->cmdlist_mutex);
854
855 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
856 }
857
858 static void g2d_exec_runqueue(struct g2d_data *g2d)
859 {
860 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
861 if (g2d->runqueue_node)
862 g2d_dma_start(g2d, g2d->runqueue_node);
863 }
864
865 static void g2d_runqueue_worker(struct work_struct *work)
866 {
867 struct g2d_data *g2d = container_of(work, struct g2d_data,
868 runqueue_work);
869
870 mutex_lock(&g2d->runqueue_mutex);
871 pm_runtime_put_sync(g2d->dev);
872
873 complete(&g2d->runqueue_node->complete);
874 if (g2d->runqueue_node->async)
875 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
876
877 if (g2d->suspended)
878 g2d->runqueue_node = NULL;
879 else
880 g2d_exec_runqueue(g2d);
881 mutex_unlock(&g2d->runqueue_mutex);
882 }
883
884 static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
885 {
886 struct drm_device *drm_dev = g2d->subdrv.drm_dev;
887 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
888 struct drm_exynos_pending_g2d_event *e;
889 struct timeval now;
890 unsigned long flags;
891
892 if (list_empty(&runqueue_node->event_list))
893 return;
894
895 e = list_first_entry(&runqueue_node->event_list,
896 struct drm_exynos_pending_g2d_event, base.link);
897
898 do_gettimeofday(&now);
899 e->event.tv_sec = now.tv_sec;
900 e->event.tv_usec = now.tv_usec;
901 e->event.cmdlist_no = cmdlist_no;
902
903 spin_lock_irqsave(&drm_dev->event_lock, flags);
904 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
905 wake_up_interruptible(&e->base.file_priv->event_wait);
906 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
907 }
908
909 static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
910 {
911 struct g2d_data *g2d = dev_id;
912 u32 pending;
913
914 pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
915 if (pending)
916 writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
917
918 if (pending & G2D_INTP_GCMD_FIN) {
919 u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
920
921 cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
922 G2D_DMA_LIST_DONE_COUNT_OFFSET;
923
924 g2d_finish_event(g2d, cmdlist_no);
925
926 writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
927 if (!(pending & G2D_INTP_ACMD_FIN)) {
928 writel_relaxed(G2D_DMA_CONTINUE,
929 g2d->regs + G2D_DMA_COMMAND);
930 }
931 }
932
933 if (pending & G2D_INTP_ACMD_FIN)
934 queue_work(g2d->g2d_workq, &g2d->runqueue_work);
935
936 return IRQ_HANDLED;
937 }
938
939 static int g2d_check_reg_offset(struct device *dev,
940 struct g2d_cmdlist_node *node,
941 int nr, bool for_addr)
942 {
943 struct g2d_cmdlist *cmdlist = node->cmdlist;
944 int reg_offset;
945 int index;
946 int i;
947
948 for (i = 0; i < nr; i++) {
949 struct g2d_buf_info *buf_info = &node->buf_info;
950 struct g2d_buf_desc *buf_desc;
951 enum g2d_reg_type reg_type;
952 unsigned long value;
953
954 index = cmdlist->last - 2 * (i + 1);
955
956 reg_offset = cmdlist->data[index] & ~0xfffff000;
957 if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
958 goto err;
959 if (reg_offset % 4)
960 goto err;
961
962 switch (reg_offset) {
963 case G2D_SRC_BASE_ADDR:
964 case G2D_SRC_PLANE2_BASE_ADDR:
965 case G2D_DST_BASE_ADDR:
966 case G2D_DST_PLANE2_BASE_ADDR:
967 case G2D_PAT_BASE_ADDR:
968 case G2D_MSK_BASE_ADDR:
969 if (!for_addr)
970 goto err;
971
972 reg_type = g2d_get_reg_type(reg_offset);
973 if (reg_type == REG_TYPE_NONE)
974 goto err;
975
976 /* check userptr buffer type. */
977 if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
978 buf_info->types[reg_type] = BUF_TYPE_USERPTR;
979 cmdlist->data[index] &= ~G2D_BUF_USERPTR;
980 } else
981 buf_info->types[reg_type] = BUF_TYPE_GEM;
982 break;
983 case G2D_SRC_COLOR_MODE:
984 case G2D_DST_COLOR_MODE:
985 if (for_addr)
986 goto err;
987
988 reg_type = g2d_get_reg_type(reg_offset);
989 if (reg_type == REG_TYPE_NONE)
990 goto err;
991
992 buf_desc = &buf_info->descs[reg_type];
993 value = cmdlist->data[index + 1];
994
995 buf_desc->format = value & 0xf;
996 break;
997 case G2D_SRC_LEFT_TOP:
998 case G2D_DST_LEFT_TOP:
999 if (for_addr)
1000 goto err;
1001
1002 reg_type = g2d_get_reg_type(reg_offset);
1003 if (reg_type == REG_TYPE_NONE)
1004 goto err;
1005
1006 buf_desc = &buf_info->descs[reg_type];
1007 value = cmdlist->data[index + 1];
1008
1009 buf_desc->left_x = value & 0x1fff;
1010 buf_desc->top_y = (value & 0x1fff0000) >> 16;
1011 break;
1012 case G2D_SRC_RIGHT_BOTTOM:
1013 case G2D_DST_RIGHT_BOTTOM:
1014 if (for_addr)
1015 goto err;
1016
1017 reg_type = g2d_get_reg_type(reg_offset);
1018 if (reg_type == REG_TYPE_NONE)
1019 goto err;
1020
1021 buf_desc = &buf_info->descs[reg_type];
1022 value = cmdlist->data[index + 1];
1023
1024 buf_desc->right_x = value & 0x1fff;
1025 buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
1026 break;
1027 default:
1028 if (for_addr)
1029 goto err;
1030 break;
1031 }
1032 }
1033
1034 return 0;
1035
1036 err:
1037 dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
1038 return -EINVAL;
1039 }
1040
1041 /* ioctl functions */
1042 int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1043 struct drm_file *file)
1044 {
1045 struct drm_exynos_file_private *file_priv = file->driver_priv;
1046 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1047 struct device *dev;
1048 struct g2d_data *g2d;
1049 struct drm_exynos_g2d_get_ver *ver = data;
1050
1051 if (!g2d_priv)
1052 return -ENODEV;
1053
1054 dev = g2d_priv->dev;
1055 if (!dev)
1056 return -ENODEV;
1057
1058 g2d = dev_get_drvdata(dev);
1059 if (!g2d)
1060 return -EFAULT;
1061
1062 ver->major = G2D_HW_MAJOR_VER;
1063 ver->minor = G2D_HW_MINOR_VER;
1064
1065 return 0;
1066 }
1067 EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl);
1068
1069 int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1070 struct drm_file *file)
1071 {
1072 struct drm_exynos_file_private *file_priv = file->driver_priv;
1073 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1074 struct device *dev;
1075 struct g2d_data *g2d;
1076 struct drm_exynos_g2d_set_cmdlist *req = data;
1077 struct drm_exynos_g2d_cmd *cmd;
1078 struct drm_exynos_pending_g2d_event *e;
1079 struct g2d_cmdlist_node *node;
1080 struct g2d_cmdlist *cmdlist;
1081 unsigned long flags;
1082 int size;
1083 int ret;
1084
1085 if (!g2d_priv)
1086 return -ENODEV;
1087
1088 dev = g2d_priv->dev;
1089 if (!dev)
1090 return -ENODEV;
1091
1092 g2d = dev_get_drvdata(dev);
1093 if (!g2d)
1094 return -EFAULT;
1095
1096 node = g2d_get_cmdlist(g2d);
1097 if (!node)
1098 return -ENOMEM;
1099
1100 node->event = NULL;
1101
1102 if (req->event_type != G2D_EVENT_NOT) {
1103 spin_lock_irqsave(&drm_dev->event_lock, flags);
1104 if (file->event_space < sizeof(e->event)) {
1105 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1106 ret = -ENOMEM;
1107 goto err;
1108 }
1109 file->event_space -= sizeof(e->event);
1110 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1111
1112 e = kzalloc(sizeof(*node->event), GFP_KERNEL);
1113 if (!e) {
1114 spin_lock_irqsave(&drm_dev->event_lock, flags);
1115 file->event_space += sizeof(e->event);
1116 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1117
1118 ret = -ENOMEM;
1119 goto err;
1120 }
1121
1122 e->event.base.type = DRM_EXYNOS_G2D_EVENT;
1123 e->event.base.length = sizeof(e->event);
1124 e->event.user_data = req->user_data;
1125 e->base.event = &e->event.base;
1126 e->base.file_priv = file;
1127 e->base.destroy = (void (*) (struct drm_pending_event *)) kfree;
1128
1129 node->event = e;
1130 }
1131
1132 cmdlist = node->cmdlist;
1133
1134 cmdlist->last = 0;
1135
1136 /*
1137 * If don't clear SFR registers, the cmdlist is affected by register
1138 * values of previous cmdlist. G2D hw executes SFR clear command and
1139 * a next command at the same time then the next command is ignored and
1140 * is executed rightly from next next command, so needs a dummy command
1141 * to next command of SFR clear command.
1142 */
1143 cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
1144 cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
1145 cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
1146 cmdlist->data[cmdlist->last++] = 0;
1147
1148 /*
1149 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1150 * and GCF bit should be set to INTEN register if user wants
1151 * G2D interrupt event once current command list execution is
1152 * finished.
1153 * Otherwise only ACF bit should be set to INTEN register so
1154 * that one interrupt is occurred after all command lists
1155 * have been completed.
1156 */
1157 if (node->event) {
1158 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1159 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
1160 cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
1161 cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
1162 } else {
1163 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1164 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
1165 }
1166
1167 /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
1168 size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
1169 if (size > G2D_CMDLIST_DATA_NUM) {
1170 dev_err(dev, "cmdlist size is too big\n");
1171 ret = -EINVAL;
1172 goto err_free_event;
1173 }
1174
1175 cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd;
1176
1177 if (copy_from_user(cmdlist->data + cmdlist->last,
1178 (void __user *)cmd,
1179 sizeof(*cmd) * req->cmd_nr)) {
1180 ret = -EFAULT;
1181 goto err_free_event;
1182 }
1183 cmdlist->last += req->cmd_nr * 2;
1184
1185 ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
1186 if (ret < 0)
1187 goto err_free_event;
1188
1189 node->buf_info.map_nr = req->cmd_buf_nr;
1190 if (req->cmd_buf_nr) {
1191 struct drm_exynos_g2d_cmd *cmd_buf;
1192
1193 cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf;
1194
1195 if (copy_from_user(cmdlist->data + cmdlist->last,
1196 (void __user *)cmd_buf,
1197 sizeof(*cmd_buf) * req->cmd_buf_nr)) {
1198 ret = -EFAULT;
1199 goto err_free_event;
1200 }
1201 cmdlist->last += req->cmd_buf_nr * 2;
1202
1203 ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
1204 if (ret < 0)
1205 goto err_free_event;
1206
1207 ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
1208 if (ret < 0)
1209 goto err_unmap;
1210 }
1211
1212 cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
1213 cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
1214
1215 /* head */
1216 cmdlist->head = cmdlist->last / 2;
1217
1218 /* tail */
1219 cmdlist->data[cmdlist->last] = 0;
1220
1221 g2d_add_cmdlist_to_inuse(g2d_priv, node);
1222
1223 return 0;
1224
1225 err_unmap:
1226 g2d_unmap_cmdlist_gem(g2d, node, file);
1227 err_free_event:
1228 if (node->event) {
1229 spin_lock_irqsave(&drm_dev->event_lock, flags);
1230 file->event_space += sizeof(e->event);
1231 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1232 kfree(node->event);
1233 }
1234 err:
1235 g2d_put_cmdlist(g2d, node);
1236 return ret;
1237 }
1238 EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl);
1239
1240 int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1241 struct drm_file *file)
1242 {
1243 struct drm_exynos_file_private *file_priv = file->driver_priv;
1244 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1245 struct device *dev;
1246 struct g2d_data *g2d;
1247 struct drm_exynos_g2d_exec *req = data;
1248 struct g2d_runqueue_node *runqueue_node;
1249 struct list_head *run_cmdlist;
1250 struct list_head *event_list;
1251
1252 if (!g2d_priv)
1253 return -ENODEV;
1254
1255 dev = g2d_priv->dev;
1256 if (!dev)
1257 return -ENODEV;
1258
1259 g2d = dev_get_drvdata(dev);
1260 if (!g2d)
1261 return -EFAULT;
1262
1263 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
1264 if (!runqueue_node) {
1265 dev_err(dev, "failed to allocate memory\n");
1266 return -ENOMEM;
1267 }
1268 run_cmdlist = &runqueue_node->run_cmdlist;
1269 event_list = &runqueue_node->event_list;
1270 INIT_LIST_HEAD(run_cmdlist);
1271 INIT_LIST_HEAD(event_list);
1272 init_completion(&runqueue_node->complete);
1273 runqueue_node->async = req->async;
1274
1275 list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
1276 list_splice_init(&g2d_priv->event_list, event_list);
1277
1278 if (list_empty(run_cmdlist)) {
1279 dev_err(dev, "there is no inuse cmdlist\n");
1280 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
1281 return -EPERM;
1282 }
1283
1284 mutex_lock(&g2d->runqueue_mutex);
1285 runqueue_node->pid = current->pid;
1286 runqueue_node->filp = file;
1287 list_add_tail(&runqueue_node->list, &g2d->runqueue);
1288 if (!g2d->runqueue_node)
1289 g2d_exec_runqueue(g2d);
1290 mutex_unlock(&g2d->runqueue_mutex);
1291
1292 if (runqueue_node->async)
1293 goto out;
1294
1295 wait_for_completion(&runqueue_node->complete);
1296 g2d_free_runqueue_node(g2d, runqueue_node);
1297
1298 out:
1299 return 0;
1300 }
1301 EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl);
1302
1303 static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1304 {
1305 struct g2d_data *g2d;
1306 int ret;
1307
1308 g2d = dev_get_drvdata(dev);
1309 if (!g2d)
1310 return -EFAULT;
1311
1312 /* allocate dma-aware cmdlist buffer. */
1313 ret = g2d_init_cmdlist(g2d);
1314 if (ret < 0) {
1315 dev_err(dev, "cmdlist init failed\n");
1316 return ret;
1317 }
1318
1319 if (!is_drm_iommu_supported(drm_dev))
1320 return 0;
1321
1322 ret = drm_iommu_attach_device(drm_dev, dev);
1323 if (ret < 0) {
1324 dev_err(dev, "failed to enable iommu.\n");
1325 g2d_fini_cmdlist(g2d);
1326 }
1327
1328 return ret;
1329
1330 }
1331
1332 static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
1333 {
1334 if (!is_drm_iommu_supported(drm_dev))
1335 return;
1336
1337 drm_iommu_detach_device(drm_dev, dev);
1338 }
1339
1340 static int g2d_open(struct drm_device *drm_dev, struct device *dev,
1341 struct drm_file *file)
1342 {
1343 struct drm_exynos_file_private *file_priv = file->driver_priv;
1344 struct exynos_drm_g2d_private *g2d_priv;
1345
1346 g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
1347 if (!g2d_priv)
1348 return -ENOMEM;
1349
1350 g2d_priv->dev = dev;
1351 file_priv->g2d_priv = g2d_priv;
1352
1353 INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
1354 INIT_LIST_HEAD(&g2d_priv->event_list);
1355 INIT_LIST_HEAD(&g2d_priv->userptr_list);
1356
1357 return 0;
1358 }
1359
1360 static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1361 struct drm_file *file)
1362 {
1363 struct drm_exynos_file_private *file_priv = file->driver_priv;
1364 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1365 struct g2d_data *g2d;
1366 struct g2d_cmdlist_node *node, *n;
1367
1368 if (!dev)
1369 return;
1370
1371 g2d = dev_get_drvdata(dev);
1372 if (!g2d)
1373 return;
1374
1375 mutex_lock(&g2d->cmdlist_mutex);
1376 list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
1377 /*
1378 * unmap all gem objects not completed.
1379 *
1380 * P.S. if current process was terminated forcely then
1381 * there may be some commands in inuse_cmdlist so unmap
1382 * them.
1383 */
1384 g2d_unmap_cmdlist_gem(g2d, node, file);
1385 list_move_tail(&node->list, &g2d->free_cmdlist);
1386 }
1387 mutex_unlock(&g2d->cmdlist_mutex);
1388
1389 /* release all g2d_userptr in pool. */
1390 g2d_userptr_free_all(drm_dev, g2d, file);
1391
1392 kfree(file_priv->g2d_priv);
1393 }
1394
1395 static int g2d_probe(struct platform_device *pdev)
1396 {
1397 struct device *dev = &pdev->dev;
1398 struct resource *res;
1399 struct g2d_data *g2d;
1400 struct exynos_drm_subdrv *subdrv;
1401 int ret;
1402
1403 g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL);
1404 if (!g2d)
1405 return -ENOMEM;
1406
1407 g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1408 sizeof(struct g2d_runqueue_node), 0, 0, NULL);
1409 if (!g2d->runqueue_slab)
1410 return -ENOMEM;
1411
1412 g2d->dev = dev;
1413
1414 g2d->g2d_workq = create_singlethread_workqueue("g2d");
1415 if (!g2d->g2d_workq) {
1416 dev_err(dev, "failed to create workqueue\n");
1417 ret = -EINVAL;
1418 goto err_destroy_slab;
1419 }
1420
1421 INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1422 INIT_LIST_HEAD(&g2d->free_cmdlist);
1423 INIT_LIST_HEAD(&g2d->runqueue);
1424
1425 mutex_init(&g2d->cmdlist_mutex);
1426 mutex_init(&g2d->runqueue_mutex);
1427
1428 g2d->gate_clk = devm_clk_get(dev, "fimg2d");
1429 if (IS_ERR(g2d->gate_clk)) {
1430 dev_err(dev, "failed to get gate clock\n");
1431 ret = PTR_ERR(g2d->gate_clk);
1432 goto err_destroy_workqueue;
1433 }
1434
1435 pm_runtime_enable(dev);
1436
1437 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1438
1439 g2d->regs = devm_ioremap_resource(dev, res);
1440 if (IS_ERR(g2d->regs)) {
1441 ret = PTR_ERR(g2d->regs);
1442 goto err_put_clk;
1443 }
1444
1445 g2d->irq = platform_get_irq(pdev, 0);
1446 if (g2d->irq < 0) {
1447 dev_err(dev, "failed to get irq\n");
1448 ret = g2d->irq;
1449 goto err_put_clk;
1450 }
1451
1452 ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0,
1453 "drm_g2d", g2d);
1454 if (ret < 0) {
1455 dev_err(dev, "irq request failed\n");
1456 goto err_put_clk;
1457 }
1458
1459 g2d->max_pool = MAX_POOL;
1460
1461 platform_set_drvdata(pdev, g2d);
1462
1463 subdrv = &g2d->subdrv;
1464 subdrv->dev = dev;
1465 subdrv->probe = g2d_subdrv_probe;
1466 subdrv->remove = g2d_subdrv_remove;
1467 subdrv->open = g2d_open;
1468 subdrv->close = g2d_close;
1469
1470 ret = exynos_drm_subdrv_register(subdrv);
1471 if (ret < 0) {
1472 dev_err(dev, "failed to register drm g2d device\n");
1473 goto err_put_clk;
1474 }
1475
1476 dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
1477 G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1478
1479 return 0;
1480
1481 err_put_clk:
1482 pm_runtime_disable(dev);
1483 err_destroy_workqueue:
1484 destroy_workqueue(g2d->g2d_workq);
1485 err_destroy_slab:
1486 kmem_cache_destroy(g2d->runqueue_slab);
1487 return ret;
1488 }
1489
1490 static int g2d_remove(struct platform_device *pdev)
1491 {
1492 struct g2d_data *g2d = platform_get_drvdata(pdev);
1493
1494 cancel_work_sync(&g2d->runqueue_work);
1495 exynos_drm_subdrv_unregister(&g2d->subdrv);
1496
1497 while (g2d->runqueue_node) {
1498 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
1499 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
1500 }
1501
1502 pm_runtime_disable(&pdev->dev);
1503
1504 g2d_fini_cmdlist(g2d);
1505 destroy_workqueue(g2d->g2d_workq);
1506 kmem_cache_destroy(g2d->runqueue_slab);
1507
1508 return 0;
1509 }
1510
1511 #ifdef CONFIG_PM_SLEEP
1512 static int g2d_suspend(struct device *dev)
1513 {
1514 struct g2d_data *g2d = dev_get_drvdata(dev);
1515
1516 mutex_lock(&g2d->runqueue_mutex);
1517 g2d->suspended = true;
1518 mutex_unlock(&g2d->runqueue_mutex);
1519
1520 while (g2d->runqueue_node)
1521 /* FIXME: good range? */
1522 usleep_range(500, 1000);
1523
1524 flush_work(&g2d->runqueue_work);
1525
1526 return 0;
1527 }
1528
1529 static int g2d_resume(struct device *dev)
1530 {
1531 struct g2d_data *g2d = dev_get_drvdata(dev);
1532
1533 g2d->suspended = false;
1534 g2d_exec_runqueue(g2d);
1535
1536 return 0;
1537 }
1538 #endif
1539
1540 #ifdef CONFIG_PM_RUNTIME
1541 static int g2d_runtime_suspend(struct device *dev)
1542 {
1543 struct g2d_data *g2d = dev_get_drvdata(dev);
1544
1545 clk_disable_unprepare(g2d->gate_clk);
1546
1547 return 0;
1548 }
1549
1550 static int g2d_runtime_resume(struct device *dev)
1551 {
1552 struct g2d_data *g2d = dev_get_drvdata(dev);
1553 int ret;
1554
1555 ret = clk_prepare_enable(g2d->gate_clk);
1556 if (ret < 0)
1557 dev_warn(dev, "failed to enable clock.\n");
1558
1559 return ret;
1560 }
1561 #endif
1562
1563 static const struct dev_pm_ops g2d_pm_ops = {
1564 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume)
1565 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1566 };
1567
1568 static const struct of_device_id exynos_g2d_match[] = {
1569 { .compatible = "samsung,exynos5250-g2d" },
1570 { .compatible = "samsung,exynos4212-g2d" },
1571 {},
1572 };
1573 MODULE_DEVICE_TABLE(of, exynos_g2d_match);
1574
1575 struct platform_driver g2d_driver = {
1576 .probe = g2d_probe,
1577 .remove = g2d_remove,
1578 .driver = {
1579 .name = "s5p-g2d",
1580 .owner = THIS_MODULE,
1581 .pm = &g2d_pm_ops,
1582 .of_match_table = exynos_g2d_match,
1583 },
1584 };
Linux with added FPC-III support