arch/arm/mach-exynos/exynos.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Samsung Exynos Flattened Device Tree enabled machine
   4 //
   5 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
   6 //              http://www.samsung.com
   7
   8 #include <linux/init.h>
   9 #include <linux/io.h>
  10 #include <linux/of.h>
  11 #include <linux/of_address.h>
  12 #include <linux/of_fdt.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/irqchip.h>
  15 #include <linux/soc/samsung/exynos-regs-pmu.h>
  16
  17 #include <asm/cacheflush.h>
  18 #include <asm/hardware/cache-l2x0.h>
  19 #include <asm/mach/arch.h>
  20 #include <asm/mach/map.h>
  21
  22 #include "common.h"
  23
  24 #define S3C_ADDR_BASE   0xF6000000
  25 #define S3C_ADDR(x)     ((void __iomem __force *)S3C_ADDR_BASE + (x))
  26 #define S5P_VA_CHIPID   S3C_ADDR(0x02000000)
  27
  28 static struct platform_device exynos_cpuidle = {
  29         .name              = "exynos_cpuidle",
  30 #ifdef CONFIG_ARM_EXYNOS_CPUIDLE
  31         .dev.platform_data = exynos_enter_aftr,
  32 #endif
  33         .id                = -1,
  34 };
  35
  36 void __iomem *sysram_base_addr __ro_after_init;
  37 phys_addr_t sysram_base_phys __ro_after_init;
  38 void __iomem *sysram_ns_base_addr __ro_after_init;
  39
  40 unsigned long exynos_cpu_id;
  41 static unsigned int exynos_cpu_rev;
  42
  43 unsigned int exynos_rev(void)
  44 {
  45         return exynos_cpu_rev;
  46 }
  47
  48 void __init exynos_sysram_init(void)
  49 {
  50         struct device_node *node;
  51
  52         for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
  53                 if (!of_device_is_available(node))
  54                         continue;
  55                 sysram_base_addr = of_iomap(node, 0);
  56                 sysram_base_phys = of_translate_address(node,
  57                                            of_get_address(node, 0, NULL, NULL));
  58                 break;
  59         }
  60
  61         for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
  62                 if (!of_device_is_available(node))
  63                         continue;
  64                 sysram_ns_base_addr = of_iomap(node, 0);
  65                 break;
  66         }
  67 }
  68
  69 static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
  70                                         int depth, void *data)
  71 {
  72         struct map_desc iodesc;
  73         const __be32 *reg;
  74         int len;
  75
  76         if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid"))
  77                 return 0;
  78
  79         reg = of_get_flat_dt_prop(node, "reg", &len);
  80         if (reg == NULL || len != (sizeof(unsigned long) * 2))
  81                 return 0;
  82
  83         iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
  84         iodesc.length = be32_to_cpu(reg[1]) - 1;
  85         iodesc.virtual = (unsigned long)S5P_VA_CHIPID;
  86         iodesc.type = MT_DEVICE;
  87         iotable_init(&iodesc, 1);
  88         return 1;
  89 }
  90
  91 static void __init exynos_init_io(void)
  92 {
  93         debug_ll_io_init();
  94
  95         of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
  96
  97         /* detect cpu id and rev. */
  98         exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID);
  99         exynos_cpu_rev = exynos_cpu_id & 0xFF;
 100
 101         pr_info("Samsung CPU ID: 0x%08lx\n", exynos_cpu_id);
 102
 103 }
 104
 105 /*
 106  * Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code
 107  * and suspend.
 108  *
 109  * This is necessary only on Exynos4 SoCs. When system is running
 110  * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
 111  * feature could properly detect global idle state when secondary CPU is
 112  * powered down.
 113  *
 114  * However this should not be set when such system is going into suspend.
 115  */
 116 void exynos_set_delayed_reset_assertion(bool enable)
 117 {
 118         if (of_machine_is_compatible("samsung,exynos4")) {
 119                 unsigned int tmp, core_id;
 120
 121                 for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
 122                         tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
 123                         if (enable)
 124                                 tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
 125                         else
 126                                 tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
 127                         pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
 128                 }
 129         }
 130 }
 131
 132 /*
 133  * Apparently, these SoCs are not able to wake-up from suspend using
 134  * the PMU. Too bad. Should they suddenly become capable of such a
 135  * feat, the matches below should be moved to suspend.c.
 136  */
 137 static const struct of_device_id exynos_dt_pmu_match[] = {
 138         { .compatible = "samsung,exynos5260-pmu" },
 139         { .compatible = "samsung,exynos5410-pmu" },
 140         { /*sentinel*/ },
 141 };
 142
 143 static void exynos_map_pmu(void)
 144 {
 145         struct device_node *np;
 146
 147         np = of_find_matching_node(NULL, exynos_dt_pmu_match);
 148         if (np)
 149                 pmu_base_addr = of_iomap(np, 0);
 150 }
 151
 152 static void __init exynos_init_irq(void)
 153 {
 154         irqchip_init();
 155         /*
 156          * Since platsmp.c needs pmu base address by the time
 157          * DT is not unflatten so we can't use DT APIs before
 158          * init_irq
 159          */
 160         exynos_map_pmu();
 161 }
 162
 163 static void __init exynos_dt_machine_init(void)
 164 {
 165         /*
 166          * This is called from smp_prepare_cpus if we've built for SMP, but
 167          * we still need to set it up for PM and firmware ops if not.
 168          */
 169         if (!IS_ENABLED(CONFIG_SMP))
 170                 exynos_sysram_init();
 171
 172 #if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE)
 173         if (of_machine_is_compatible("samsung,exynos4210") ||
 174             of_machine_is_compatible("samsung,exynos3250"))
 175                 exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data;
 176 #endif
 177         if (of_machine_is_compatible("samsung,exynos4210") ||
 178             (of_machine_is_compatible("samsung,exynos4412") &&
 179              (of_machine_is_compatible("samsung,trats2") ||
 180                   of_machine_is_compatible("samsung,midas") ||
 181                   of_machine_is_compatible("samsung,p4note"))) ||
 182             of_machine_is_compatible("samsung,exynos3250") ||
 183             of_machine_is_compatible("samsung,exynos5250"))
 184                 platform_device_register(&exynos_cpuidle);
 185 }
 186
 187 static char const *const exynos_dt_compat[] __initconst = {
 188         "samsung,exynos3",
 189         "samsung,exynos3250",
 190         "samsung,exynos4",
 191         "samsung,exynos4210",
 192         "samsung,exynos4412",
 193         "samsung,exynos5",
 194         "samsung,exynos5250",
 195         "samsung,exynos5260",
 196         "samsung,exynos5420",
 197         NULL
 198 };
 199
 200 static void __init exynos_dt_fixup(void)
 201 {
 202         /*
 203          * Some versions of uboot pass garbage entries in the memory node,
 204          * use the old CONFIG_ARM_NR_BANKS
 205          */
 206         of_fdt_limit_memory(8);
 207 }
 208
 209 DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)")
 210         .l2c_aux_val    = 0x08400000,
 211         .l2c_aux_mask   = 0xf60fffff,
 212         .smp            = smp_ops(exynos_smp_ops),
 213         .map_io         = exynos_init_io,
 214         .init_early     = exynos_firmware_init,
 215         .init_irq       = exynos_init_irq,
 216         .init_machine   = exynos_dt_machine_init,
 217         .init_late      = exynos_pm_init,
 218         .dt_compat      = exynos_dt_compat,
 219         .dt_fixup       = exynos_dt_fixup,
 220 MACHINE_END