arch/csky/abiv1/inc/abi/entry.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
   3
   4 #ifndef __ASM_CSKY_ENTRY_H
   5 #define __ASM_CSKY_ENTRY_H
   6
   7 #include <asm/setup.h>
   8 #include <abi/regdef.h>
   9
  10 #define LSAVE_PC        8
  11 #define LSAVE_PSR       12
  12 #define LSAVE_A0        24
  13 #define LSAVE_A1        28
  14 #define LSAVE_A2        32
  15 #define LSAVE_A3        36
  16 #define LSAVE_A4        40
  17 #define LSAVE_A5        44
  18
  19 #define usp ss1
  20
  21 .macro USPTOKSP
  22         mtcr    sp, usp
  23         mfcr    sp, ss0
  24 .endm
  25
  26 .macro KSPTOUSP
  27         mtcr    sp, ss0
  28         mfcr    sp, usp
  29 .endm
  30
  31 .macro  SAVE_ALL epc_inc
  32         mtcr    r13, ss2
  33         mfcr    r13, epsr
  34         btsti   r13, 31
  35         bt      1f
  36         USPTOKSP
  37 1:
  38         subi    sp, 32
  39         subi    sp, 32
  40         subi    sp, 16
  41         stw     r13, (sp, 12)
  42
  43         stw     lr, (sp, 4)
  44
  45         mfcr    lr, epc
  46         movi    r13, \epc_inc
  47         add     lr, r13
  48         stw     lr, (sp, 8)
  49
  50         mov     lr, sp
  51         addi    lr, 32
  52         addi    lr, 32
  53         addi    lr, 16
  54         bt      2f
  55         mfcr    lr, ss1
  56 2:
  57         stw     lr, (sp, 16)
  58
  59         stw     a0, (sp, 20)
  60         stw     a0, (sp, 24)
  61         stw     a1, (sp, 28)
  62         stw     a2, (sp, 32)
  63         stw     a3, (sp, 36)
  64
  65         addi    sp, 32
  66         addi    sp, 8
  67         mfcr    r13, ss2
  68         stw     r6, (sp)
  69         stw     r7, (sp, 4)
  70         stw     r8, (sp, 8)
  71         stw     r9, (sp, 12)
  72         stw     r10, (sp, 16)
  73         stw     r11, (sp, 20)
  74         stw     r12, (sp, 24)
  75         stw     r13, (sp, 28)
  76         stw     r14, (sp, 32)
  77         stw     r1, (sp, 36)
  78         subi    sp, 32
  79         subi    sp, 8
  80 .endm
  81
  82 .macro  RESTORE_ALL
  83         ldw     lr, (sp, 4)
  84         ldw     a0, (sp, 8)
  85         mtcr    a0, epc
  86         ldw     a0, (sp, 12)
  87         mtcr    a0, epsr
  88         btsti   a0, 31
  89         bt      1f
  90         ldw     a0, (sp, 16)
  91         mtcr    a0, ss1
  92 1:
  93         ldw     a0, (sp, 24)
  94         ldw     a1, (sp, 28)
  95         ldw     a2, (sp, 32)
  96         ldw     a3, (sp, 36)
  97
  98         addi    sp, 32
  99         addi    sp, 8
 100         ldw     r6, (sp)
 101         ldw     r7, (sp, 4)
 102         ldw     r8, (sp, 8)
 103         ldw     r9, (sp, 12)
 104         ldw     r10, (sp, 16)
 105         ldw     r11, (sp, 20)
 106         ldw     r12, (sp, 24)
 107         ldw     r13, (sp, 28)
 108         ldw     r14, (sp, 32)
 109         ldw     r1, (sp, 36)
 110         addi    sp, 32
 111         addi    sp, 8
 112
 113         bt      2f
 114         KSPTOUSP
 115 2:
 116         rte
 117 .endm
 118
 119 .macro SAVE_SWITCH_STACK
 120         subi    sp, 32
 121         stm     r8-r15, (sp)
 122 .endm
 123
 124 .macro RESTORE_SWITCH_STACK
 125         ldm     r8-r15, (sp)
 126         addi    sp, 32
 127 .endm
 128
 129 /* MMU registers operators. */
 130 .macro RD_MIR   rx
 131         cprcr   \rx, cpcr0
 132 .endm
 133
 134 .macro RD_MEH   rx
 135         cprcr   \rx, cpcr4
 136 .endm
 137
 138 .macro RD_MCIR  rx
 139         cprcr   \rx, cpcr8
 140 .endm
 141
 142 .macro RD_PGDR  rx
 143         cprcr   \rx, cpcr29
 144 .endm
 145
 146 .macro WR_MEH   rx
 147         cpwcr   \rx, cpcr4
 148 .endm
 149
 150 .macro WR_MCIR  rx
 151         cpwcr   \rx, cpcr8
 152 .endm
 153
 154 .macro SETUP_MMU
 155         /* Init psr and enable ee */
 156         lrw     r6, DEFAULT_PSR_VALUE
 157         mtcr    r6, psr
 158         psrset  ee
 159
 160         /* Select MMU as co-processor */
 161         cpseti  cp15
 162
 163         /*
 164          * cpcr30 format:
 165          * 31 - 29 | 28 - 4 | 3 | 2 | 1 | 0
 166          *   BA     Reserved  C   D   V
 167          */
 168         cprcr   r6, cpcr30
 169         lsri    r6, 29
 170         lsli    r6, 29
 171         addi    r6, 0xe
 172         cpwcr   r6, cpcr30
 173
 174         movi    r6, 0
 175         cpwcr   r6, cpcr31
 176 .endm
 177 #endif /* __ASM_CSKY_ENTRY_H */