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Linux 3.16.62
[linux/fpc-iii.git] / drivers / net / usb / asix_devices.c
blob816d511e34d33065a80cd171bab45ec25b8af3db
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 */
21
22 #include "asix.h"
23
24 #define PHY_MODE_MARVELL 0x0000
25 #define MII_MARVELL_LED_CTRL 0x0018
26 #define MII_MARVELL_STATUS 0x001b
27 #define MII_MARVELL_CTRL 0x0014
28
29 #define MARVELL_LED_MANUAL 0x0019
30
31 #define MARVELL_STATUS_HWCFG 0x0004
32
33 #define MARVELL_CTRL_TXDELAY 0x0002
34 #define MARVELL_CTRL_RXDELAY 0x0080
35
36 #define PHY_MODE_RTL8211CL 0x000C
37
38 struct ax88172_int_data {
39 __le16 res1;
40 u8 link;
41 __le16 res2;
42 u8 status;
43 __le16 res3;
44 } __packed;
45
46 static void asix_status(struct usbnet *dev, struct urb *urb)
47 {
48 struct ax88172_int_data *event;
49 int link;
50
51 if (urb->actual_length < 8)
52 return;
53
54 event = urb->transfer_buffer;
55 link = event->link & 0x01;
56 if (netif_carrier_ok(dev->net) != link) {
57 usbnet_link_change(dev, link, 1);
58 netdev_dbg(dev->net, "Link Status is: %d\n", link);
59 }
60 }
61
62 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
63 {
64 if (is_valid_ether_addr(addr)) {
65 memcpy(dev->net->dev_addr, addr, ETH_ALEN);
66 } else {
67 netdev_info(dev->net, "invalid hw address, using random\n");
68 eth_hw_addr_random(dev->net);
69 }
70 }
71
72 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
73 static u32 asix_get_phyid(struct usbnet *dev)
74 {
75 int phy_reg;
76 u32 phy_id;
77 int i;
78
79 /* Poll for the rare case the FW or phy isn't ready yet. */
80 for (i = 0; i < 100; i++) {
81 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
82 if (phy_reg != 0 && phy_reg != 0xFFFF)
83 break;
84 mdelay(1);
85 }
86
87 if (phy_reg <= 0 || phy_reg == 0xFFFF)
88 return 0;
89
90 phy_id = (phy_reg & 0xffff) << 16;
91
92 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
93 if (phy_reg < 0)
94 return 0;
95
96 phy_id |= (phy_reg & 0xffff);
97
98 return phy_id;
99 }
100
101 static u32 asix_get_link(struct net_device *net)
102 {
103 struct usbnet *dev = netdev_priv(net);
104
105 return mii_link_ok(&dev->mii);
106 }
107
108 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
109 {
110 struct usbnet *dev = netdev_priv(net);
111
112 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
113 }
114
115 /* We need to override some ethtool_ops so we require our
116 own structure so we don't interfere with other usbnet
117 devices that may be connected at the same time. */
118 static const struct ethtool_ops ax88172_ethtool_ops = {
119 .get_drvinfo = asix_get_drvinfo,
120 .get_link = asix_get_link,
121 .get_msglevel = usbnet_get_msglevel,
122 .set_msglevel = usbnet_set_msglevel,
123 .get_wol = asix_get_wol,
124 .set_wol = asix_set_wol,
125 .get_eeprom_len = asix_get_eeprom_len,
126 .get_eeprom = asix_get_eeprom,
127 .set_eeprom = asix_set_eeprom,
128 .get_settings = usbnet_get_settings,
129 .set_settings = usbnet_set_settings,
130 .nway_reset = usbnet_nway_reset,
131 };
132
133 static void ax88172_set_multicast(struct net_device *net)
134 {
135 struct usbnet *dev = netdev_priv(net);
136 struct asix_data *data = (struct asix_data *)&dev->data;
137 u8 rx_ctl = 0x8c;
138
139 if (net->flags & IFF_PROMISC) {
140 rx_ctl |= 0x01;
141 } else if (net->flags & IFF_ALLMULTI ||
142 netdev_mc_count(net) > AX_MAX_MCAST) {
143 rx_ctl |= 0x02;
144 } else if (netdev_mc_empty(net)) {
145 /* just broadcast and directed */
146 } else {
147 /* We use the 20 byte dev->data
148 * for our 8 byte filter buffer
149 * to avoid allocating memory that
150 * is tricky to free later */
151 struct netdev_hw_addr *ha;
152 u32 crc_bits;
153
154 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
155
156 /* Build the multicast hash filter. */
157 netdev_for_each_mc_addr(ha, net) {
158 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
159 data->multi_filter[crc_bits >> 3] |=
160 1 << (crc_bits & 7);
161 }
162
163 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
164 AX_MCAST_FILTER_SIZE, data->multi_filter);
165
166 rx_ctl |= 0x10;
167 }
168
169 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
170 }
171
172 static int ax88172_link_reset(struct usbnet *dev)
173 {
174 u8 mode;
175 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
176
177 mii_check_media(&dev->mii, 1, 1);
178 mii_ethtool_gset(&dev->mii, &ecmd);
179 mode = AX88172_MEDIUM_DEFAULT;
180
181 if (ecmd.duplex != DUPLEX_FULL)
182 mode |= ~AX88172_MEDIUM_FD;
183
184 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
185 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
186
187 asix_write_medium_mode(dev, mode);
188
189 return 0;
190 }
191
192 static const struct net_device_ops ax88172_netdev_ops = {
193 .ndo_open = usbnet_open,
194 .ndo_stop = usbnet_stop,
195 .ndo_start_xmit = usbnet_start_xmit,
196 .ndo_tx_timeout = usbnet_tx_timeout,
197 .ndo_change_mtu = usbnet_change_mtu,
198 .ndo_set_mac_address = eth_mac_addr,
199 .ndo_validate_addr = eth_validate_addr,
200 .ndo_do_ioctl = asix_ioctl,
201 .ndo_set_rx_mode = ax88172_set_multicast,
202 };
203
204 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
205 {
206 int ret = 0;
207 u8 buf[ETH_ALEN];
208 int i;
209 unsigned long gpio_bits = dev->driver_info->data;
210
211 usbnet_get_endpoints(dev,intf);
212
213 /* Toggle the GPIOs in a manufacturer/model specific way */
214 for (i = 2; i >= 0; i--) {
215 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
216 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
217 if (ret < 0)
218 goto out;
219 msleep(5);
220 }
221
222 ret = asix_write_rx_ctl(dev, 0x80);
223 if (ret < 0)
224 goto out;
225
226 /* Get the MAC address */
227 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
228 if (ret < 0) {
229 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
230 ret);
231 goto out;
232 }
233
234 asix_set_netdev_dev_addr(dev, buf);
235
236 /* Initialize MII structure */
237 dev->mii.dev = dev->net;
238 dev->mii.mdio_read = asix_mdio_read;
239 dev->mii.mdio_write = asix_mdio_write;
240 dev->mii.phy_id_mask = 0x3f;
241 dev->mii.reg_num_mask = 0x1f;
242 dev->mii.phy_id = asix_get_phy_addr(dev);
243
244 dev->net->netdev_ops = &ax88172_netdev_ops;
245 dev->net->ethtool_ops = &ax88172_ethtool_ops;
246 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
247 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
248
249 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
250 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
251 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
252 mii_nway_restart(&dev->mii);
253
254 return 0;
255
256 out:
257 return ret;
258 }
259
260 static const struct ethtool_ops ax88772_ethtool_ops = {
261 .get_drvinfo = asix_get_drvinfo,
262 .get_link = asix_get_link,
263 .get_msglevel = usbnet_get_msglevel,
264 .set_msglevel = usbnet_set_msglevel,
265 .get_wol = asix_get_wol,
266 .set_wol = asix_set_wol,
267 .get_eeprom_len = asix_get_eeprom_len,
268 .get_eeprom = asix_get_eeprom,
269 .set_eeprom = asix_set_eeprom,
270 .get_settings = usbnet_get_settings,
271 .set_settings = usbnet_set_settings,
272 .nway_reset = usbnet_nway_reset,
273 };
274
275 static int ax88772_link_reset(struct usbnet *dev)
276 {
277 u16 mode;
278 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
279
280 mii_check_media(&dev->mii, 1, 1);
281 mii_ethtool_gset(&dev->mii, &ecmd);
282 mode = AX88772_MEDIUM_DEFAULT;
283
284 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
285 mode &= ~AX_MEDIUM_PS;
286
287 if (ecmd.duplex != DUPLEX_FULL)
288 mode &= ~AX_MEDIUM_FD;
289
290 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
291 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
292
293 asix_write_medium_mode(dev, mode);
294
295 return 0;
296 }
297
298 static int ax88772_reset(struct usbnet *dev)
299 {
300 struct asix_data *data = (struct asix_data *)&dev->data;
301 int ret, embd_phy;
302 u16 rx_ctl;
303
304 ret = asix_write_gpio(dev,
305 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
306 if (ret < 0)
307 goto out;
308
309 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
310
311 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
312 if (ret < 0) {
313 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
314 goto out;
315 }
316
317 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
318 if (ret < 0)
319 goto out;
320
321 msleep(150);
322
323 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
324 if (ret < 0)
325 goto out;
326
327 msleep(150);
328
329 if (embd_phy) {
330 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
331 if (ret < 0)
332 goto out;
333 } else {
334 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
335 if (ret < 0)
336 goto out;
337 }
338
339 msleep(150);
340 rx_ctl = asix_read_rx_ctl(dev);
341 netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
342 ret = asix_write_rx_ctl(dev, 0x0000);
343 if (ret < 0)
344 goto out;
345
346 rx_ctl = asix_read_rx_ctl(dev);
347 netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
348
349 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
350 if (ret < 0)
351 goto out;
352
353 msleep(150);
354
355 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
356 if (ret < 0)
357 goto out;
358
359 msleep(150);
360
361 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
362 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
363 ADVERTISE_ALL | ADVERTISE_CSMA);
364 mii_nway_restart(&dev->mii);
365
366 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
367 if (ret < 0)
368 goto out;
369
370 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
371 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
372 AX88772_IPG2_DEFAULT, 0, NULL);
373 if (ret < 0) {
374 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
375 goto out;
376 }
377
378 /* Rewrite MAC address */
379 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
380 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
381 data->mac_addr);
382 if (ret < 0)
383 goto out;
384
385 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
386 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
387 if (ret < 0)
388 goto out;
389
390 rx_ctl = asix_read_rx_ctl(dev);
391 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
392 rx_ctl);
393
394 rx_ctl = asix_read_medium_status(dev);
395 netdev_dbg(dev->net,
396 "Medium Status is 0x%04x after all initializations\n",
397 rx_ctl);
398
399 return 0;
400
401 out:
402 return ret;
403
404 }
405
406 static const struct net_device_ops ax88772_netdev_ops = {
407 .ndo_open = usbnet_open,
408 .ndo_stop = usbnet_stop,
409 .ndo_start_xmit = usbnet_start_xmit,
410 .ndo_tx_timeout = usbnet_tx_timeout,
411 .ndo_change_mtu = usbnet_change_mtu,
412 .ndo_set_mac_address = asix_set_mac_address,
413 .ndo_validate_addr = eth_validate_addr,
414 .ndo_do_ioctl = asix_ioctl,
415 .ndo_set_rx_mode = asix_set_multicast,
416 };
417
418 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
419 {
420 int ret, embd_phy, i;
421 u8 buf[ETH_ALEN];
422 u32 phyid;
423
424 usbnet_get_endpoints(dev,intf);
425
426 /* Get the MAC address */
427 if (dev->driver_info->data & FLAG_EEPROM_MAC) {
428 for (i = 0; i < (ETH_ALEN >> 1); i++) {
429 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
430 0, 2, buf + i * 2);
431 if (ret < 0)
432 break;
433 }
434 } else {
435 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
436 0, 0, ETH_ALEN, buf);
437 }
438
439 if (ret < 0) {
440 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
441 return ret;
442 }
443
444 asix_set_netdev_dev_addr(dev, buf);
445
446 /* Initialize MII structure */
447 dev->mii.dev = dev->net;
448 dev->mii.mdio_read = asix_mdio_read;
449 dev->mii.mdio_write = asix_mdio_write;
450 dev->mii.phy_id_mask = 0x1f;
451 dev->mii.reg_num_mask = 0x1f;
452 dev->mii.phy_id = asix_get_phy_addr(dev);
453
454 dev->net->netdev_ops = &ax88772_netdev_ops;
455 dev->net->ethtool_ops = &ax88772_ethtool_ops;
456 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
457 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
458
459 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
460
461 /* Reset the PHY to normal operation mode */
462 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
463 if (ret < 0) {
464 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
465 return ret;
466 }
467
468 ax88772_reset(dev);
469
470 /* Read PHYID register *AFTER* the PHY was reset properly */
471 phyid = asix_get_phyid(dev);
472 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
473
474 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
475 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
476 /* hard_mtu is still the default - the device does not support
477 jumbo eth frames */
478 dev->rx_urb_size = 2048;
479 }
480
481 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
482 if (!dev->driver_priv)
483 return -ENOMEM;
484
485 return 0;
486 }
487
488 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
489 {
490 if (dev->driver_priv)
491 kfree(dev->driver_priv);
492 }
493
494 static const struct ethtool_ops ax88178_ethtool_ops = {
495 .get_drvinfo = asix_get_drvinfo,
496 .get_link = asix_get_link,
497 .get_msglevel = usbnet_get_msglevel,
498 .set_msglevel = usbnet_set_msglevel,
499 .get_wol = asix_get_wol,
500 .set_wol = asix_set_wol,
501 .get_eeprom_len = asix_get_eeprom_len,
502 .get_eeprom = asix_get_eeprom,
503 .set_eeprom = asix_set_eeprom,
504 .get_settings = usbnet_get_settings,
505 .set_settings = usbnet_set_settings,
506 .nway_reset = usbnet_nway_reset,
507 };
508
509 static int marvell_phy_init(struct usbnet *dev)
510 {
511 struct asix_data *data = (struct asix_data *)&dev->data;
512 u16 reg;
513
514 netdev_dbg(dev->net, "marvell_phy_init()\n");
515
516 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
517 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
518
519 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
520 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
521
522 if (data->ledmode) {
523 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
524 MII_MARVELL_LED_CTRL);
525 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
526
527 reg &= 0xf8ff;
528 reg |= (1 + 0x0100);
529 asix_mdio_write(dev->net, dev->mii.phy_id,
530 MII_MARVELL_LED_CTRL, reg);
531
532 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
533 MII_MARVELL_LED_CTRL);
534 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
535 reg &= 0xfc0f;
536 }
537
538 return 0;
539 }
540
541 static int rtl8211cl_phy_init(struct usbnet *dev)
542 {
543 struct asix_data *data = (struct asix_data *)&dev->data;
544
545 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
546
547 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
548 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
549 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
550 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
551 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
552
553 if (data->ledmode == 12) {
554 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
555 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
556 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
557 }
558
559 return 0;
560 }
561
562 static int marvell_led_status(struct usbnet *dev, u16 speed)
563 {
564 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
565
566 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
567
568 /* Clear out the center LED bits - 0x03F0 */
569 reg &= 0xfc0f;
570
571 switch (speed) {
572 case SPEED_1000:
573 reg |= 0x03e0;
574 break;
575 case SPEED_100:
576 reg |= 0x03b0;
577 break;
578 default:
579 reg |= 0x02f0;
580 }
581
582 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
583 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
584
585 return 0;
586 }
587
588 static int ax88178_reset(struct usbnet *dev)
589 {
590 struct asix_data *data = (struct asix_data *)&dev->data;
591 int ret;
592 __le16 eeprom;
593 u8 status;
594 int gpio0 = 0;
595 u32 phyid;
596
597 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
598 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
599
600 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
601 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
602 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
603
604 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
605
606 if (eeprom == cpu_to_le16(0xffff)) {
607 data->phymode = PHY_MODE_MARVELL;
608 data->ledmode = 0;
609 gpio0 = 1;
610 } else {
611 data->phymode = le16_to_cpu(eeprom) & 0x7F;
612 data->ledmode = le16_to_cpu(eeprom) >> 8;
613 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
614 }
615 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
616
617 /* Power up external GigaPHY through AX88178 GPIO pin */
618 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
619 if ((le16_to_cpu(eeprom) >> 8) != 1) {
620 asix_write_gpio(dev, 0x003c, 30);
621 asix_write_gpio(dev, 0x001c, 300);
622 asix_write_gpio(dev, 0x003c, 30);
623 } else {
624 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
625 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
626 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
627 }
628
629 /* Read PHYID register *AFTER* powering up PHY */
630 phyid = asix_get_phyid(dev);
631 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
632
633 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
634 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
635
636 asix_sw_reset(dev, 0);
637 msleep(150);
638
639 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
640 msleep(150);
641
642 asix_write_rx_ctl(dev, 0);
643
644 if (data->phymode == PHY_MODE_MARVELL) {
645 marvell_phy_init(dev);
646 msleep(60);
647 } else if (data->phymode == PHY_MODE_RTL8211CL)
648 rtl8211cl_phy_init(dev);
649
650 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
651 BMCR_RESET | BMCR_ANENABLE);
652 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
653 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
654 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
655 ADVERTISE_1000FULL);
656
657 mii_nway_restart(&dev->mii);
658
659 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
660 if (ret < 0)
661 return ret;
662
663 /* Rewrite MAC address */
664 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
665 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
666 data->mac_addr);
667 if (ret < 0)
668 return ret;
669
670 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
671 if (ret < 0)
672 return ret;
673
674 return 0;
675 }
676
677 static int ax88178_link_reset(struct usbnet *dev)
678 {
679 u16 mode;
680 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
681 struct asix_data *data = (struct asix_data *)&dev->data;
682 u32 speed;
683
684 netdev_dbg(dev->net, "ax88178_link_reset()\n");
685
686 mii_check_media(&dev->mii, 1, 1);
687 mii_ethtool_gset(&dev->mii, &ecmd);
688 mode = AX88178_MEDIUM_DEFAULT;
689 speed = ethtool_cmd_speed(&ecmd);
690
691 if (speed == SPEED_1000)
692 mode |= AX_MEDIUM_GM;
693 else if (speed == SPEED_100)
694 mode |= AX_MEDIUM_PS;
695 else
696 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
697
698 mode |= AX_MEDIUM_ENCK;
699
700 if (ecmd.duplex == DUPLEX_FULL)
701 mode |= AX_MEDIUM_FD;
702 else
703 mode &= ~AX_MEDIUM_FD;
704
705 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
706 speed, ecmd.duplex, mode);
707
708 asix_write_medium_mode(dev, mode);
709
710 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
711 marvell_led_status(dev, speed);
712
713 return 0;
714 }
715
716 static void ax88178_set_mfb(struct usbnet *dev)
717 {
718 u16 mfb = AX_RX_CTL_MFB_16384;
719 u16 rxctl;
720 u16 medium;
721 int old_rx_urb_size = dev->rx_urb_size;
722
723 if (dev->hard_mtu < 2048) {
724 dev->rx_urb_size = 2048;
725 mfb = AX_RX_CTL_MFB_2048;
726 } else if (dev->hard_mtu < 4096) {
727 dev->rx_urb_size = 4096;
728 mfb = AX_RX_CTL_MFB_4096;
729 } else if (dev->hard_mtu < 8192) {
730 dev->rx_urb_size = 8192;
731 mfb = AX_RX_CTL_MFB_8192;
732 } else if (dev->hard_mtu < 16384) {
733 dev->rx_urb_size = 16384;
734 mfb = AX_RX_CTL_MFB_16384;
735 }
736
737 rxctl = asix_read_rx_ctl(dev);
738 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
739
740 medium = asix_read_medium_status(dev);
741 if (dev->net->mtu > 1500)
742 medium |= AX_MEDIUM_JFE;
743 else
744 medium &= ~AX_MEDIUM_JFE;
745 asix_write_medium_mode(dev, medium);
746
747 if (dev->rx_urb_size > old_rx_urb_size)
748 usbnet_unlink_rx_urbs(dev);
749 }
750
751 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
752 {
753 struct usbnet *dev = netdev_priv(net);
754 int ll_mtu = new_mtu + net->hard_header_len + 4;
755
756 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
757
758 if (new_mtu <= 0 || ll_mtu > 16384)
759 return -EINVAL;
760
761 if ((ll_mtu % dev->maxpacket) == 0)
762 return -EDOM;
763
764 net->mtu = new_mtu;
765 dev->hard_mtu = net->mtu + net->hard_header_len;
766 ax88178_set_mfb(dev);
767
768 /* max qlen depend on hard_mtu and rx_urb_size */
769 usbnet_update_max_qlen(dev);
770
771 return 0;
772 }
773
774 static const struct net_device_ops ax88178_netdev_ops = {
775 .ndo_open = usbnet_open,
776 .ndo_stop = usbnet_stop,
777 .ndo_start_xmit = usbnet_start_xmit,
778 .ndo_tx_timeout = usbnet_tx_timeout,
779 .ndo_set_mac_address = asix_set_mac_address,
780 .ndo_validate_addr = eth_validate_addr,
781 .ndo_set_rx_mode = asix_set_multicast,
782 .ndo_do_ioctl = asix_ioctl,
783 .ndo_change_mtu = ax88178_change_mtu,
784 };
785
786 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
787 {
788 int ret;
789 u8 buf[ETH_ALEN];
790
791 usbnet_get_endpoints(dev,intf);
792
793 /* Get the MAC address */
794 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
795 if (ret < 0) {
796 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
797 return ret;
798 }
799
800 asix_set_netdev_dev_addr(dev, buf);
801
802 /* Initialize MII structure */
803 dev->mii.dev = dev->net;
804 dev->mii.mdio_read = asix_mdio_read;
805 dev->mii.mdio_write = asix_mdio_write;
806 dev->mii.phy_id_mask = 0x1f;
807 dev->mii.reg_num_mask = 0xff;
808 dev->mii.supports_gmii = 1;
809 dev->mii.phy_id = asix_get_phy_addr(dev);
810
811 dev->net->netdev_ops = &ax88178_netdev_ops;
812 dev->net->ethtool_ops = &ax88178_ethtool_ops;
813
814 /* Blink LEDS so users know driver saw dongle */
815 asix_sw_reset(dev, 0);
816 msleep(150);
817
818 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
819 msleep(150);
820
821 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
822 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
823 /* hard_mtu is still the default - the device does not support
824 jumbo eth frames */
825 dev->rx_urb_size = 2048;
826 }
827
828 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
829 if (!dev->driver_priv)
830 return -ENOMEM;
831
832 return 0;
833 }
834
835 static const struct driver_info ax8817x_info = {
836 .description = "ASIX AX8817x USB 2.0 Ethernet",
837 .bind = ax88172_bind,
838 .status = asix_status,
839 .link_reset = ax88172_link_reset,
840 .reset = ax88172_link_reset,
841 .flags = FLAG_ETHER | FLAG_LINK_INTR,
842 .data = 0x00130103,
843 };
844
845 static const struct driver_info dlink_dub_e100_info = {
846 .description = "DLink DUB-E100 USB Ethernet",
847 .bind = ax88172_bind,
848 .status = asix_status,
849 .link_reset = ax88172_link_reset,
850 .reset = ax88172_link_reset,
851 .flags = FLAG_ETHER | FLAG_LINK_INTR,
852 .data = 0x009f9d9f,
853 };
854
855 static const struct driver_info netgear_fa120_info = {
856 .description = "Netgear FA-120 USB Ethernet",
857 .bind = ax88172_bind,
858 .status = asix_status,
859 .link_reset = ax88172_link_reset,
860 .reset = ax88172_link_reset,
861 .flags = FLAG_ETHER | FLAG_LINK_INTR,
862 .data = 0x00130103,
863 };
864
865 static const struct driver_info hawking_uf200_info = {
866 .description = "Hawking UF200 USB Ethernet",
867 .bind = ax88172_bind,
868 .status = asix_status,
869 .link_reset = ax88172_link_reset,
870 .reset = ax88172_link_reset,
871 .flags = FLAG_ETHER | FLAG_LINK_INTR,
872 .data = 0x001f1d1f,
873 };
874
875 static const struct driver_info ax88772_info = {
876 .description = "ASIX AX88772 USB 2.0 Ethernet",
877 .bind = ax88772_bind,
878 .unbind = ax88772_unbind,
879 .status = asix_status,
880 .link_reset = ax88772_link_reset,
881 .reset = ax88772_link_reset,
882 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
883 .rx_fixup = asix_rx_fixup_common,
884 .tx_fixup = asix_tx_fixup,
885 };
886
887 static const struct driver_info ax88772b_info = {
888 .description = "ASIX AX88772B USB 2.0 Ethernet",
889 .bind = ax88772_bind,
890 .unbind = ax88772_unbind,
891 .status = asix_status,
892 .link_reset = ax88772_link_reset,
893 .reset = ax88772_reset,
894 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
895 FLAG_MULTI_PACKET,
896 .rx_fixup = asix_rx_fixup_common,
897 .tx_fixup = asix_tx_fixup,
898 .data = FLAG_EEPROM_MAC,
899 };
900
901 static const struct driver_info ax88178_info = {
902 .description = "ASIX AX88178 USB 2.0 Ethernet",
903 .bind = ax88178_bind,
904 .unbind = ax88772_unbind,
905 .status = asix_status,
906 .link_reset = ax88178_link_reset,
907 .reset = ax88178_reset,
908 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
909 FLAG_MULTI_PACKET,
910 .rx_fixup = asix_rx_fixup_common,
911 .tx_fixup = asix_tx_fixup,
912 };
913
914 /*
915 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
916 * no-name packaging.
917 * USB device strings are:
918 * 1: Manufacturer: USBLINK
919 * 2: Product: HG20F9 USB2.0
920 * 3: Serial: 000003
921 * Appears to be compatible with Asix 88772B.
922 */
923 static const struct driver_info hg20f9_info = {
924 .description = "HG20F9 USB 2.0 Ethernet",
925 .bind = ax88772_bind,
926 .unbind = ax88772_unbind,
927 .status = asix_status,
928 .link_reset = ax88772_link_reset,
929 .reset = ax88772_reset,
930 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
931 FLAG_MULTI_PACKET,
932 .rx_fixup = asix_rx_fixup_common,
933 .tx_fixup = asix_tx_fixup,
934 .data = FLAG_EEPROM_MAC,
935 };
936
937 static const struct usb_device_id products [] = {
938 {
939 // Linksys USB200M
940 USB_DEVICE (0x077b, 0x2226),
941 .driver_info = (unsigned long) &ax8817x_info,
942 }, {
943 // Netgear FA120
944 USB_DEVICE (0x0846, 0x1040),
945 .driver_info = (unsigned long) &netgear_fa120_info,
946 }, {
947 // DLink DUB-E100
948 USB_DEVICE (0x2001, 0x1a00),
949 .driver_info = (unsigned long) &dlink_dub_e100_info,
950 }, {
951 // Intellinet, ST Lab USB Ethernet
952 USB_DEVICE (0x0b95, 0x1720),
953 .driver_info = (unsigned long) &ax8817x_info,
954 }, {
955 // Hawking UF200, TrendNet TU2-ET100
956 USB_DEVICE (0x07b8, 0x420a),
957 .driver_info = (unsigned long) &hawking_uf200_info,
958 }, {
959 // Billionton Systems, USB2AR
960 USB_DEVICE (0x08dd, 0x90ff),
961 .driver_info = (unsigned long) &ax8817x_info,
962 }, {
963 // ATEN UC210T
964 USB_DEVICE (0x0557, 0x2009),
965 .driver_info = (unsigned long) &ax8817x_info,
966 }, {
967 // Buffalo LUA-U2-KTX
968 USB_DEVICE (0x0411, 0x003d),
969 .driver_info = (unsigned long) &ax8817x_info,
970 }, {
971 // Buffalo LUA-U2-GT 10/100/1000
972 USB_DEVICE (0x0411, 0x006e),
973 .driver_info = (unsigned long) &ax88178_info,
974 }, {
975 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
976 USB_DEVICE (0x6189, 0x182d),
977 .driver_info = (unsigned long) &ax8817x_info,
978 }, {
979 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
980 USB_DEVICE (0x0df6, 0x0056),
981 .driver_info = (unsigned long) &ax88178_info,
982 }, {
983 // corega FEther USB2-TX
984 USB_DEVICE (0x07aa, 0x0017),
985 .driver_info = (unsigned long) &ax8817x_info,
986 }, {
987 // Surecom EP-1427X-2
988 USB_DEVICE (0x1189, 0x0893),
989 .driver_info = (unsigned long) &ax8817x_info,
990 }, {
991 // goodway corp usb gwusb2e
992 USB_DEVICE (0x1631, 0x6200),
993 .driver_info = (unsigned long) &ax8817x_info,
994 }, {
995 // JVC MP-PRX1 Port Replicator
996 USB_DEVICE (0x04f1, 0x3008),
997 .driver_info = (unsigned long) &ax8817x_info,
998 }, {
999 // Lenovo U2L100P 10/100
1000 USB_DEVICE (0x17ef, 0x7203),
1001 .driver_info = (unsigned long) &ax88772_info,
1002 }, {
1003 // ASIX AX88772B 10/100
1004 USB_DEVICE (0x0b95, 0x772b),
1005 .driver_info = (unsigned long) &ax88772b_info,
1006 }, {
1007 // ASIX AX88772 10/100
1008 USB_DEVICE (0x0b95, 0x7720),
1009 .driver_info = (unsigned long) &ax88772_info,
1010 }, {
1011 // ASIX AX88178 10/100/1000
1012 USB_DEVICE (0x0b95, 0x1780),
1013 .driver_info = (unsigned long) &ax88178_info,
1014 }, {
1015 // Logitec LAN-GTJ/U2A
1016 USB_DEVICE (0x0789, 0x0160),
1017 .driver_info = (unsigned long) &ax88178_info,
1018 }, {
1019 // Linksys USB200M Rev 2
1020 USB_DEVICE (0x13b1, 0x0018),
1021 .driver_info = (unsigned long) &ax88772_info,
1022 }, {
1023 // 0Q0 cable ethernet
1024 USB_DEVICE (0x1557, 0x7720),
1025 .driver_info = (unsigned long) &ax88772_info,
1026 }, {
1027 // DLink DUB-E100 H/W Ver B1
1028 USB_DEVICE (0x07d1, 0x3c05),
1029 .driver_info = (unsigned long) &ax88772_info,
1030 }, {
1031 // DLink DUB-E100 H/W Ver B1 Alternate
1032 USB_DEVICE (0x2001, 0x3c05),
1033 .driver_info = (unsigned long) &ax88772_info,
1034 }, {
1035 // DLink DUB-E100 H/W Ver C1
1036 USB_DEVICE (0x2001, 0x1a02),
1037 .driver_info = (unsigned long) &ax88772_info,
1038 }, {
1039 // Linksys USB1000
1040 USB_DEVICE (0x1737, 0x0039),
1041 .driver_info = (unsigned long) &ax88178_info,
1042 }, {
1043 // IO-DATA ETG-US2
1044 USB_DEVICE (0x04bb, 0x0930),
1045 .driver_info = (unsigned long) &ax88178_info,
1046 }, {
1047 // Belkin F5D5055
1048 USB_DEVICE(0x050d, 0x5055),
1049 .driver_info = (unsigned long) &ax88178_info,
1050 }, {
1051 // Apple USB Ethernet Adapter
1052 USB_DEVICE(0x05ac, 0x1402),
1053 .driver_info = (unsigned long) &ax88772_info,
1054 }, {
1055 // Cables-to-Go USB Ethernet Adapter
1056 USB_DEVICE(0x0b95, 0x772a),
1057 .driver_info = (unsigned long) &ax88772_info,
1058 }, {
1059 // ABOCOM for pci
1060 USB_DEVICE(0x14ea, 0xab11),
1061 .driver_info = (unsigned long) &ax88178_info,
1062 }, {
1063 // ASIX 88772a
1064 USB_DEVICE(0x0db0, 0xa877),
1065 .driver_info = (unsigned long) &ax88772_info,
1066 }, {
1067 // Asus USB Ethernet Adapter
1068 USB_DEVICE (0x0b95, 0x7e2b),
1069 .driver_info = (unsigned long) &ax88772_info,
1070 }, {
1071 /* ASIX 88172a demo board */
1072 USB_DEVICE(0x0b95, 0x172a),
1073 .driver_info = (unsigned long) &ax88172a_info,
1074 }, {
1075 /*
1076 * USBLINK HG20F9 "USB 2.0 LAN"
1077 * Appears to have gazumped Linksys's manufacturer ID but
1078 * doesn't (yet) conflict with any known Linksys product.
1079 */
1080 USB_DEVICE(0x066b, 0x20f9),
1081 .driver_info = (unsigned long) &hg20f9_info,
1082 },
1083 { }, // END
1084 };
1085 MODULE_DEVICE_TABLE(usb, products);
1086
1087 static struct usb_driver asix_driver = {
1088 .name = DRIVER_NAME,
1089 .id_table = products,
1090 .probe = usbnet_probe,
1091 .suspend = usbnet_suspend,
1092 .resume = usbnet_resume,
1093 .disconnect = usbnet_disconnect,
1094 .supports_autosuspend = 1,
1095 .disable_hub_initiated_lpm = 1,
1096 };
1097
1098 module_usb_driver(asix_driver);
1099
1100 MODULE_AUTHOR("David Hollis");
1101 MODULE_VERSION(DRIVER_VERSION);
1102 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1103 MODULE_LICENSE("GPL");
1104
Linux with added FPC-III support