Linux 4.9.243
[linux/fpc-iii.git] / drivers / gpu / drm / bridge / adv7511 / adv7533.c
blobd7f7b7ce8ebe271c81eb5b35491f764fe3119b88
1 /*
2 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/of_graph.h>
16 #include "adv7511.h"
18 static const struct reg_sequence adv7533_fixed_registers[] = {
19 { 0x16, 0x20 },
20 { 0x9a, 0xe0 },
21 { 0xba, 0x70 },
22 { 0xde, 0x82 },
23 { 0xe4, 0x40 },
24 { 0xe5, 0x80 },
27 static const struct reg_sequence adv7533_cec_fixed_registers[] = {
28 { 0x15, 0xd0 },
29 { 0x17, 0xd0 },
30 { 0x24, 0x20 },
31 { 0x57, 0x11 },
34 static const struct regmap_config adv7533_cec_regmap_config = {
35 .reg_bits = 8,
36 .val_bits = 8,
38 .max_register = 0xff,
39 .cache_type = REGCACHE_RBTREE,
42 static void adv7511_dsi_config_timing_gen(struct adv7511 *adv)
44 struct mipi_dsi_device *dsi = adv->dsi;
45 struct drm_display_mode *mode = &adv->curr_mode;
46 unsigned int hsw, hfp, hbp, vsw, vfp, vbp;
47 u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */
49 hsw = mode->hsync_end - mode->hsync_start;
50 hfp = mode->hsync_start - mode->hdisplay;
51 hbp = mode->htotal - mode->hsync_end;
52 vsw = mode->vsync_end - mode->vsync_start;
53 vfp = mode->vsync_start - mode->vdisplay;
54 vbp = mode->vtotal - mode->vsync_end;
56 /* set pixel clock divider mode */
57 regmap_write(adv->regmap_cec, 0x16,
58 clock_div_by_lanes[dsi->lanes - 2] << 3);
60 /* horizontal porch params */
61 regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4);
62 regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff);
63 regmap_write(adv->regmap_cec, 0x2a, hsw >> 4);
64 regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff);
65 regmap_write(adv->regmap_cec, 0x2c, hfp >> 4);
66 regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff);
67 regmap_write(adv->regmap_cec, 0x2e, hbp >> 4);
68 regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff);
70 /* vertical porch params */
71 regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4);
72 regmap_write(adv->regmap_cec, 0x31, (mode->vtotal << 4) & 0xff);
73 regmap_write(adv->regmap_cec, 0x32, vsw >> 4);
74 regmap_write(adv->regmap_cec, 0x33, (vsw << 4) & 0xff);
75 regmap_write(adv->regmap_cec, 0x34, vfp >> 4);
76 regmap_write(adv->regmap_cec, 0x35, (vfp << 4) & 0xff);
77 regmap_write(adv->regmap_cec, 0x36, vbp >> 4);
78 regmap_write(adv->regmap_cec, 0x37, (vbp << 4) & 0xff);
81 void adv7533_dsi_power_on(struct adv7511 *adv)
83 struct mipi_dsi_device *dsi = adv->dsi;
85 if (adv->use_timing_gen)
86 adv7511_dsi_config_timing_gen(adv);
88 /* set number of dsi lanes */
89 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4);
91 if (adv->use_timing_gen) {
92 /* reset internal timing generator */
93 regmap_write(adv->regmap_cec, 0x27, 0xcb);
94 regmap_write(adv->regmap_cec, 0x27, 0x8b);
95 regmap_write(adv->regmap_cec, 0x27, 0xcb);
96 } else {
97 /* disable internal timing generator */
98 regmap_write(adv->regmap_cec, 0x27, 0x0b);
101 /* enable hdmi */
102 regmap_write(adv->regmap_cec, 0x03, 0x89);
103 /* disable test mode */
104 regmap_write(adv->regmap_cec, 0x55, 0x00);
106 regmap_register_patch(adv->regmap_cec, adv7533_cec_fixed_registers,
107 ARRAY_SIZE(adv7533_cec_fixed_registers));
110 void adv7533_dsi_power_off(struct adv7511 *adv)
112 /* disable hdmi */
113 regmap_write(adv->regmap_cec, 0x03, 0x0b);
114 /* disable internal timing generator */
115 regmap_write(adv->regmap_cec, 0x27, 0x0b);
118 void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode)
120 struct mipi_dsi_device *dsi = adv->dsi;
121 int lanes, ret;
123 if (adv->num_dsi_lanes != 4)
124 return;
126 if (mode->clock > 80000)
127 lanes = 4;
128 else
129 lanes = 3;
131 if (lanes != dsi->lanes) {
132 mipi_dsi_detach(dsi);
133 dsi->lanes = lanes;
134 ret = mipi_dsi_attach(dsi);
135 if (ret)
136 dev_err(&dsi->dev, "failed to change host lanes\n");
140 int adv7533_patch_registers(struct adv7511 *adv)
142 return regmap_register_patch(adv->regmap,
143 adv7533_fixed_registers,
144 ARRAY_SIZE(adv7533_fixed_registers));
147 void adv7533_uninit_cec(struct adv7511 *adv)
149 i2c_unregister_device(adv->i2c_cec);
152 int adv7533_init_cec(struct adv7511 *adv)
154 int ret;
156 adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
157 adv->i2c_main->addr - 1);
158 if (!adv->i2c_cec)
159 return -ENOMEM;
161 adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
162 &adv7533_cec_regmap_config);
163 if (IS_ERR(adv->regmap_cec)) {
164 ret = PTR_ERR(adv->regmap_cec);
165 goto err;
168 ret = regmap_register_patch(adv->regmap_cec,
169 adv7533_cec_fixed_registers,
170 ARRAY_SIZE(adv7533_cec_fixed_registers));
171 if (ret)
172 goto err;
174 return 0;
175 err:
176 adv7533_uninit_cec(adv);
177 return ret;
180 int adv7533_attach_dsi(struct adv7511 *adv)
182 struct device *dev = &adv->i2c_main->dev;
183 struct mipi_dsi_host *host;
184 struct mipi_dsi_device *dsi;
185 int ret = 0;
186 const struct mipi_dsi_device_info info = { .type = "adv7533",
187 .channel = 0,
188 .node = NULL,
191 host = of_find_mipi_dsi_host_by_node(adv->host_node);
192 if (!host) {
193 dev_err(dev, "failed to find dsi host\n");
194 return -EPROBE_DEFER;
197 dsi = mipi_dsi_device_register_full(host, &info);
198 if (IS_ERR(dsi)) {
199 dev_err(dev, "failed to create dsi device\n");
200 ret = PTR_ERR(dsi);
201 goto err_dsi_device;
204 adv->dsi = dsi;
206 dsi->lanes = adv->num_dsi_lanes;
207 dsi->format = MIPI_DSI_FMT_RGB888;
208 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
209 MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;
211 ret = mipi_dsi_attach(dsi);
212 if (ret < 0) {
213 dev_err(dev, "failed to attach dsi to host\n");
214 goto err_dsi_attach;
217 return 0;
219 err_dsi_attach:
220 mipi_dsi_device_unregister(dsi);
221 err_dsi_device:
222 return ret;
225 void adv7533_detach_dsi(struct adv7511 *adv)
227 mipi_dsi_detach(adv->dsi);
228 mipi_dsi_device_unregister(adv->dsi);
231 int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv)
233 u32 num_lanes;
234 struct device_node *endpoint;
236 of_property_read_u32(np, "adi,dsi-lanes", &num_lanes);
238 if (num_lanes < 1 || num_lanes > 4)
239 return -EINVAL;
241 adv->num_dsi_lanes = num_lanes;
243 endpoint = of_graph_get_next_endpoint(np, NULL);
244 if (!endpoint)
245 return -ENODEV;
247 adv->host_node = of_graph_get_remote_port_parent(endpoint);
248 if (!adv->host_node) {
249 of_node_put(endpoint);
250 return -ENODEV;
253 of_node_put(endpoint);
254 of_node_put(adv->host_node);
256 adv->use_timing_gen = !of_property_read_bool(np,
257 "adi,disable-timing-generator");
259 /* TODO: Check if these need to be parsed by DT or not */
260 adv->rgb = true;
261 adv->embedded_sync = false;
263 return 0;