2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
30 #include <drm/drm_atomic_helper.h>
31 #include <drm/drm_crtc.h>
32 #include "intel_drv.h"
33 #include <drm/i915_drm.h>
37 #define SIL164_ADDR 0x38
38 #define CH7xxx_ADDR 0x76
39 #define TFP410_ADDR 0x38
40 #define NS2501_ADDR 0x38
42 static const struct intel_dvo_device intel_dvo_devices
[] = {
44 .type
= INTEL_DVO_CHIP_TMDS
,
47 .dvo_srcdim_reg
= DVOC_SRCDIM
,
48 .slave_addr
= SIL164_ADDR
,
49 .dev_ops
= &sil164_ops
,
52 .type
= INTEL_DVO_CHIP_TMDS
,
55 .dvo_srcdim_reg
= DVOC_SRCDIM
,
56 .slave_addr
= CH7xxx_ADDR
,
57 .dev_ops
= &ch7xxx_ops
,
60 .type
= INTEL_DVO_CHIP_TMDS
,
63 .dvo_srcdim_reg
= DVOC_SRCDIM
,
64 .slave_addr
= 0x75, /* For some ch7010 */
65 .dev_ops
= &ch7xxx_ops
,
68 .type
= INTEL_DVO_CHIP_LVDS
,
71 .dvo_srcdim_reg
= DVOA_SRCDIM
,
72 .slave_addr
= 0x02, /* Might also be 0x44, 0x84, 0xc4 */
76 .type
= INTEL_DVO_CHIP_TMDS
,
79 .dvo_srcdim_reg
= DVOC_SRCDIM
,
80 .slave_addr
= TFP410_ADDR
,
81 .dev_ops
= &tfp410_ops
,
84 .type
= INTEL_DVO_CHIP_LVDS
,
87 .dvo_srcdim_reg
= DVOC_SRCDIM
,
89 .gpio
= GMBUS_PIN_DPB
,
90 .dev_ops
= &ch7017_ops
,
93 .type
= INTEL_DVO_CHIP_TMDS
,
96 .dvo_srcdim_reg
= DVOB_SRCDIM
,
97 .slave_addr
= NS2501_ADDR
,
98 .dev_ops
= &ns2501_ops
,
103 struct intel_encoder base
;
105 struct intel_dvo_device dev
;
107 struct intel_connector
*attached_connector
;
109 bool panel_wants_dither
;
112 static struct intel_dvo
*enc_to_dvo(struct intel_encoder
*encoder
)
114 return container_of(encoder
, struct intel_dvo
, base
);
117 static struct intel_dvo
*intel_attached_dvo(struct drm_connector
*connector
)
119 return enc_to_dvo(intel_attached_encoder(connector
));
122 static bool intel_dvo_connector_get_hw_state(struct intel_connector
*connector
)
124 struct drm_device
*dev
= connector
->base
.dev
;
125 struct drm_i915_private
*dev_priv
= to_i915(dev
);
126 struct intel_dvo
*intel_dvo
= intel_attached_dvo(&connector
->base
);
129 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
131 if (!(tmp
& DVO_ENABLE
))
134 return intel_dvo
->dev
.dev_ops
->get_hw_state(&intel_dvo
->dev
);
137 static bool intel_dvo_get_hw_state(struct intel_encoder
*encoder
,
140 struct drm_device
*dev
= encoder
->base
.dev
;
141 struct drm_i915_private
*dev_priv
= to_i915(dev
);
142 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
145 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
147 if (!(tmp
& DVO_ENABLE
))
150 *pipe
= PORT_TO_PIPE(tmp
);
155 static void intel_dvo_get_config(struct intel_encoder
*encoder
,
156 struct intel_crtc_state
*pipe_config
)
158 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
159 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
162 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
163 if (tmp
& DVO_HSYNC_ACTIVE_HIGH
)
164 flags
|= DRM_MODE_FLAG_PHSYNC
;
166 flags
|= DRM_MODE_FLAG_NHSYNC
;
167 if (tmp
& DVO_VSYNC_ACTIVE_HIGH
)
168 flags
|= DRM_MODE_FLAG_PVSYNC
;
170 flags
|= DRM_MODE_FLAG_NVSYNC
;
172 pipe_config
->base
.adjusted_mode
.flags
|= flags
;
174 pipe_config
->base
.adjusted_mode
.crtc_clock
= pipe_config
->port_clock
;
177 static void intel_disable_dvo(struct intel_encoder
*encoder
,
178 struct intel_crtc_state
*old_crtc_state
,
179 struct drm_connector_state
*old_conn_state
)
181 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
182 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
183 i915_reg_t dvo_reg
= intel_dvo
->dev
.dvo_reg
;
184 u32 temp
= I915_READ(dvo_reg
);
186 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, false);
187 I915_WRITE(dvo_reg
, temp
& ~DVO_ENABLE
);
191 static void intel_enable_dvo(struct intel_encoder
*encoder
,
192 struct intel_crtc_state
*pipe_config
,
193 struct drm_connector_state
*conn_state
)
195 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
196 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
197 i915_reg_t dvo_reg
= intel_dvo
->dev
.dvo_reg
;
198 u32 temp
= I915_READ(dvo_reg
);
200 intel_dvo
->dev
.dev_ops
->mode_set(&intel_dvo
->dev
,
201 &pipe_config
->base
.mode
,
202 &pipe_config
->base
.adjusted_mode
);
204 I915_WRITE(dvo_reg
, temp
| DVO_ENABLE
);
207 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, true);
210 static enum drm_mode_status
211 intel_dvo_mode_valid(struct drm_connector
*connector
,
212 struct drm_display_mode
*mode
)
214 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
215 const struct drm_display_mode
*fixed_mode
=
216 to_intel_connector(connector
)->panel
.fixed_mode
;
217 int max_dotclk
= to_i915(connector
->dev
)->max_dotclk_freq
;
218 int target_clock
= mode
->clock
;
220 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
221 return MODE_NO_DBLESCAN
;
223 /* XXX: Validate clock range */
226 if (mode
->hdisplay
> fixed_mode
->hdisplay
)
228 if (mode
->vdisplay
> fixed_mode
->vdisplay
)
231 target_clock
= fixed_mode
->clock
;
234 if (target_clock
> max_dotclk
)
235 return MODE_CLOCK_HIGH
;
237 return intel_dvo
->dev
.dev_ops
->mode_valid(&intel_dvo
->dev
, mode
);
240 static bool intel_dvo_compute_config(struct intel_encoder
*encoder
,
241 struct intel_crtc_state
*pipe_config
,
242 struct drm_connector_state
*conn_state
)
244 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
245 const struct drm_display_mode
*fixed_mode
=
246 intel_dvo
->attached_connector
->panel
.fixed_mode
;
247 struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
249 /* If we have timings from the BIOS for the panel, put them in
250 * to the adjusted mode. The CRTC will be set up for this mode,
251 * with the panel scaling set up to source from the H/VDisplay
252 * of the original mode.
255 intel_fixed_panel_mode(fixed_mode
, adjusted_mode
);
260 static void intel_dvo_pre_enable(struct intel_encoder
*encoder
,
261 struct intel_crtc_state
*pipe_config
,
262 struct drm_connector_state
*conn_state
)
264 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
265 struct intel_crtc
*crtc
= to_intel_crtc(pipe_config
->base
.crtc
);
266 const struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
267 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
268 int pipe
= crtc
->pipe
;
270 i915_reg_t dvo_reg
= intel_dvo
->dev
.dvo_reg
;
271 i915_reg_t dvo_srcdim_reg
= intel_dvo
->dev
.dvo_srcdim_reg
;
273 /* Save the data order, since I don't know what it should be set to. */
274 dvo_val
= I915_READ(dvo_reg
) &
275 (DVO_PRESERVE_MASK
| DVO_DATA_ORDER_GBRG
);
276 dvo_val
|= DVO_DATA_ORDER_FP
| DVO_BORDER_ENABLE
|
277 DVO_BLANK_ACTIVE_HIGH
;
280 dvo_val
|= DVO_PIPE_B_SELECT
;
281 dvo_val
|= DVO_PIPE_STALL
;
282 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
283 dvo_val
|= DVO_HSYNC_ACTIVE_HIGH
;
284 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
285 dvo_val
|= DVO_VSYNC_ACTIVE_HIGH
;
287 /*I915_WRITE(DVOB_SRCDIM,
288 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
289 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
290 I915_WRITE(dvo_srcdim_reg
,
291 (adjusted_mode
->crtc_hdisplay
<< DVO_SRCDIM_HORIZONTAL_SHIFT
) |
292 (adjusted_mode
->crtc_vdisplay
<< DVO_SRCDIM_VERTICAL_SHIFT
));
293 /*I915_WRITE(DVOB, dvo_val);*/
294 I915_WRITE(dvo_reg
, dvo_val
);
298 * Detect the output connection on our DVO device.
302 static enum drm_connector_status
303 intel_dvo_detect(struct drm_connector
*connector
, bool force
)
305 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
306 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
307 connector
->base
.id
, connector
->name
);
308 return intel_dvo
->dev
.dev_ops
->detect(&intel_dvo
->dev
);
311 static int intel_dvo_get_modes(struct drm_connector
*connector
)
313 struct drm_i915_private
*dev_priv
= to_i915(connector
->dev
);
314 const struct drm_display_mode
*fixed_mode
=
315 to_intel_connector(connector
)->panel
.fixed_mode
;
317 /* We should probably have an i2c driver get_modes function for those
318 * devices which will have a fixed set of modes determined by the chip
319 * (TV-out, for example), but for now with just TMDS and LVDS,
320 * that's not the case.
322 intel_ddc_get_modes(connector
,
323 intel_gmbus_get_adapter(dev_priv
, GMBUS_PIN_DPC
));
324 if (!list_empty(&connector
->probed_modes
))
328 struct drm_display_mode
*mode
;
329 mode
= drm_mode_duplicate(connector
->dev
, fixed_mode
);
331 drm_mode_probed_add(connector
, mode
);
339 static void intel_dvo_destroy(struct drm_connector
*connector
)
341 drm_connector_cleanup(connector
);
342 intel_panel_fini(&to_intel_connector(connector
)->panel
);
346 static const struct drm_connector_funcs intel_dvo_connector_funcs
= {
347 .dpms
= drm_atomic_helper_connector_dpms
,
348 .detect
= intel_dvo_detect
,
349 .late_register
= intel_connector_register
,
350 .early_unregister
= intel_connector_unregister
,
351 .destroy
= intel_dvo_destroy
,
352 .fill_modes
= drm_helper_probe_single_connector_modes
,
353 .atomic_get_property
= intel_connector_atomic_get_property
,
354 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
355 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
358 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs
= {
359 .mode_valid
= intel_dvo_mode_valid
,
360 .get_modes
= intel_dvo_get_modes
,
363 static void intel_dvo_enc_destroy(struct drm_encoder
*encoder
)
365 struct intel_dvo
*intel_dvo
= enc_to_dvo(to_intel_encoder(encoder
));
367 if (intel_dvo
->dev
.dev_ops
->destroy
)
368 intel_dvo
->dev
.dev_ops
->destroy(&intel_dvo
->dev
);
370 intel_encoder_destroy(encoder
);
373 static const struct drm_encoder_funcs intel_dvo_enc_funcs
= {
374 .destroy
= intel_dvo_enc_destroy
,
378 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
380 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
381 * chip being on DVOB/C and having multiple pipes.
383 static struct drm_display_mode
*
384 intel_dvo_get_current_mode(struct drm_connector
*connector
)
386 struct drm_device
*dev
= connector
->dev
;
387 struct drm_i915_private
*dev_priv
= to_i915(dev
);
388 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
389 uint32_t dvo_val
= I915_READ(intel_dvo
->dev
.dvo_reg
);
390 struct drm_display_mode
*mode
= NULL
;
392 /* If the DVO port is active, that'll be the LVDS, so we can pull out
393 * its timings to get how the BIOS set up the panel.
395 if (dvo_val
& DVO_ENABLE
) {
396 struct drm_crtc
*crtc
;
397 int pipe
= (dvo_val
& DVO_PIPE_B_SELECT
) ? 1 : 0;
399 crtc
= intel_get_crtc_for_pipe(dev
, pipe
);
401 mode
= intel_crtc_mode_get(dev
, crtc
);
403 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
404 if (dvo_val
& DVO_HSYNC_ACTIVE_HIGH
)
405 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
406 if (dvo_val
& DVO_VSYNC_ACTIVE_HIGH
)
407 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
415 static char intel_dvo_port_name(i915_reg_t dvo_reg
)
417 if (i915_mmio_reg_equal(dvo_reg
, DVOA
))
419 else if (i915_mmio_reg_equal(dvo_reg
, DVOB
))
421 else if (i915_mmio_reg_equal(dvo_reg
, DVOC
))
427 void intel_dvo_init(struct drm_device
*dev
)
429 struct drm_i915_private
*dev_priv
= to_i915(dev
);
430 struct intel_encoder
*intel_encoder
;
431 struct intel_dvo
*intel_dvo
;
432 struct intel_connector
*intel_connector
;
434 int encoder_type
= DRM_MODE_ENCODER_NONE
;
436 intel_dvo
= kzalloc(sizeof(*intel_dvo
), GFP_KERNEL
);
440 intel_connector
= intel_connector_alloc();
441 if (!intel_connector
) {
446 intel_dvo
->attached_connector
= intel_connector
;
448 intel_encoder
= &intel_dvo
->base
;
450 intel_encoder
->disable
= intel_disable_dvo
;
451 intel_encoder
->enable
= intel_enable_dvo
;
452 intel_encoder
->get_hw_state
= intel_dvo_get_hw_state
;
453 intel_encoder
->get_config
= intel_dvo_get_config
;
454 intel_encoder
->compute_config
= intel_dvo_compute_config
;
455 intel_encoder
->pre_enable
= intel_dvo_pre_enable
;
456 intel_connector
->get_hw_state
= intel_dvo_connector_get_hw_state
;
458 /* Now, try to find a controller */
459 for (i
= 0; i
< ARRAY_SIZE(intel_dvo_devices
); i
++) {
460 struct drm_connector
*connector
= &intel_connector
->base
;
461 const struct intel_dvo_device
*dvo
= &intel_dvo_devices
[i
];
462 struct i2c_adapter
*i2c
;
466 uint32_t dpll
[I915_MAX_PIPES
];
468 /* Allow the I2C driver info to specify the GPIO to be used in
469 * special cases, but otherwise default to what's defined
472 if (intel_gmbus_is_valid_pin(dev_priv
, dvo
->gpio
))
474 else if (dvo
->type
== INTEL_DVO_CHIP_LVDS
)
475 gpio
= GMBUS_PIN_SSC
;
477 gpio
= GMBUS_PIN_DPB
;
479 /* Set up the I2C bus necessary for the chip we're probing.
480 * It appears that everything is on GPIOE except for panels
481 * on i830 laptops, which are on GPIOB (DVOA).
483 i2c
= intel_gmbus_get_adapter(dev_priv
, gpio
);
485 intel_dvo
->dev
= *dvo
;
487 /* GMBUS NAK handling seems to be unstable, hence let the
488 * transmitter detection run in bit banging mode for now.
490 intel_gmbus_force_bit(i2c
, true);
492 /* ns2501 requires the DVO 2x clock before it will
493 * respond to i2c accesses, so make sure we have
494 * have the clock enabled before we attempt to
495 * initialize the device.
497 for_each_pipe(dev_priv
, pipe
) {
498 dpll
[pipe
] = I915_READ(DPLL(pipe
));
499 I915_WRITE(DPLL(pipe
), dpll
[pipe
] | DPLL_DVO_2X_MODE
);
502 dvoinit
= dvo
->dev_ops
->init(&intel_dvo
->dev
, i2c
);
504 /* restore the DVO 2x clock state to original */
505 for_each_pipe(dev_priv
, pipe
) {
506 I915_WRITE(DPLL(pipe
), dpll
[pipe
]);
509 intel_gmbus_force_bit(i2c
, false);
514 drm_encoder_init(dev
, &intel_encoder
->base
,
515 &intel_dvo_enc_funcs
, encoder_type
,
516 "DVO %c", intel_dvo_port_name(dvo
->dvo_reg
));
518 intel_encoder
->type
= INTEL_OUTPUT_DVO
;
519 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1);
521 case INTEL_DVO_CHIP_TMDS
:
522 intel_encoder
->cloneable
= (1 << INTEL_OUTPUT_ANALOG
) |
523 (1 << INTEL_OUTPUT_DVO
);
524 drm_connector_init(dev
, connector
,
525 &intel_dvo_connector_funcs
,
526 DRM_MODE_CONNECTOR_DVII
);
527 encoder_type
= DRM_MODE_ENCODER_TMDS
;
529 case INTEL_DVO_CHIP_LVDS
:
530 intel_encoder
->cloneable
= 0;
531 drm_connector_init(dev
, connector
,
532 &intel_dvo_connector_funcs
,
533 DRM_MODE_CONNECTOR_LVDS
);
534 encoder_type
= DRM_MODE_ENCODER_LVDS
;
538 drm_connector_helper_add(connector
,
539 &intel_dvo_connector_helper_funcs
);
540 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
541 connector
->interlace_allowed
= false;
542 connector
->doublescan_allowed
= false;
544 intel_connector_attach_encoder(intel_connector
, intel_encoder
);
545 if (dvo
->type
== INTEL_DVO_CHIP_LVDS
) {
546 /* For our LVDS chipsets, we should hopefully be able
547 * to dig the fixed panel mode out of the BIOS data.
548 * However, it's in a different format from the BIOS
549 * data on chipsets with integrated LVDS (stored in AIM
550 * headers, likely), so for now, just get the current
551 * mode being output through DVO.
553 intel_panel_init(&intel_connector
->panel
,
554 intel_dvo_get_current_mode(connector
),
556 intel_dvo
->panel_wants_dither
= true;
563 kfree(intel_connector
);