arch/arm/mach-s3c64xx/mach-smdk6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12 */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/types.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/list.h>
  18 #include <linux/timer.h>
  19 #include <linux/init.h>
  20 #include <linux/serial_core.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/io.h>
  23 #include <linux/i2c.h>
  24 #include <linux/leds.h>
  25 #include <linux/fb.h>
  26 #include <linux/gpio.h>
  27 #include <linux/delay.h>
  28 #include <linux/smsc911x.h>
  29 #include <linux/regulator/fixed.h>
  30
  31 #ifdef CONFIG_SMDK6410_WM1190_EV1
  32 #include <linux/mfd/wm8350/core.h>
  33 #include <linux/mfd/wm8350/pmic.h>
  34 #endif
  35
  36 #ifdef CONFIG_SMDK6410_WM1192_EV1
  37 #include <linux/mfd/wm831x/core.h>
  38 #include <linux/mfd/wm831x/pdata.h>
  39 #endif
  40
  41 #include <video/platform_lcd.h>
  42
  43 #include <asm/mach/arch.h>
  44 #include <asm/mach/map.h>
  45 #include <asm/mach/irq.h>
  46
  47 #include <mach/hardware.h>
  48 #include <mach/regs-fb.h>
  49 #include <mach/map.h>
  50
  51 #include <asm/irq.h>
  52 #include <asm/mach-types.h>
  53
  54 #include <plat/regs-serial.h>
  55 #include <mach/regs-modem.h>
  56 #include <mach/regs-gpio.h>
  57 #include <mach/regs-sys.h>
  58 #include <mach/regs-srom.h>
  59 #include <plat/iic.h>
  60 #include <plat/fb.h>
  61 #include <plat/gpio-cfg.h>
  62
  63 #include <mach/s3c6410.h>
  64 #include <plat/clock.h>
  65 #include <plat/devs.h>
  66 #include <plat/cpu.h>
  67 #include <plat/adc.h>
  68 #include <plat/ts.h>
  69
  70 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  71 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  72 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  73
  74 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  75         [0] = {
  76                 .hwport      = 0,
  77                 .flags       = 0,
  78                 .ucon        = UCON,
  79                 .ulcon       = ULCON,
  80                 .ufcon       = UFCON,
  81         },
  82         [1] = {
  83                 .hwport      = 1,
  84                 .flags       = 0,
  85                 .ucon        = UCON,
  86                 .ulcon       = ULCON,
  87                 .ufcon       = UFCON,
  88         },
  89         [2] = {
  90                 .hwport      = 2,
  91                 .flags       = 0,
  92                 .ucon        = UCON,
  93                 .ulcon       = ULCON,
  94                 .ufcon       = UFCON,
  95         },
  96         [3] = {
  97                 .hwport      = 3,
  98                 .flags       = 0,
  99                 .ucon        = UCON,
 100                 .ulcon       = ULCON,
 101                 .ufcon       = UFCON,
 102         },
 103 };
 104
 105 /* framebuffer and LCD setup. */
 106
 107 /* GPF15 = LCD backlight control
 108  * GPF13 => Panel power
 109  * GPN5 = LCD nRESET signal
 110  * PWM_TOUT1 => backlight brightness
 111  */
 112
 113 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
 114                                    unsigned int power)
 115 {
 116         if (power) {
 117                 gpio_direction_output(S3C64XX_GPF(13), 1);
 118                 gpio_direction_output(S3C64XX_GPF(15), 1);
 119
 120                 /* fire nRESET on power up */
 121                 gpio_direction_output(S3C64XX_GPN(5), 0);
 122                 msleep(10);
 123                 gpio_direction_output(S3C64XX_GPN(5), 1);
 124                 msleep(1);
 125         } else {
 126                 gpio_direction_output(S3C64XX_GPF(15), 0);
 127                 gpio_direction_output(S3C64XX_GPF(13), 0);
 128         }
 129 }
 130
 131 static struct plat_lcd_data smdk6410_lcd_power_data = {
 132         .set_power      = smdk6410_lcd_power_set,
 133 };
 134
 135 static struct platform_device smdk6410_lcd_powerdev = {
 136         .name                   = "platform-lcd",
 137         .dev.parent             = &s3c_device_fb.dev,
 138         .dev.platform_data      = &smdk6410_lcd_power_data,
 139 };
 140
 141 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
 142         /* this is to ensure we use win0 */
 143         .win_mode       = {
 144                 .pixclock       = 41094,
 145                 .left_margin    = 8,
 146                 .right_margin   = 13,
 147                 .upper_margin   = 7,
 148                 .lower_margin   = 5,
 149                 .hsync_len      = 3,
 150                 .vsync_len      = 1,
 151                 .xres           = 800,
 152                 .yres           = 480,
 153         },
 154         .max_bpp        = 32,
 155         .default_bpp    = 16,
 156 };
 157
 158 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
 159 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
 160         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 161         .win[0]         = &smdk6410_fb_win0,
 162         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 163         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 164 };
 165
 166 /*
 167  * Configuring Ethernet on SMDK6410
 168  *
 169  * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
 170  * The constant address below corresponds to nCS1
 171  *
 172  *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
 173  *  2) CFG6 needs to be switched to "LAN9115" side
 174  */
 175
 176 static struct resource smdk6410_smsc911x_resources[] = {
 177         [0] = {
 178                 .start = S3C64XX_PA_XM0CSN1,
 179                 .end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
 180                 .flags = IORESOURCE_MEM,
 181         },
 182         [1] = {
 183                 .start = S3C_EINT(10),
 184                 .end   = S3C_EINT(10),
 185                 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
 186         },
 187 };
 188
 189 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
 190         .irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 191         .irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 192         .flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
 193         .phy_interface = PHY_INTERFACE_MODE_MII,
 194 };
 195
 196
 197 static struct platform_device smdk6410_smsc911x = {
 198         .name          = "smsc911x",
 199         .id            = -1,
 200         .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
 201         .resource      = &smdk6410_smsc911x_resources[0],
 202         .dev = {
 203                 .platform_data = &smdk6410_smsc911x_pdata,
 204         },
 205 };
 206
 207 #ifdef CONFIG_REGULATOR
 208 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
 209         {
 210                 /* WM8580 */
 211                 .supply = "PVDD",
 212                 .dev_name = "0-001b",
 213         },
 214         {
 215                 /* WM8580 */
 216                 .supply = "AVDD",
 217                 .dev_name = "0-001b",
 218         },
 219 };
 220
 221 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
 222         .constraints = {
 223                 .always_on = 1,
 224         },
 225         .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
 226         .consumer_supplies = smdk6410_b_pwr_5v_consumers,
 227 };
 228
 229 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
 230         .supply_name = "B_PWR_5V",
 231         .microvolts = 5000000,
 232         .init_data = &smdk6410_b_pwr_5v_data,
 233         .gpio = -EINVAL,
 234 };
 235
 236 static struct platform_device smdk6410_b_pwr_5v = {
 237         .name          = "reg-fixed-voltage",
 238         .id            = -1,
 239         .dev = {
 240                 .platform_data = &smdk6410_b_pwr_5v_pdata,
 241         },
 242 };
 243 #endif
 244
 245 static struct map_desc smdk6410_iodesc[] = {};
 246
 247 static struct platform_device *smdk6410_devices[] __initdata = {
 248 #ifdef CONFIG_SMDK6410_SD_CH0
 249         &s3c_device_hsmmc0,
 250 #endif
 251 #ifdef CONFIG_SMDK6410_SD_CH1
 252         &s3c_device_hsmmc1,
 253 #endif
 254         &s3c_device_i2c0,
 255         &s3c_device_i2c1,
 256         &s3c_device_fb,
 257         &s3c_device_ohci,
 258         &s3c_device_usb_hsotg,
 259         &s3c64xx_device_iisv4,
 260
 261 #ifdef CONFIG_REGULATOR
 262         &smdk6410_b_pwr_5v,
 263 #endif
 264         &smdk6410_lcd_powerdev,
 265
 266         &smdk6410_smsc911x,
 267         &s3c_device_adc,
 268         &s3c_device_ts,
 269         &s3c_device_wdt,
 270 };
 271
 272 #ifdef CONFIG_REGULATOR
 273 /* ARM core */
 274 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
 275         {
 276                 .supply = "vddarm",
 277         }
 278 };
 279
 280 /* VDDARM, BUCK1 on J5 */
 281 static struct regulator_init_data smdk6410_vddarm = {
 282         .constraints = {
 283                 .name = "PVDD_ARM",
 284                 .min_uV = 1000000,
 285                 .max_uV = 1300000,
 286                 .always_on = 1,
 287                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 288         },
 289         .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
 290         .consumer_supplies = smdk6410_vddarm_consumers,
 291 };
 292
 293 /* VDD_INT, BUCK2 on J5 */
 294 static struct regulator_init_data smdk6410_vddint = {
 295         .constraints = {
 296                 .name = "PVDD_INT",
 297                 .min_uV = 1000000,
 298                 .max_uV = 1200000,
 299                 .always_on = 1,
 300                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 301         },
 302 };
 303
 304 /* VDD_HI, LDO3 on J5 */
 305 static struct regulator_init_data smdk6410_vddhi = {
 306         .constraints = {
 307                 .name = "PVDD_HI",
 308                 .always_on = 1,
 309         },
 310 };
 311
 312 /* VDD_PLL, LDO2 on J5 */
 313 static struct regulator_init_data smdk6410_vddpll = {
 314         .constraints = {
 315                 .name = "PVDD_PLL",
 316                 .always_on = 1,
 317         },
 318 };
 319
 320 /* VDD_UH_MMC, LDO5 on J5 */
 321 static struct regulator_init_data smdk6410_vdduh_mmc = {
 322         .constraints = {
 323                 .name = "PVDD_UH/PVDD_MMC",
 324                 .always_on = 1,
 325         },
 326 };
 327
 328 /* VCCM3BT, LDO8 on J5 */
 329 static struct regulator_init_data smdk6410_vccmc3bt = {
 330         .constraints = {
 331                 .name = "PVCCM3BT",
 332                 .always_on = 1,
 333         },
 334 };
 335
 336 /* VCCM2MTV, LDO11 on J5 */
 337 static struct regulator_init_data smdk6410_vccm2mtv = {
 338         .constraints = {
 339                 .name = "PVCCM2MTV",
 340                 .always_on = 1,
 341         },
 342 };
 343
 344 /* VDD_LCD, LDO12 on J5 */
 345 static struct regulator_init_data smdk6410_vddlcd = {
 346         .constraints = {
 347                 .name = "PVDD_LCD",
 348                 .always_on = 1,
 349         },
 350 };
 351
 352 /* VDD_OTGI, LDO9 on J5 */
 353 static struct regulator_init_data smdk6410_vddotgi = {
 354         .constraints = {
 355                 .name = "PVDD_OTGI",
 356                 .always_on = 1,
 357         },
 358 };
 359
 360 /* VDD_OTG, LDO14 on J5 */
 361 static struct regulator_init_data smdk6410_vddotg = {
 362         .constraints = {
 363                 .name = "PVDD_OTG",
 364                 .always_on = 1,
 365         },
 366 };
 367
 368 /* VDD_ALIVE, LDO15 on J5 */
 369 static struct regulator_init_data smdk6410_vddalive = {
 370         .constraints = {
 371                 .name = "PVDD_ALIVE",
 372                 .always_on = 1,
 373         },
 374 };
 375
 376 /* VDD_AUDIO, VLDO_AUDIO on J5 */
 377 static struct regulator_init_data smdk6410_vddaudio = {
 378         .constraints = {
 379                 .name = "PVDD_AUDIO",
 380                 .always_on = 1,
 381         },
 382 };
 383 #endif
 384
 385 #ifdef CONFIG_SMDK6410_WM1190_EV1
 386 /* S3C64xx internal logic & PLL */
 387 static struct regulator_init_data wm8350_dcdc1_data = {
 388         .constraints = {
 389                 .name = "PVDD_INT/PVDD_PLL",
 390                 .min_uV = 1200000,
 391                 .max_uV = 1200000,
 392                 .always_on = 1,
 393                 .apply_uV = 1,
 394         },
 395 };
 396
 397 /* Memory */
 398 static struct regulator_init_data wm8350_dcdc3_data = {
 399         .constraints = {
 400                 .name = "PVDD_MEM",
 401                 .min_uV = 1800000,
 402                 .max_uV = 1800000,
 403                 .always_on = 1,
 404                 .state_mem = {
 405                          .uV = 1800000,
 406                          .mode = REGULATOR_MODE_NORMAL,
 407                          .enabled = 1,
 408                 },
 409                 .initial_state = PM_SUSPEND_MEM,
 410         },
 411 };
 412
 413 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
 414 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
 415         {
 416                 /* WM8580 */
 417                 .supply = "DVDD",
 418                 .dev_name = "0-001b",
 419         },
 420 };
 421
 422 static struct regulator_init_data wm8350_dcdc4_data = {
 423         .constraints = {
 424                 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
 425                 .min_uV = 3000000,
 426                 .max_uV = 3000000,
 427                 .always_on = 1,
 428         },
 429         .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
 430         .consumer_supplies = wm8350_dcdc4_consumers,
 431 };
 432
 433 /* OTGi/1190-EV1 HPVDD & AVDD */
 434 static struct regulator_init_data wm8350_ldo4_data = {
 435         .constraints = {
 436                 .name = "PVDD_OTGI/HPVDD/AVDD",
 437                 .min_uV = 1200000,
 438                 .max_uV = 1200000,
 439                 .apply_uV = 1,
 440                 .always_on = 1,
 441         },
 442 };
 443
 444 static struct {
 445         int regulator;
 446         struct regulator_init_data *initdata;
 447 } wm1190_regulators[] = {
 448         { WM8350_DCDC_1, &wm8350_dcdc1_data },
 449         { WM8350_DCDC_3, &wm8350_dcdc3_data },
 450         { WM8350_DCDC_4, &wm8350_dcdc4_data },
 451         { WM8350_DCDC_6, &smdk6410_vddarm },
 452         { WM8350_LDO_1, &smdk6410_vddalive },
 453         { WM8350_LDO_2, &smdk6410_vddotg },
 454         { WM8350_LDO_3, &smdk6410_vddlcd },
 455         { WM8350_LDO_4, &wm8350_ldo4_data },
 456 };
 457
 458 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
 459 {
 460         int i;
 461
 462         /* Configure the IRQ line */
 463         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 464
 465         /* Instantiate the regulators */
 466         for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
 467                 wm8350_register_regulator(wm8350,
 468                                           wm1190_regulators[i].regulator,
 469                                           wm1190_regulators[i].initdata);
 470
 471         return 0;
 472 }
 473
 474 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
 475         .init = smdk6410_wm8350_init,
 476         .irq_high = 1,
 477         .irq_base = IRQ_BOARD_START,
 478 };
 479 #endif
 480
 481 #ifdef CONFIG_SMDK6410_WM1192_EV1
 482 static struct gpio_led wm1192_pmic_leds[] = {
 483         {
 484                 .name = "PMIC:red:power",
 485                 .gpio = GPIO_BOARD_START + 3,
 486                 .default_state = LEDS_GPIO_DEFSTATE_ON,
 487         },
 488 };
 489
 490 static struct gpio_led_platform_data wm1192_pmic_led = {
 491         .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
 492         .leds = wm1192_pmic_leds,
 493 };
 494
 495 static struct platform_device wm1192_pmic_led_dev = {
 496         .name          = "leds-gpio",
 497         .id            = -1,
 498         .dev = {
 499                 .platform_data = &wm1192_pmic_led,
 500         },
 501 };
 502
 503 static int wm1192_pre_init(struct wm831x *wm831x)
 504 {
 505         int ret;
 506
 507         /* Configure the IRQ line */
 508         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 509
 510         ret = platform_device_register(&wm1192_pmic_led_dev);
 511         if (ret != 0)
 512                 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
 513
 514         return 0;
 515 }
 516
 517 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
 518         .isink = 1,
 519         .max_uA = 27554,
 520 };
 521
 522 static struct regulator_init_data wm1192_dcdc3 = {
 523         .constraints = {
 524                 .name = "PVDD_MEM/PVDD_GPS",
 525                 .always_on = 1,
 526         },
 527 };
 528
 529 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
 530         { .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
 531 };
 532
 533 static struct regulator_init_data wm1192_ldo1 = {
 534         .constraints = {
 535                 .name = "PVDD_LCD/PVDD_EXT",
 536                 .always_on = 1,
 537         },
 538         .consumer_supplies = wm1192_ldo1_consumers,
 539         .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
 540 };
 541
 542 static struct wm831x_status_pdata wm1192_led7_pdata = {
 543         .name = "LED7:green:",
 544 };
 545
 546 static struct wm831x_status_pdata wm1192_led8_pdata = {
 547         .name = "LED8:green:",
 548 };
 549
 550 static struct wm831x_pdata smdk6410_wm1192_pdata = {
 551         .pre_init = wm1192_pre_init,
 552         .irq_base = IRQ_BOARD_START,
 553
 554         .backlight = &wm1192_backlight_pdata,
 555         .dcdc = {
 556                 &smdk6410_vddarm,  /* DCDC1 */
 557                 &smdk6410_vddint,  /* DCDC2 */
 558                 &wm1192_dcdc3,
 559         },
 560         .gpio_base = GPIO_BOARD_START,
 561         .ldo = {
 562                  &wm1192_ldo1,        /* LDO1 */
 563                  &smdk6410_vdduh_mmc, /* LDO2 */
 564                  NULL,                /* LDO3 NC */
 565                  &smdk6410_vddotgi,   /* LDO4 */
 566                  &smdk6410_vddotg,    /* LDO5 */
 567                  &smdk6410_vddhi,     /* LDO6 */
 568                  &smdk6410_vddaudio,  /* LDO7 */
 569                  &smdk6410_vccm2mtv,  /* LDO8 */
 570                  &smdk6410_vddpll,    /* LDO9 */
 571                  &smdk6410_vccmc3bt,  /* LDO10 */
 572                  &smdk6410_vddalive,  /* LDO11 */
 573         },
 574         .status = {
 575                 &wm1192_led7_pdata,
 576                 &wm1192_led8_pdata,
 577         },
 578 };
 579 #endif
 580
 581 static struct i2c_board_info i2c_devs0[] __initdata = {
 582         { I2C_BOARD_INFO("24c08", 0x50), },
 583         { I2C_BOARD_INFO("wm8580", 0x1b), },
 584
 585 #ifdef CONFIG_SMDK6410_WM1192_EV1
 586         { I2C_BOARD_INFO("wm8312", 0x34),
 587           .platform_data = &smdk6410_wm1192_pdata,
 588           .irq = S3C_EINT(12),
 589         },
 590 #endif
 591
 592 #ifdef CONFIG_SMDK6410_WM1190_EV1
 593         { I2C_BOARD_INFO("wm8350", 0x1a),
 594           .platform_data = &smdk6410_wm8350_pdata,
 595           .irq = S3C_EINT(12),
 596         },
 597 #endif
 598 };
 599
 600 static struct i2c_board_info i2c_devs1[] __initdata = {
 601         { I2C_BOARD_INFO("24c128", 0x57), },    /* Samsung S524AD0XD1 */
 602 };
 603
 604 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
 605         .delay                  = 10000,
 606         .presc                  = 49,
 607         .oversampling_shift     = 2,
 608 };
 609
 610 static void __init smdk6410_map_io(void)
 611 {
 612         u32 tmp;
 613
 614         s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
 615         s3c24xx_init_clocks(12000000);
 616         s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
 617
 618         /* set the LCD type */
 619
 620         tmp = __raw_readl(S3C64XX_SPCON);
 621         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 622         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 623         __raw_writel(tmp, S3C64XX_SPCON);
 624
 625         /* remove the lcd bypass */
 626         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 627         tmp &= ~MIFPCON_LCD_BYPASS;
 628         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 629 }
 630
 631 static void __init smdk6410_machine_init(void)
 632 {
 633         u32 cs1;
 634
 635         s3c_i2c0_set_platdata(NULL);
 636         s3c_i2c1_set_platdata(NULL);
 637         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 638
 639         s3c24xx_ts_set_platdata(&s3c_ts_platform);
 640
 641         /* configure nCS1 width to 16 bits */
 642
 643         cs1 = __raw_readl(S3C64XX_SROM_BW) &
 644                     ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 645         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 646                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 647                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 648                                                    S3C64XX_SROM_BW__NCS1__SHIFT;
 649         __raw_writel(cs1, S3C64XX_SROM_BW);
 650
 651         /* set timing for nCS1 suitable for ethernet chip */
 652
 653         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 654                      (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 655                      (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 656                      (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 657                      (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
 658                      (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 659                      (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 660
 661         gpio_request(S3C64XX_GPN(5), "LCD power");
 662         gpio_request(S3C64XX_GPF(13), "LCD power");
 663         gpio_request(S3C64XX_GPF(15), "LCD power");
 664
 665         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
 666         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 667
 668         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
 669 }
 670
 671 MACHINE_START(SMDK6410, "SMDK6410")
 672         /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
 673         .phys_io        = S3C_PA_UART & 0xfff00000,
 674         .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
 675         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
 676
 677         .init_irq       = s3c6410_init_irq,
 678         .map_io         = smdk6410_map_io,
 679         .init_machine   = smdk6410_machine_init,
 680         .timer          = &s3c24xx_timer,
 681 MACHINE_END