arch/arm/mach-spear6xx/include/mach/entry-macro.S

   1 /*
   2  * arch/arm/mach-spear6xx/include/mach/entry-macro.S
   3  *
   4  * Low-level IRQ helper macros for SPEAr6xx machine family
   5  *
   6  * Copyright (C) 2009 ST Microelectronics
   7  * Rajeev Kumar<rajeev-dlh.kumar@st.com>
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2. This program is licensed "as is" without any
  11  * warranty of any kind, whether express or implied.
  12  */
  13
  14 #include <mach/hardware.h>
  15 #include <mach/spear.h>
  16 #include <asm/hardware/vic.h>
  17
  18                 .macro  disable_fiq
  19                 .endm
  20
  21                 .macro  get_irqnr_preamble, base, tmp
  22                 .endm
  23
  24                 .macro  arch_ret_to_user, tmp1, tmp2
  25                 .endm
  26
  27                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
  28                 ldr     \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
  29                 ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get status
  30                 mov     \irqnr, #0
  31                 teq     \irqstat, #0
  32                 bne     1001f
  33                 ldr     \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
  34                 ldr     \irqstat, [\base, #VIC_IRQ_STATUS]      @ get status
  35                 teq     \irqstat, #0
  36                 beq     1002f                           @ this will set/reset
  37                                                         @ zero register
  38                 mov     \irqnr, #32
  39 1001:
  40                 /*
  41                  * Following code will find bit position of least significang
  42                  * bit set in irqstat, using following equation
  43                  * least significant bit set in n = (n & ~(n-1))
  44                  */
  45                 sub     \tmp, \irqstat, #1              @ tmp = irqstat - 1
  46                 mvn     \tmp, \tmp                      @ tmp = ~tmp
  47                 and     \irqstat, \irqstat, \tmp        @ irqstat &= tmp
  48                 /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
  49                 clz     \tmp, \irqstat                  @ tmp = leading zeros
  50
  51                 rsb     \tmp, \tmp, #0x1F               @ tmp = 32 - tmp - 1
  52                 add     \irqnr, \irqnr, \tmp
  53
  54 1002:           /* EQ will be set if no irqs pending */
  55                 .endm