Merge branch 'for-linus' of git://oss.sgi.com/xfs/xfs
[linux/fpc-iii.git] / arch / cris / arch-v10 / drivers / eeprom.c
blobc3405507a3d1f0dc846483f110dc4e9afea57af7
1 /*!*****************************************************************************
2 *!
3 *! Implements an interface for i2c compatible eeproms to run under Linux.
4 *! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustments by
5 *! Johan.Adolfsson@axis.com
6 *!
7 *! Probing results:
8 *! 8k or not is detected (the assumes 2k or 16k)
9 *! 2k or 16k detected using test reads and writes.
11 *!------------------------------------------------------------------------
12 *! HISTORY
14 *! DATE NAME CHANGES
15 *! ---- ---- -------
16 *! Aug 28 1999 Edgar Iglesias Initial Version
17 *! Aug 31 1999 Edgar Iglesias Allow simultaneous users.
18 *! Sep 03 1999 Edgar Iglesias Updated probe.
19 *! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted
20 *! in the spin-lock.
22 *! (c) 1999 Axis Communications AB, Lund, Sweden
23 *!*****************************************************************************/
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/fs.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/interrupt.h>
31 #include <linux/smp_lock.h>
32 #include <linux/wait.h>
33 #include <asm/uaccess.h>
34 #include "i2c.h"
36 #define D(x)
38 /* If we should use adaptive timing or not: */
39 /* #define EEPROM_ADAPTIVE_TIMING */
41 #define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */
42 #define EEPROM_MINOR_NR 0
44 /* Empirical sane initial value of the delay, the value will be adapted to
45 * what the chip needs when using EEPROM_ADAPTIVE_TIMING.
47 #define INITIAL_WRITEDELAY_US 4000
48 #define MAX_WRITEDELAY_US 10000 /* 10 ms according to spec for 2KB EEPROM */
50 /* This one defines how many times to try when eeprom fails. */
51 #define EEPROM_RETRIES 10
53 #define EEPROM_2KB (2 * 1024)
54 /*#define EEPROM_4KB (4 * 1024)*/ /* Exists but not used in Axis products */
55 #define EEPROM_8KB (8 * 1024 - 1 ) /* Last byte has write protection bit */
56 #define EEPROM_16KB (16 * 1024)
58 #define i2c_delay(x) udelay(x)
61 * This structure describes the attached eeprom chip.
62 * The values are probed for.
65 struct eeprom_type
67 unsigned long size;
68 unsigned long sequential_write_pagesize;
69 unsigned char select_cmd;
70 unsigned long usec_delay_writecycles; /* Min time between write cycles
71 (up to 10ms for some models) */
72 unsigned long usec_delay_step; /* For adaptive algorithm */
73 int adapt_state; /* 1 = To high , 0 = Even, -1 = To low */
75 /* this one is to keep the read/write operations atomic */
76 struct mutex lock;
77 int retry_cnt_addr; /* Used to keep track of number of retries for
78 adaptive timing adjustments */
79 int retry_cnt_read;
82 static int eeprom_open(struct inode * inode, struct file * file);
83 static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig);
84 static ssize_t eeprom_read(struct file * file, char * buf, size_t count,
85 loff_t *off);
86 static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
87 loff_t *off);
88 static int eeprom_close(struct inode * inode, struct file * file);
90 static int eeprom_address(unsigned long addr);
91 static int read_from_eeprom(char * buf, int count);
92 static int eeprom_write_buf(loff_t addr, const char * buf, int count);
93 static int eeprom_read_buf(loff_t addr, char * buf, int count);
95 static void eeprom_disable_write_protect(void);
98 static const char eeprom_name[] = "eeprom";
100 /* chip description */
101 static struct eeprom_type eeprom;
103 /* This is the exported file-operations structure for this device. */
104 const struct file_operations eeprom_fops =
106 .llseek = eeprom_lseek,
107 .read = eeprom_read,
108 .write = eeprom_write,
109 .open = eeprom_open,
110 .release = eeprom_close
113 /* eeprom init call. Probes for different eeprom models. */
115 int __init eeprom_init(void)
117 mutex_init(&eeprom.lock);
119 #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
120 #define EETEXT "Found"
121 #else
122 #define EETEXT "Assuming"
123 #endif
124 if (register_chrdev(EEPROM_MAJOR_NR, eeprom_name, &eeprom_fops))
126 printk(KERN_INFO "%s: unable to get major %d for eeprom device\n",
127 eeprom_name, EEPROM_MAJOR_NR);
128 return -1;
131 printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
134 * Note: Most of this probing method was taken from the printserver (5470e)
135 * codebase. It did not contain a way of finding the 16kB chips
136 * (M24128 or variants). The method used here might not work
137 * for all models. If you encounter problems the easiest way
138 * is probably to define your model within #ifdef's, and hard-
139 * code it.
142 eeprom.size = 0;
143 eeprom.usec_delay_writecycles = INITIAL_WRITEDELAY_US;
144 eeprom.usec_delay_step = 128;
145 eeprom.adapt_state = 0;
147 #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
148 i2c_start();
149 i2c_outbyte(0x80);
150 if(!i2c_getack())
152 /* It's not 8k.. */
153 int success = 0;
154 unsigned char buf_2k_start[16];
156 /* Im not sure this will work... :) */
157 /* assume 2kB, if failure go for 16kB */
158 /* Test with 16kB settings.. */
159 /* If it's a 2kB EEPROM and we address it outside it's range
160 * it will mirror the address space:
161 * 1. We read two locations (that are mirrored),
162 * if the content differs * it's a 16kB EEPROM.
163 * 2. if it doesn't differ - write different value to one of the locations,
164 * check the other - if content still is the same it's a 2k EEPROM,
165 * restore original data.
167 #define LOC1 8
168 #define LOC2 (0x1fb) /*1fb, 3ed, 5df, 7d1 */
170 /* 2k settings */
171 i2c_stop();
172 eeprom.size = EEPROM_2KB;
173 eeprom.select_cmd = 0xA0;
174 eeprom.sequential_write_pagesize = 16;
175 if( eeprom_read_buf( 0, buf_2k_start, 16 ) == 16 )
177 D(printk("2k start: '%16.16s'\n", buf_2k_start));
179 else
181 printk(KERN_INFO "%s: Failed to read in 2k mode!\n", eeprom_name);
184 /* 16k settings */
185 eeprom.size = EEPROM_16KB;
186 eeprom.select_cmd = 0xA0;
187 eeprom.sequential_write_pagesize = 64;
190 unsigned char loc1[4], loc2[4], tmp[4];
191 if( eeprom_read_buf(LOC2, loc2, 4) == 4)
193 if( eeprom_read_buf(LOC1, loc1, 4) == 4)
195 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
196 LOC1, loc1, LOC2, loc2));
197 #if 0
198 if (memcmp(loc1, loc2, 4) != 0 )
200 /* It's 16k */
201 printk(KERN_INFO "%s: 16k detected in step 1\n", eeprom_name);
202 eeprom.size = EEPROM_16KB;
203 success = 1;
205 else
206 #endif
208 /* Do step 2 check */
209 /* Invert value */
210 loc1[0] = ~loc1[0];
211 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
213 /* If 2k EEPROM this write will actually write 10 bytes
214 * from pos 0
216 D(printk("1 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
217 LOC1, loc1, LOC2, loc2));
218 if( eeprom_read_buf(LOC1, tmp, 4) == 4)
220 D(printk("2 loc1: (%i) '%4.4s' tmp '%4.4s'\n",
221 LOC1, loc1, tmp));
222 if (memcmp(loc1, tmp, 4) != 0 )
224 printk(KERN_INFO "%s: read and write differs! Not 16kB\n",
225 eeprom_name);
226 loc1[0] = ~loc1[0];
228 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
230 success = 1;
232 else
234 printk(KERN_INFO "%s: Restore 2k failed during probe,"
235 " EEPROM might be corrupt!\n", eeprom_name);
238 i2c_stop();
239 /* Go to 2k mode and write original data */
240 eeprom.size = EEPROM_2KB;
241 eeprom.select_cmd = 0xA0;
242 eeprom.sequential_write_pagesize = 16;
243 if( eeprom_write_buf(0, buf_2k_start, 16) == 16)
246 else
248 printk(KERN_INFO "%s: Failed to write back 2k start!\n",
249 eeprom_name);
252 eeprom.size = EEPROM_2KB;
256 if(!success)
258 if( eeprom_read_buf(LOC2, loc2, 1) == 1)
260 D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
261 LOC1, loc1, LOC2, loc2));
262 if (memcmp(loc1, loc2, 4) == 0 )
264 /* Data the same, must be mirrored -> 2k */
265 /* Restore data */
266 printk(KERN_INFO "%s: 2k detected in step 2\n", eeprom_name);
267 loc1[0] = ~loc1[0];
268 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
270 success = 1;
272 else
274 printk(KERN_INFO "%s: Restore 2k failed during probe,"
275 " EEPROM might be corrupt!\n", eeprom_name);
279 eeprom.size = EEPROM_2KB;
281 else
283 printk(KERN_INFO "%s: 16k detected in step 2\n",
284 eeprom_name);
285 loc1[0] = ~loc1[0];
286 /* Data differs, assume 16k */
287 /* Restore data */
288 if (eeprom_write_buf(LOC1, loc1, 1) == 1)
290 success = 1;
292 else
294 printk(KERN_INFO "%s: Restore 16k failed during probe,"
295 " EEPROM might be corrupt!\n", eeprom_name);
298 eeprom.size = EEPROM_16KB;
303 } /* read LOC1 */
304 } /* address LOC1 */
305 if (!success)
307 printk(KERN_INFO "%s: Probing failed!, using 2KB!\n", eeprom_name);
308 eeprom.size = EEPROM_2KB;
310 } /* read */
313 else
315 i2c_outbyte(0x00);
316 if(!i2c_getack())
318 /* No 8k */
319 eeprom.size = EEPROM_2KB;
321 else
323 i2c_start();
324 i2c_outbyte(0x81);
325 if (!i2c_getack())
327 eeprom.size = EEPROM_2KB;
329 else
331 /* It's a 8kB */
332 i2c_inbyte();
333 eeprom.size = EEPROM_8KB;
337 i2c_stop();
338 #elif defined(CONFIG_ETRAX_I2C_EEPROM_16KB)
339 eeprom.size = EEPROM_16KB;
340 #elif defined(CONFIG_ETRAX_I2C_EEPROM_8KB)
341 eeprom.size = EEPROM_8KB;
342 #elif defined(CONFIG_ETRAX_I2C_EEPROM_2KB)
343 eeprom.size = EEPROM_2KB;
344 #endif
346 switch(eeprom.size)
348 case (EEPROM_2KB):
349 printk("%s: " EETEXT " i2c compatible 2kB eeprom.\n", eeprom_name);
350 eeprom.sequential_write_pagesize = 16;
351 eeprom.select_cmd = 0xA0;
352 break;
353 case (EEPROM_8KB):
354 printk("%s: " EETEXT " i2c compatible 8kB eeprom.\n", eeprom_name);
355 eeprom.sequential_write_pagesize = 16;
356 eeprom.select_cmd = 0x80;
357 break;
358 case (EEPROM_16KB):
359 printk("%s: " EETEXT " i2c compatible 16kB eeprom.\n", eeprom_name);
360 eeprom.sequential_write_pagesize = 64;
361 eeprom.select_cmd = 0xA0;
362 break;
363 default:
364 eeprom.size = 0;
365 printk("%s: Did not find a supported eeprom\n", eeprom_name);
366 break;
371 eeprom_disable_write_protect();
373 return 0;
376 /* Opens the device. */
377 static int eeprom_open(struct inode * inode, struct file * file)
379 cycle_kernel_lock();
380 if(iminor(inode) != EEPROM_MINOR_NR)
381 return -ENXIO;
382 if(imajor(inode) != EEPROM_MAJOR_NR)
383 return -ENXIO;
385 if( eeprom.size > 0 )
387 /* OK */
388 return 0;
391 /* No EEprom found */
392 return -EFAULT;
395 /* Changes the current file position. */
397 static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig)
400 * orig 0: position from begning of eeprom
401 * orig 1: relative from current position
402 * orig 2: position from last eeprom address
405 switch (orig)
407 case 0:
408 file->f_pos = offset;
409 break;
410 case 1:
411 file->f_pos += offset;
412 break;
413 case 2:
414 file->f_pos = eeprom.size - offset;
415 break;
416 default:
417 return -EINVAL;
420 /* truncate position */
421 if (file->f_pos < 0)
423 file->f_pos = 0;
424 return(-EOVERFLOW);
427 if (file->f_pos >= eeprom.size)
429 file->f_pos = eeprom.size - 1;
430 return(-EOVERFLOW);
433 return ( file->f_pos );
436 /* Reads data from eeprom. */
438 static int eeprom_read_buf(loff_t addr, char * buf, int count)
440 return eeprom_read(NULL, buf, count, &addr);
445 /* Reads data from eeprom. */
447 static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t *off)
449 int read=0;
450 unsigned long p = *off;
452 unsigned char page;
454 if(p >= eeprom.size) /* Address i 0 - (size-1) */
456 return -EFAULT;
459 if (mutex_lock_interruptible(&eeprom.lock))
460 return -EINTR;
462 page = (unsigned char) (p >> 8);
464 if(!eeprom_address(p))
466 printk(KERN_INFO "%s: Read failed to address the eeprom: "
467 "0x%08X (%i) page: %i\n", eeprom_name, (int)p, (int)p, page);
468 i2c_stop();
470 /* don't forget to wake them up */
471 mutex_unlock(&eeprom.lock);
472 return -EFAULT;
475 if( (p + count) > eeprom.size)
477 /* truncate count */
478 count = eeprom.size - p;
481 /* stop dummy write op and initiate the read op */
482 i2c_start();
484 /* special case for small eeproms */
485 if(eeprom.size < EEPROM_16KB)
487 i2c_outbyte( eeprom.select_cmd | 1 | (page << 1) );
490 /* go on with the actual read */
491 read = read_from_eeprom( buf, count);
493 if(read > 0)
495 *off += read;
498 mutex_unlock(&eeprom.lock);
499 return read;
502 /* Writes data to eeprom. */
504 static int eeprom_write_buf(loff_t addr, const char * buf, int count)
506 return eeprom_write(NULL, buf, count, &addr);
510 /* Writes data to eeprom. */
512 static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
513 loff_t *off)
515 int i, written, restart=1;
516 unsigned long p;
518 if (!access_ok(VERIFY_READ, buf, count))
520 return -EFAULT;
523 /* bail out if we get interrupted */
524 if (mutex_lock_interruptible(&eeprom.lock))
525 return -EINTR;
526 for(i = 0; (i < EEPROM_RETRIES) && (restart > 0); i++)
528 restart = 0;
529 written = 0;
530 p = *off;
533 while( (written < count) && (p < eeprom.size))
535 /* address the eeprom */
536 if(!eeprom_address(p))
538 printk(KERN_INFO "%s: Write failed to address the eeprom: "
539 "0x%08X (%i) \n", eeprom_name, (int)p, (int)p);
540 i2c_stop();
542 /* don't forget to wake them up */
543 mutex_unlock(&eeprom.lock);
544 return -EFAULT;
546 #ifdef EEPROM_ADAPTIVE_TIMING
547 /* Adaptive algorithm to adjust timing */
548 if (eeprom.retry_cnt_addr > 0)
550 /* To Low now */
551 D(printk(">D=%i d=%i\n",
552 eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
554 if (eeprom.usec_delay_step < 4)
556 eeprom.usec_delay_step++;
557 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
559 else
562 if (eeprom.adapt_state > 0)
564 /* To Low before */
565 eeprom.usec_delay_step *= 2;
566 if (eeprom.usec_delay_step > 2)
568 eeprom.usec_delay_step--;
570 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
572 else if (eeprom.adapt_state < 0)
574 /* To High before (toggle dir) */
575 eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
576 if (eeprom.usec_delay_step > 1)
578 eeprom.usec_delay_step /= 2;
579 eeprom.usec_delay_step--;
584 eeprom.adapt_state = 1;
586 else
588 /* To High (or good) now */
589 D(printk("<D=%i d=%i\n",
590 eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
592 if (eeprom.adapt_state < 0)
594 /* To High before */
595 if (eeprom.usec_delay_step > 1)
597 eeprom.usec_delay_step *= 2;
598 eeprom.usec_delay_step--;
600 if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
602 eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
606 else if (eeprom.adapt_state > 0)
608 /* To Low before (toggle dir) */
609 if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
611 eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
613 if (eeprom.usec_delay_step > 1)
615 eeprom.usec_delay_step /= 2;
616 eeprom.usec_delay_step--;
619 eeprom.adapt_state = -1;
622 if (eeprom.adapt_state > -100)
624 eeprom.adapt_state--;
626 else
628 /* Restart adaption */
629 D(printk("#Restart\n"));
630 eeprom.usec_delay_step++;
633 #endif /* EEPROM_ADAPTIVE_TIMING */
634 /* write until we hit a page boundary or count */
637 i2c_outbyte(buf[written]);
638 if(!i2c_getack())
640 restart=1;
641 printk(KERN_INFO "%s: write error, retrying. %d\n", eeprom_name, i);
642 i2c_stop();
643 break;
645 written++;
646 p++;
647 } while( written < count && ( p % eeprom.sequential_write_pagesize ));
649 /* end write cycle */
650 i2c_stop();
651 i2c_delay(eeprom.usec_delay_writecycles);
652 } /* while */
653 } /* for */
655 mutex_unlock(&eeprom.lock);
656 if (written == 0 && p >= eeprom.size){
657 return -ENOSPC;
659 *off = p;
660 return written;
663 /* Closes the device. */
665 static int eeprom_close(struct inode * inode, struct file * file)
667 /* do nothing for now */
668 return 0;
671 /* Sets the current address of the eeprom. */
673 static int eeprom_address(unsigned long addr)
675 int i;
676 unsigned char page, offset;
678 page = (unsigned char) (addr >> 8);
679 offset = (unsigned char) addr;
681 for(i = 0; i < EEPROM_RETRIES; i++)
683 /* start a dummy write for addressing */
684 i2c_start();
686 if(eeprom.size == EEPROM_16KB)
688 i2c_outbyte( eeprom.select_cmd );
689 i2c_getack();
690 i2c_outbyte(page);
692 else
694 i2c_outbyte( eeprom.select_cmd | (page << 1) );
696 if(!i2c_getack())
698 /* retry */
699 i2c_stop();
700 /* Must have a delay here.. 500 works, >50, 100->works 5th time*/
701 i2c_delay(MAX_WRITEDELAY_US / EEPROM_RETRIES * i);
702 /* The chip needs up to 10 ms from write stop to next start */
705 else
707 i2c_outbyte(offset);
709 if(!i2c_getack())
711 /* retry */
712 i2c_stop();
714 else
715 break;
720 eeprom.retry_cnt_addr = i;
721 D(printk("%i\n", eeprom.retry_cnt_addr));
722 if(eeprom.retry_cnt_addr == EEPROM_RETRIES)
724 /* failed */
725 return 0;
727 return 1;
730 /* Reads from current address. */
732 static int read_from_eeprom(char * buf, int count)
734 int i, read=0;
736 for(i = 0; i < EEPROM_RETRIES; i++)
738 if(eeprom.size == EEPROM_16KB)
740 i2c_outbyte( eeprom.select_cmd | 1 );
743 if(i2c_getack())
745 break;
749 if(i == EEPROM_RETRIES)
751 printk(KERN_INFO "%s: failed to read from eeprom\n", eeprom_name);
752 i2c_stop();
754 return -EFAULT;
757 while( (read < count))
759 if (put_user(i2c_inbyte(), &buf[read++]))
761 i2c_stop();
763 return -EFAULT;
767 * make sure we don't ack last byte or you will get very strange
768 * results!
770 if(read < count)
772 i2c_sendack();
776 /* stop the operation */
777 i2c_stop();
779 return read;
782 /* Disables write protection if applicable. */
784 #define DBP_SAVE(x)
785 #define ax_printf printk
786 static void eeprom_disable_write_protect(void)
788 /* Disable write protect */
789 if (eeprom.size == EEPROM_8KB)
791 /* Step 1 Set WEL = 1 (write 00000010 to address 1FFFh */
792 i2c_start();
793 i2c_outbyte(0xbe);
794 if(!i2c_getack())
796 DBP_SAVE(ax_printf("Get ack returns false\n"));
798 i2c_outbyte(0xFF);
799 if(!i2c_getack())
801 DBP_SAVE(ax_printf("Get ack returns false 2\n"));
803 i2c_outbyte(0x02);
804 if(!i2c_getack())
806 DBP_SAVE(ax_printf("Get ack returns false 3\n"));
808 i2c_stop();
810 i2c_delay(1000);
812 /* Step 2 Set RWEL = 1 (write 00000110 to address 1FFFh */
813 i2c_start();
814 i2c_outbyte(0xbe);
815 if(!i2c_getack())
817 DBP_SAVE(ax_printf("Get ack returns false 55\n"));
819 i2c_outbyte(0xFF);
820 if(!i2c_getack())
822 DBP_SAVE(ax_printf("Get ack returns false 52\n"));
824 i2c_outbyte(0x06);
825 if(!i2c_getack())
827 DBP_SAVE(ax_printf("Get ack returns false 53\n"));
829 i2c_stop();
831 /* Step 3 Set BP1, BP0, and/or WPEN bits (write 00000110 to address 1FFFh */
832 i2c_start();
833 i2c_outbyte(0xbe);
834 if(!i2c_getack())
836 DBP_SAVE(ax_printf("Get ack returns false 56\n"));
838 i2c_outbyte(0xFF);
839 if(!i2c_getack())
841 DBP_SAVE(ax_printf("Get ack returns false 57\n"));
843 i2c_outbyte(0x06);
844 if(!i2c_getack())
846 DBP_SAVE(ax_printf("Get ack returns false 58\n"));
848 i2c_stop();
850 /* Write protect disabled */
854 module_init(eeprom_init);