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Merge branch 'for-linus' of git://oss.sgi.com/xfs/xfs
[linux/fpc-iii.git] / arch / powerpc / platforms / powermac / low_i2c.c
blob06a137c5b8bb43c7f90af3d21cc86d6320f3ff88
1 /*
2 * arch/powerpc/platforms/powermac/low_i2c.c
3 *
4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * The linux i2c layer isn't completely suitable for our needs for various
12 * reasons ranging from too late initialisation to semantics not perfectly
13 * matching some requirements of the apple platform functions etc...
14 *
15 * This file thus provides a simple low level unified i2c interface for
16 * powermac that covers the various types of i2c busses used in Apple machines.
17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18 * banging busses found on older chipstes in earlier machines if we ever need
19 * one of them.
20 *
21 * The drivers in this file are synchronous/blocking. In addition, the
22 * keywest one is fairly slow due to the use of msleep instead of interrupts
23 * as the interrupt is currently used by i2c-keywest. In the long run, we
24 * might want to get rid of those high-level interfaces to linux i2c layer
25 * either completely (converting all drivers) or replacing them all with a
26 * single stub driver on top of this one. Once done, the interrupt will be
27 * available for our use.
28 */
29
30 #undef DEBUG
31 #undef DEBUG_LOW
32
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/init.h>
36 #include <linux/module.h>
37 #include <linux/adb.h>
38 #include <linux/pmu.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/platform_device.h>
42 #include <linux/interrupt.h>
43 #include <linux/timer.h>
44 #include <linux/mutex.h>
45 #include <linux/i2c.h>
46 #include <linux/slab.h>
47 #include <asm/keylargo.h>
48 #include <asm/uninorth.h>
49 #include <asm/io.h>
50 #include <asm/prom.h>
51 #include <asm/machdep.h>
52 #include <asm/smu.h>
53 #include <asm/pmac_pfunc.h>
54 #include <asm/pmac_low_i2c.h>
55
56 #ifdef DEBUG
57 #define DBG(x...) do {\
58 printk(KERN_DEBUG "low_i2c:" x); \
59 } while(0)
60 #else
61 #define DBG(x...)
62 #endif
63
64 #ifdef DEBUG_LOW
65 #define DBG_LOW(x...) do {\
66 printk(KERN_DEBUG "low_i2c:" x); \
67 } while(0)
68 #else
69 #define DBG_LOW(x...)
70 #endif
71
72
73 static int pmac_i2c_force_poll = 1;
74
75 /*
76 * A bus structure. Each bus in the system has such a structure associated.
77 */
78 struct pmac_i2c_bus
79 {
80 struct list_head link;
81 struct device_node *controller;
82 struct device_node *busnode;
83 int type;
84 int flags;
85 struct i2c_adapter adapter;
86 void *hostdata;
87 int channel; /* some hosts have multiple */
88 int mode; /* current mode */
89 struct mutex mutex;
90 int opened;
91 int polled; /* open mode */
92 struct platform_device *platform_dev;
93
94 /* ops */
95 int (*open)(struct pmac_i2c_bus *bus);
96 void (*close)(struct pmac_i2c_bus *bus);
97 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
98 u32 subaddr, u8 *data, int len);
99 };
100
101 static LIST_HEAD(pmac_i2c_busses);
102
103 /*
104 * Keywest implementation
105 */
106
107 struct pmac_i2c_host_kw
108 {
109 struct mutex mutex; /* Access mutex for use by
110 * i2c-keywest */
111 void __iomem *base; /* register base address */
112 int bsteps; /* register stepping */
113 int speed; /* speed */
114 int irq;
115 u8 *data;
116 unsigned len;
117 int state;
118 int rw;
119 int polled;
120 int result;
121 struct completion complete;
122 spinlock_t lock;
123 struct timer_list timeout_timer;
124 };
125
126 /* Register indices */
127 typedef enum {
128 reg_mode = 0,
129 reg_control,
130 reg_status,
131 reg_isr,
132 reg_ier,
133 reg_addr,
134 reg_subaddr,
135 reg_data
136 } reg_t;
137
138 /* The Tumbler audio equalizer can be really slow sometimes */
139 #define KW_POLL_TIMEOUT (2*HZ)
140
141 /* Mode register */
142 #define KW_I2C_MODE_100KHZ 0x00
143 #define KW_I2C_MODE_50KHZ 0x01
144 #define KW_I2C_MODE_25KHZ 0x02
145 #define KW_I2C_MODE_DUMB 0x00
146 #define KW_I2C_MODE_STANDARD 0x04
147 #define KW_I2C_MODE_STANDARDSUB 0x08
148 #define KW_I2C_MODE_COMBINED 0x0C
149 #define KW_I2C_MODE_MODE_MASK 0x0C
150 #define KW_I2C_MODE_CHAN_MASK 0xF0
151
152 /* Control register */
153 #define KW_I2C_CTL_AAK 0x01
154 #define KW_I2C_CTL_XADDR 0x02
155 #define KW_I2C_CTL_STOP 0x04
156 #define KW_I2C_CTL_START 0x08
157
158 /* Status register */
159 #define KW_I2C_STAT_BUSY 0x01
160 #define KW_I2C_STAT_LAST_AAK 0x02
161 #define KW_I2C_STAT_LAST_RW 0x04
162 #define KW_I2C_STAT_SDA 0x08
163 #define KW_I2C_STAT_SCL 0x10
164
165 /* IER & ISR registers */
166 #define KW_I2C_IRQ_DATA 0x01
167 #define KW_I2C_IRQ_ADDR 0x02
168 #define KW_I2C_IRQ_STOP 0x04
169 #define KW_I2C_IRQ_START 0x08
170 #define KW_I2C_IRQ_MASK 0x0F
171
172 /* State machine states */
173 enum {
174 state_idle,
175 state_addr,
176 state_read,
177 state_write,
178 state_stop,
179 state_dead
180 };
181
182 #define WRONG_STATE(name) do {\
183 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
184 "(isr: %02x)\n", \
185 name, __kw_state_names[host->state], isr); \
186 } while(0)
187
188 static const char *__kw_state_names[] = {
189 "state_idle",
190 "state_addr",
191 "state_read",
192 "state_write",
193 "state_stop",
194 "state_dead"
195 };
196
197 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
198 {
199 return readb(host->base + (((unsigned int)reg) << host->bsteps));
200 }
201
202 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
203 reg_t reg, u8 val)
204 {
205 writeb(val, host->base + (((unsigned)reg) << host->bsteps));
206 (void)__kw_read_reg(host, reg_subaddr);
207 }
208
209 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
210 #define kw_read_reg(reg) __kw_read_reg(host, reg)
211
212 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
213 {
214 int i, j;
215 u8 isr;
216
217 for (i = 0; i < 1000; i++) {
218 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
219 if (isr != 0)
220 return isr;
221
222 /* This code is used with the timebase frozen, we cannot rely
223 * on udelay nor schedule when in polled mode !
224 * For now, just use a bogus loop....
225 */
226 if (host->polled) {
227 for (j = 1; j < 100000; j++)
228 mb();
229 } else
230 msleep(1);
231 }
232 return isr;
233 }
234
235 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
236 {
237 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
238 host->state = state_stop;
239 host->result = result;
240 }
241
242
243 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
244 {
245 u8 ack;
246
247 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
248 __kw_state_names[host->state], isr);
249
250 if (host->state == state_idle) {
251 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
252 " interrupt, ignoring\n");
253 kw_write_reg(reg_isr, isr);
254 return;
255 }
256
257 if (isr == 0) {
258 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
259 " on keywest !\n");
260 if (host->state != state_stop) {
261 kw_i2c_do_stop(host, -EIO);
262 return;
263 }
264 ack = kw_read_reg(reg_status);
265 if (ack & KW_I2C_STAT_BUSY)
266 kw_write_reg(reg_status, 0);
267 host->state = state_idle;
268 kw_write_reg(reg_ier, 0x00);
269 if (!host->polled)
270 complete(&host->complete);
271 return;
272 }
273
274 if (isr & KW_I2C_IRQ_ADDR) {
275 ack = kw_read_reg(reg_status);
276 if (host->state != state_addr) {
277 WRONG_STATE("KW_I2C_IRQ_ADDR");
278 kw_i2c_do_stop(host, -EIO);
279 }
280 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
281 host->result = -ENXIO;
282 host->state = state_stop;
283 DBG_LOW("KW: NAK on address\n");
284 } else {
285 if (host->len == 0)
286 kw_i2c_do_stop(host, 0);
287 else if (host->rw) {
288 host->state = state_read;
289 if (host->len > 1)
290 kw_write_reg(reg_control,
291 KW_I2C_CTL_AAK);
292 } else {
293 host->state = state_write;
294 kw_write_reg(reg_data, *(host->data++));
295 host->len--;
296 }
297 }
298 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
299 }
300
301 if (isr & KW_I2C_IRQ_DATA) {
302 if (host->state == state_read) {
303 *(host->data++) = kw_read_reg(reg_data);
304 host->len--;
305 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
306 if (host->len == 0)
307 host->state = state_stop;
308 else if (host->len == 1)
309 kw_write_reg(reg_control, 0);
310 } else if (host->state == state_write) {
311 ack = kw_read_reg(reg_status);
312 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
313 DBG_LOW("KW: nack on data write\n");
314 host->result = -EFBIG;
315 host->state = state_stop;
316 } else if (host->len) {
317 kw_write_reg(reg_data, *(host->data++));
318 host->len--;
319 } else
320 kw_i2c_do_stop(host, 0);
321 } else {
322 WRONG_STATE("KW_I2C_IRQ_DATA");
323 if (host->state != state_stop)
324 kw_i2c_do_stop(host, -EIO);
325 }
326 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
327 }
328
329 if (isr & KW_I2C_IRQ_STOP) {
330 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
331 if (host->state != state_stop) {
332 WRONG_STATE("KW_I2C_IRQ_STOP");
333 host->result = -EIO;
334 }
335 host->state = state_idle;
336 if (!host->polled)
337 complete(&host->complete);
338 }
339
340 /* Below should only happen in manual mode which we don't use ... */
341 if (isr & KW_I2C_IRQ_START)
342 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
343
344 }
345
346 /* Interrupt handler */
347 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
348 {
349 struct pmac_i2c_host_kw *host = dev_id;
350 unsigned long flags;
351
352 spin_lock_irqsave(&host->lock, flags);
353 del_timer(&host->timeout_timer);
354 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
355 if (host->state != state_idle) {
356 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
357 add_timer(&host->timeout_timer);
358 }
359 spin_unlock_irqrestore(&host->lock, flags);
360 return IRQ_HANDLED;
361 }
362
363 static void kw_i2c_timeout(unsigned long data)
364 {
365 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
366 unsigned long flags;
367
368 spin_lock_irqsave(&host->lock, flags);
369 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
370 if (host->state != state_idle) {
371 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
372 add_timer(&host->timeout_timer);
373 }
374 spin_unlock_irqrestore(&host->lock, flags);
375 }
376
377 static int kw_i2c_open(struct pmac_i2c_bus *bus)
378 {
379 struct pmac_i2c_host_kw *host = bus->hostdata;
380 mutex_lock(&host->mutex);
381 return 0;
382 }
383
384 static void kw_i2c_close(struct pmac_i2c_bus *bus)
385 {
386 struct pmac_i2c_host_kw *host = bus->hostdata;
387 mutex_unlock(&host->mutex);
388 }
389
390 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
391 u32 subaddr, u8 *data, int len)
392 {
393 struct pmac_i2c_host_kw *host = bus->hostdata;
394 u8 mode_reg = host->speed;
395 int use_irq = host->irq != NO_IRQ && !bus->polled;
396
397 /* Setup mode & subaddress if any */
398 switch(bus->mode) {
399 case pmac_i2c_mode_dumb:
400 return -EINVAL;
401 case pmac_i2c_mode_std:
402 mode_reg |= KW_I2C_MODE_STANDARD;
403 if (subsize != 0)
404 return -EINVAL;
405 break;
406 case pmac_i2c_mode_stdsub:
407 mode_reg |= KW_I2C_MODE_STANDARDSUB;
408 if (subsize != 1)
409 return -EINVAL;
410 break;
411 case pmac_i2c_mode_combined:
412 mode_reg |= KW_I2C_MODE_COMBINED;
413 if (subsize != 1)
414 return -EINVAL;
415 break;
416 }
417
418 /* Setup channel & clear pending irqs */
419 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
420 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
421 kw_write_reg(reg_status, 0);
422
423 /* Set up address and r/w bit, strip possible stale bus number from
424 * address top bits
425 */
426 kw_write_reg(reg_addr, addrdir & 0xff);
427
428 /* Set up the sub address */
429 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
430 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
431 kw_write_reg(reg_subaddr, subaddr);
432
433 /* Prepare for async operations */
434 host->data = data;
435 host->len = len;
436 host->state = state_addr;
437 host->result = 0;
438 host->rw = (addrdir & 1);
439 host->polled = bus->polled;
440
441 /* Enable interrupt if not using polled mode and interrupt is
442 * available
443 */
444 if (use_irq) {
445 /* Clear completion */
446 INIT_COMPLETION(host->complete);
447 /* Ack stale interrupts */
448 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
449 /* Arm timeout */
450 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
451 add_timer(&host->timeout_timer);
452 /* Enable emission */
453 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
454 }
455
456 /* Start sending address */
457 kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
458
459 /* Wait for completion */
460 if (use_irq)
461 wait_for_completion(&host->complete);
462 else {
463 while(host->state != state_idle) {
464 unsigned long flags;
465
466 u8 isr = kw_i2c_wait_interrupt(host);
467 spin_lock_irqsave(&host->lock, flags);
468 kw_i2c_handle_interrupt(host, isr);
469 spin_unlock_irqrestore(&host->lock, flags);
470 }
471 }
472
473 /* Disable emission */
474 kw_write_reg(reg_ier, 0);
475
476 return host->result;
477 }
478
479 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
480 {
481 struct pmac_i2c_host_kw *host;
482 const u32 *psteps, *prate, *addrp;
483 u32 steps;
484
485 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
486 if (host == NULL) {
487 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
488 np->full_name);
489 return NULL;
490 }
491
492 /* Apple is kind enough to provide a valid AAPL,address property
493 * on all i2c keywest nodes so far ... we would have to fallback
494 * to macio parsing if that wasn't the case
495 */
496 addrp = of_get_property(np, "AAPL,address", NULL);
497 if (addrp == NULL) {
498 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
499 np->full_name);
500 kfree(host);
501 return NULL;
502 }
503 mutex_init(&host->mutex);
504 init_completion(&host->complete);
505 spin_lock_init(&host->lock);
506 init_timer(&host->timeout_timer);
507 host->timeout_timer.function = kw_i2c_timeout;
508 host->timeout_timer.data = (unsigned long)host;
509
510 psteps = of_get_property(np, "AAPL,address-step", NULL);
511 steps = psteps ? (*psteps) : 0x10;
512 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
513 steps >>= 1;
514 /* Select interface rate */
515 host->speed = KW_I2C_MODE_25KHZ;
516 prate = of_get_property(np, "AAPL,i2c-rate", NULL);
517 if (prate) switch(*prate) {
518 case 100:
519 host->speed = KW_I2C_MODE_100KHZ;
520 break;
521 case 50:
522 host->speed = KW_I2C_MODE_50KHZ;
523 break;
524 case 25:
525 host->speed = KW_I2C_MODE_25KHZ;
526 break;
527 }
528 host->irq = irq_of_parse_and_map(np, 0);
529 if (host->irq == NO_IRQ)
530 printk(KERN_WARNING
531 "low_i2c: Failed to map interrupt for %s\n",
532 np->full_name);
533
534 host->base = ioremap((*addrp), 0x1000);
535 if (host->base == NULL) {
536 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
537 np->full_name);
538 kfree(host);
539 return NULL;
540 }
541
542 /* Make sure IRQ is disabled */
543 kw_write_reg(reg_ier, 0);
544
545 /* Request chip interrupt. We set IRQF_TIMER because we don't
546 * want that interrupt disabled between the 2 passes of driver
547 * suspend or we'll have issues running the pfuncs
548 */
549 if (request_irq(host->irq, kw_i2c_irq, IRQF_TIMER, "keywest i2c", host))
550 host->irq = NO_IRQ;
551
552 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
553 *addrp, host->irq, np->full_name);
554
555 return host;
556 }
557
558
559 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
560 struct device_node *controller,
561 struct device_node *busnode,
562 int channel)
563 {
564 struct pmac_i2c_bus *bus;
565
566 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
567 if (bus == NULL)
568 return;
569
570 bus->controller = of_node_get(controller);
571 bus->busnode = of_node_get(busnode);
572 bus->type = pmac_i2c_bus_keywest;
573 bus->hostdata = host;
574 bus->channel = channel;
575 bus->mode = pmac_i2c_mode_std;
576 bus->open = kw_i2c_open;
577 bus->close = kw_i2c_close;
578 bus->xfer = kw_i2c_xfer;
579 mutex_init(&bus->mutex);
580 if (controller == busnode)
581 bus->flags = pmac_i2c_multibus;
582 list_add(&bus->link, &pmac_i2c_busses);
583
584 printk(KERN_INFO " channel %d bus %s\n", channel,
585 (controller == busnode) ? "<multibus>" : busnode->full_name);
586 }
587
588 static void __init kw_i2c_probe(void)
589 {
590 struct device_node *np, *child, *parent;
591
592 /* Probe keywest-i2c busses */
593 for_each_compatible_node(np, "i2c","keywest-i2c") {
594 struct pmac_i2c_host_kw *host;
595 int multibus;
596
597 /* Found one, init a host structure */
598 host = kw_i2c_host_init(np);
599 if (host == NULL)
600 continue;
601
602 /* Now check if we have a multibus setup (old style) or if we
603 * have proper bus nodes. Note that the "new" way (proper bus
604 * nodes) might cause us to not create some busses that are
605 * kept hidden in the device-tree. In the future, we might
606 * want to work around that by creating busses without a node
607 * but not for now
608 */
609 child = of_get_next_child(np, NULL);
610 multibus = !child || strcmp(child->name, "i2c-bus");
611 of_node_put(child);
612
613 /* For a multibus setup, we get the bus count based on the
614 * parent type
615 */
616 if (multibus) {
617 int chans, i;
618
619 parent = of_get_parent(np);
620 if (parent == NULL)
621 continue;
622 chans = parent->name[0] == 'u' ? 2 : 1;
623 for (i = 0; i < chans; i++)
624 kw_i2c_add(host, np, np, i);
625 } else {
626 for (child = NULL;
627 (child = of_get_next_child(np, child)) != NULL;) {
628 const u32 *reg = of_get_property(child,
629 "reg", NULL);
630 if (reg == NULL)
631 continue;
632 kw_i2c_add(host, np, child, *reg);
633 }
634 }
635 }
636 }
637
638
639 /*
640 *
641 * PMU implementation
642 *
643 */
644
645 #ifdef CONFIG_ADB_PMU
646
647 /*
648 * i2c command block to the PMU
649 */
650 struct pmu_i2c_hdr {
651 u8 bus;
652 u8 mode;
653 u8 bus2;
654 u8 address;
655 u8 sub_addr;
656 u8 comb_addr;
657 u8 count;
658 u8 data[];
659 };
660
661 static void pmu_i2c_complete(struct adb_request *req)
662 {
663 complete(req->arg);
664 }
665
666 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
667 u32 subaddr, u8 *data, int len)
668 {
669 struct adb_request *req = bus->hostdata;
670 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
671 struct completion comp;
672 int read = addrdir & 1;
673 int retry;
674 int rc = 0;
675
676 /* For now, limit ourselves to 16 bytes transfers */
677 if (len > 16)
678 return -EINVAL;
679
680 init_completion(&comp);
681
682 for (retry = 0; retry < 16; retry++) {
683 memset(req, 0, sizeof(struct adb_request));
684 hdr->bus = bus->channel;
685 hdr->count = len;
686
687 switch(bus->mode) {
688 case pmac_i2c_mode_std:
689 if (subsize != 0)
690 return -EINVAL;
691 hdr->address = addrdir;
692 hdr->mode = PMU_I2C_MODE_SIMPLE;
693 break;
694 case pmac_i2c_mode_stdsub:
695 case pmac_i2c_mode_combined:
696 if (subsize != 1)
697 return -EINVAL;
698 hdr->address = addrdir & 0xfe;
699 hdr->comb_addr = addrdir;
700 hdr->sub_addr = subaddr;
701 if (bus->mode == pmac_i2c_mode_stdsub)
702 hdr->mode = PMU_I2C_MODE_STDSUB;
703 else
704 hdr->mode = PMU_I2C_MODE_COMBINED;
705 break;
706 default:
707 return -EINVAL;
708 }
709
710 INIT_COMPLETION(comp);
711 req->data[0] = PMU_I2C_CMD;
712 req->reply[0] = 0xff;
713 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
714 req->done = pmu_i2c_complete;
715 req->arg = &comp;
716 if (!read && len) {
717 memcpy(hdr->data, data, len);
718 req->nbytes += len;
719 }
720 rc = pmu_queue_request(req);
721 if (rc)
722 return rc;
723 wait_for_completion(&comp);
724 if (req->reply[0] == PMU_I2C_STATUS_OK)
725 break;
726 msleep(15);
727 }
728 if (req->reply[0] != PMU_I2C_STATUS_OK)
729 return -EIO;
730
731 for (retry = 0; retry < 16; retry++) {
732 memset(req, 0, sizeof(struct adb_request));
733
734 /* I know that looks like a lot, slow as hell, but darwin
735 * does it so let's be on the safe side for now
736 */
737 msleep(15);
738
739 hdr->bus = PMU_I2C_BUS_STATUS;
740
741 INIT_COMPLETION(comp);
742 req->data[0] = PMU_I2C_CMD;
743 req->reply[0] = 0xff;
744 req->nbytes = 2;
745 req->done = pmu_i2c_complete;
746 req->arg = &comp;
747 rc = pmu_queue_request(req);
748 if (rc)
749 return rc;
750 wait_for_completion(&comp);
751
752 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
753 return 0;
754 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
755 int rlen = req->reply_len - 1;
756
757 if (rlen != len) {
758 printk(KERN_WARNING "low_i2c: PMU returned %d"
759 " bytes, expected %d !\n", rlen, len);
760 return -EIO;
761 }
762 if (len)
763 memcpy(data, &req->reply[1], len);
764 return 0;
765 }
766 }
767 return -EIO;
768 }
769
770 static void __init pmu_i2c_probe(void)
771 {
772 struct pmac_i2c_bus *bus;
773 struct device_node *busnode;
774 int channel, sz;
775
776 if (!pmu_present())
777 return;
778
779 /* There might or might not be a "pmu-i2c" node, we use that
780 * or via-pmu itself, whatever we find. I haven't seen a machine
781 * with separate bus nodes, so we assume a multibus setup
782 */
783 busnode = of_find_node_by_name(NULL, "pmu-i2c");
784 if (busnode == NULL)
785 busnode = of_find_node_by_name(NULL, "via-pmu");
786 if (busnode == NULL)
787 return;
788
789 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
790
791 /*
792 * We add bus 1 and 2 only for now, bus 0 is "special"
793 */
794 for (channel = 1; channel <= 2; channel++) {
795 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
796 bus = kzalloc(sz, GFP_KERNEL);
797 if (bus == NULL)
798 return;
799
800 bus->controller = busnode;
801 bus->busnode = busnode;
802 bus->type = pmac_i2c_bus_pmu;
803 bus->channel = channel;
804 bus->mode = pmac_i2c_mode_std;
805 bus->hostdata = bus + 1;
806 bus->xfer = pmu_i2c_xfer;
807 mutex_init(&bus->mutex);
808 bus->flags = pmac_i2c_multibus;
809 list_add(&bus->link, &pmac_i2c_busses);
810
811 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
812 }
813 }
814
815 #endif /* CONFIG_ADB_PMU */
816
817
818 /*
819 *
820 * SMU implementation
821 *
822 */
823
824 #ifdef CONFIG_PMAC_SMU
825
826 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
827 {
828 complete(misc);
829 }
830
831 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
832 u32 subaddr, u8 *data, int len)
833 {
834 struct smu_i2c_cmd *cmd = bus->hostdata;
835 struct completion comp;
836 int read = addrdir & 1;
837 int rc = 0;
838
839 if ((read && len > SMU_I2C_READ_MAX) ||
840 ((!read) && len > SMU_I2C_WRITE_MAX))
841 return -EINVAL;
842
843 memset(cmd, 0, sizeof(struct smu_i2c_cmd));
844 cmd->info.bus = bus->channel;
845 cmd->info.devaddr = addrdir;
846 cmd->info.datalen = len;
847
848 switch(bus->mode) {
849 case pmac_i2c_mode_std:
850 if (subsize != 0)
851 return -EINVAL;
852 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
853 break;
854 case pmac_i2c_mode_stdsub:
855 case pmac_i2c_mode_combined:
856 if (subsize > 3 || subsize < 1)
857 return -EINVAL;
858 cmd->info.sublen = subsize;
859 /* that's big-endian only but heh ! */
860 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
861 subsize);
862 if (bus->mode == pmac_i2c_mode_stdsub)
863 cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
864 else
865 cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
866 break;
867 default:
868 return -EINVAL;
869 }
870 if (!read && len)
871 memcpy(cmd->info.data, data, len);
872
873 init_completion(&comp);
874 cmd->done = smu_i2c_complete;
875 cmd->misc = &comp;
876 rc = smu_queue_i2c(cmd);
877 if (rc < 0)
878 return rc;
879 wait_for_completion(&comp);
880 rc = cmd->status;
881
882 if (read && len)
883 memcpy(data, cmd->info.data, len);
884 return rc < 0 ? rc : 0;
885 }
886
887 static void __init smu_i2c_probe(void)
888 {
889 struct device_node *controller, *busnode;
890 struct pmac_i2c_bus *bus;
891 const u32 *reg;
892 int sz;
893
894 if (!smu_present())
895 return;
896
897 controller = of_find_node_by_name(NULL, "smu-i2c-control");
898 if (controller == NULL)
899 controller = of_find_node_by_name(NULL, "smu");
900 if (controller == NULL)
901 return;
902
903 printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
904
905 /* Look for childs, note that they might not be of the right
906 * type as older device trees mix i2c busses and other thigns
907 * at the same level
908 */
909 for (busnode = NULL;
910 (busnode = of_get_next_child(controller, busnode)) != NULL;) {
911 if (strcmp(busnode->type, "i2c") &&
912 strcmp(busnode->type, "i2c-bus"))
913 continue;
914 reg = of_get_property(busnode, "reg", NULL);
915 if (reg == NULL)
916 continue;
917
918 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
919 bus = kzalloc(sz, GFP_KERNEL);
920 if (bus == NULL)
921 return;
922
923 bus->controller = controller;
924 bus->busnode = of_node_get(busnode);
925 bus->type = pmac_i2c_bus_smu;
926 bus->channel = *reg;
927 bus->mode = pmac_i2c_mode_std;
928 bus->hostdata = bus + 1;
929 bus->xfer = smu_i2c_xfer;
930 mutex_init(&bus->mutex);
931 bus->flags = 0;
932 list_add(&bus->link, &pmac_i2c_busses);
933
934 printk(KERN_INFO " channel %x bus %s\n",
935 bus->channel, busnode->full_name);
936 }
937 }
938
939 #endif /* CONFIG_PMAC_SMU */
940
941 /*
942 *
943 * Core code
944 *
945 */
946
947
948 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
949 {
950 struct device_node *p = of_node_get(node);
951 struct device_node *prev = NULL;
952 struct pmac_i2c_bus *bus;
953
954 while(p) {
955 list_for_each_entry(bus, &pmac_i2c_busses, link) {
956 if (p == bus->busnode) {
957 if (prev && bus->flags & pmac_i2c_multibus) {
958 const u32 *reg;
959 reg = of_get_property(prev, "reg",
960 NULL);
961 if (!reg)
962 continue;
963 if (((*reg) >> 8) != bus->channel)
964 continue;
965 }
966 of_node_put(p);
967 of_node_put(prev);
968 return bus;
969 }
970 }
971 of_node_put(prev);
972 prev = p;
973 p = of_get_parent(p);
974 }
975 return NULL;
976 }
977 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
978
979 u8 pmac_i2c_get_dev_addr(struct device_node *device)
980 {
981 const u32 *reg = of_get_property(device, "reg", NULL);
982
983 if (reg == NULL)
984 return 0;
985
986 return (*reg) & 0xff;
987 }
988 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
989
990 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
991 {
992 return bus->controller;
993 }
994 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
995
996 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
997 {
998 return bus->busnode;
999 }
1000 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1001
1002 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1003 {
1004 return bus->type;
1005 }
1006 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1007
1008 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1009 {
1010 return bus->flags;
1011 }
1012 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1013
1014 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1015 {
1016 return bus->channel;
1017 }
1018 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1019
1020
1021 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1022 {
1023 return &bus->adapter;
1024 }
1025 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1026
1027 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1028 {
1029 struct pmac_i2c_bus *bus;
1030
1031 list_for_each_entry(bus, &pmac_i2c_busses, link)
1032 if (&bus->adapter == adapter)
1033 return bus;
1034 return NULL;
1035 }
1036 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1037
1038 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1039 {
1040 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1041
1042 if (bus == NULL)
1043 return 0;
1044 return (&bus->adapter == adapter);
1045 }
1046 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1047
1048 int pmac_low_i2c_lock(struct device_node *np)
1049 {
1050 struct pmac_i2c_bus *bus, *found = NULL;
1051
1052 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1053 if (np == bus->controller) {
1054 found = bus;
1055 break;
1056 }
1057 }
1058 if (!found)
1059 return -ENODEV;
1060 return pmac_i2c_open(bus, 0);
1061 }
1062 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1063
1064 int pmac_low_i2c_unlock(struct device_node *np)
1065 {
1066 struct pmac_i2c_bus *bus, *found = NULL;
1067
1068 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1069 if (np == bus->controller) {
1070 found = bus;
1071 break;
1072 }
1073 }
1074 if (!found)
1075 return -ENODEV;
1076 pmac_i2c_close(bus);
1077 return 0;
1078 }
1079 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1080
1081
1082 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1083 {
1084 int rc;
1085
1086 mutex_lock(&bus->mutex);
1087 bus->polled = polled || pmac_i2c_force_poll;
1088 bus->opened = 1;
1089 bus->mode = pmac_i2c_mode_std;
1090 if (bus->open && (rc = bus->open(bus)) != 0) {
1091 bus->opened = 0;
1092 mutex_unlock(&bus->mutex);
1093 return rc;
1094 }
1095 return 0;
1096 }
1097 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1098
1099 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1100 {
1101 WARN_ON(!bus->opened);
1102 if (bus->close)
1103 bus->close(bus);
1104 bus->opened = 0;
1105 mutex_unlock(&bus->mutex);
1106 }
1107 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1108
1109 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1110 {
1111 WARN_ON(!bus->opened);
1112
1113 /* Report me if you see the error below as there might be a new
1114 * "combined4" mode that I need to implement for the SMU bus
1115 */
1116 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1117 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1118 " bus %s !\n", mode, bus->busnode->full_name);
1119 return -EINVAL;
1120 }
1121 bus->mode = mode;
1122
1123 return 0;
1124 }
1125 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1126
1127 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1128 u32 subaddr, u8 *data, int len)
1129 {
1130 int rc;
1131
1132 WARN_ON(!bus->opened);
1133
1134 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1135 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1136 subaddr, len, bus->busnode->full_name);
1137
1138 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1139
1140 #ifdef DEBUG
1141 if (rc)
1142 DBG("xfer error %d\n", rc);
1143 #endif
1144 return rc;
1145 }
1146 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1147
1148 /* some quirks for platform function decoding */
1149 enum {
1150 pmac_i2c_quirk_invmask = 0x00000001u,
1151 pmac_i2c_quirk_skip = 0x00000002u,
1152 };
1153
1154 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1155 int quirks))
1156 {
1157 struct pmac_i2c_bus *bus;
1158 struct device_node *np;
1159 static struct whitelist_ent {
1160 char *name;
1161 char *compatible;
1162 int quirks;
1163 } whitelist[] = {
1164 /* XXX Study device-tree's & apple drivers are get the quirks
1165 * right !
1166 */
1167 /* Workaround: It seems that running the clockspreading
1168 * properties on the eMac will cause lockups during boot.
1169 * The machine seems to work fine without that. So for now,
1170 * let's make sure i2c-hwclock doesn't match about "imic"
1171 * clocks and we'll figure out if we really need to do
1172 * something special about those later.
1173 */
1174 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1175 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1176 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1177 { "i2c-cpu-voltage", NULL, 0},
1178 { "temp-monitor", NULL, 0 },
1179 { "supply-monitor", NULL, 0 },
1180 { NULL, NULL, 0 },
1181 };
1182
1183 /* Only some devices need to have platform functions instanciated
1184 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1185 * on Xserve, if we ever do a driver for them, will use their own
1186 * platform function instance
1187 */
1188 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1189 for (np = NULL;
1190 (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1191 struct whitelist_ent *p;
1192 /* If multibus, check if device is on that bus */
1193 if (bus->flags & pmac_i2c_multibus)
1194 if (bus != pmac_i2c_find_bus(np))
1195 continue;
1196 for (p = whitelist; p->name != NULL; p++) {
1197 if (strcmp(np->name, p->name))
1198 continue;
1199 if (p->compatible &&
1200 !of_device_is_compatible(np, p->compatible))
1201 continue;
1202 if (p->quirks & pmac_i2c_quirk_skip)
1203 break;
1204 callback(np, p->quirks);
1205 break;
1206 }
1207 }
1208 }
1209 }
1210
1211 #define MAX_I2C_DATA 64
1212
1213 struct pmac_i2c_pf_inst
1214 {
1215 struct pmac_i2c_bus *bus;
1216 u8 addr;
1217 u8 buffer[MAX_I2C_DATA];
1218 u8 scratch[MAX_I2C_DATA];
1219 int bytes;
1220 int quirks;
1221 };
1222
1223 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1224 {
1225 struct pmac_i2c_pf_inst *inst;
1226 struct pmac_i2c_bus *bus;
1227
1228 bus = pmac_i2c_find_bus(func->node);
1229 if (bus == NULL) {
1230 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
1231 func->node->full_name);
1232 return NULL;
1233 }
1234 if (pmac_i2c_open(bus, 0)) {
1235 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
1236 func->node->full_name);
1237 return NULL;
1238 }
1239
1240 /* XXX might need GFP_ATOMIC when called during the suspend process,
1241 * but then, there are already lots of issues with suspending when
1242 * near OOM that need to be resolved, the allocator itself should
1243 * probably make GFP_NOIO implicit during suspend
1244 */
1245 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1246 if (inst == NULL) {
1247 pmac_i2c_close(bus);
1248 return NULL;
1249 }
1250 inst->bus = bus;
1251 inst->addr = pmac_i2c_get_dev_addr(func->node);
1252 inst->quirks = (int)(long)func->driver_data;
1253 return inst;
1254 }
1255
1256 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1257 {
1258 struct pmac_i2c_pf_inst *inst = instdata;
1259
1260 if (inst == NULL)
1261 return;
1262 pmac_i2c_close(inst->bus);
1263 kfree(inst);
1264 }
1265
1266 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1267 {
1268 struct pmac_i2c_pf_inst *inst = instdata;
1269
1270 inst->bytes = len;
1271 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1272 inst->buffer, len);
1273 }
1274
1275 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1276 {
1277 struct pmac_i2c_pf_inst *inst = instdata;
1278
1279 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1280 (u8 *)data, len);
1281 }
1282
1283 /* This function is used to do the masking & OR'ing for the "rmw" type
1284 * callbacks. Ze should apply the mask and OR in the values in the
1285 * buffer before writing back. The problem is that it seems that
1286 * various darwin drivers implement the mask/or differently, thus
1287 * we need to check the quirks first
1288 */
1289 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1290 u32 len, const u8 *mask, const u8 *val)
1291 {
1292 int i;
1293
1294 if (inst->quirks & pmac_i2c_quirk_invmask) {
1295 for (i = 0; i < len; i ++)
1296 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1297 } else {
1298 for (i = 0; i < len; i ++)
1299 inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1300 | (val[i] & mask[i]);
1301 }
1302 }
1303
1304 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1305 u32 totallen, const u8 *maskdata,
1306 const u8 *valuedata)
1307 {
1308 struct pmac_i2c_pf_inst *inst = instdata;
1309
1310 if (masklen > inst->bytes || valuelen > inst->bytes ||
1311 totallen > inst->bytes || valuelen > masklen)
1312 return -EINVAL;
1313
1314 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1315
1316 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1317 inst->scratch, totallen);
1318 }
1319
1320 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1321 {
1322 struct pmac_i2c_pf_inst *inst = instdata;
1323
1324 inst->bytes = len;
1325 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1326 inst->buffer, len);
1327 }
1328
1329 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1330 const u8 *data)
1331 {
1332 struct pmac_i2c_pf_inst *inst = instdata;
1333
1334 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1335 subaddr, (u8 *)data, len);
1336 }
1337
1338 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1339 {
1340 struct pmac_i2c_pf_inst *inst = instdata;
1341
1342 return pmac_i2c_setmode(inst->bus, mode);
1343 }
1344
1345 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1346 u32 valuelen, u32 totallen, const u8 *maskdata,
1347 const u8 *valuedata)
1348 {
1349 struct pmac_i2c_pf_inst *inst = instdata;
1350
1351 if (masklen > inst->bytes || valuelen > inst->bytes ||
1352 totallen > inst->bytes || valuelen > masklen)
1353 return -EINVAL;
1354
1355 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1356
1357 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1358 subaddr, inst->scratch, totallen);
1359 }
1360
1361 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1362 const u8 *maskdata,
1363 const u8 *valuedata)
1364 {
1365 struct pmac_i2c_pf_inst *inst = instdata;
1366 int i, match;
1367
1368 /* Get return value pointer, it's assumed to be a u32 */
1369 if (!args || !args->count || !args->u[0].p)
1370 return -EINVAL;
1371
1372 /* Check buffer */
1373 if (len > inst->bytes)
1374 return -EINVAL;
1375
1376 for (i = 0, match = 1; match && i < len; i ++)
1377 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1378 match = 0;
1379 *args->u[0].p = match;
1380 return 0;
1381 }
1382
1383 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1384 {
1385 msleep((duration + 999) / 1000);
1386 return 0;
1387 }
1388
1389
1390 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1391 .begin = pmac_i2c_do_begin,
1392 .end = pmac_i2c_do_end,
1393 .read_i2c = pmac_i2c_do_read,
1394 .write_i2c = pmac_i2c_do_write,
1395 .rmw_i2c = pmac_i2c_do_rmw,
1396 .read_i2c_sub = pmac_i2c_do_read_sub,
1397 .write_i2c_sub = pmac_i2c_do_write_sub,
1398 .rmw_i2c_sub = pmac_i2c_do_rmw_sub,
1399 .set_i2c_mode = pmac_i2c_do_set_mode,
1400 .mask_and_compare = pmac_i2c_do_mask_and_comp,
1401 .delay = pmac_i2c_do_delay,
1402 };
1403
1404 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1405 {
1406 DBG("dev_create(%s)\n", np->full_name);
1407
1408 pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1409 (void *)(long)quirks);
1410 }
1411
1412 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1413 {
1414 DBG("dev_create(%s)\n", np->full_name);
1415
1416 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1417 }
1418
1419 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1420 {
1421 DBG("dev_suspend(%s)\n", np->full_name);
1422 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1423 }
1424
1425 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1426 {
1427 DBG("dev_resume(%s)\n", np->full_name);
1428 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1429 }
1430
1431 void pmac_pfunc_i2c_suspend(void)
1432 {
1433 pmac_i2c_devscan(pmac_i2c_dev_suspend);
1434 }
1435
1436 void pmac_pfunc_i2c_resume(void)
1437 {
1438 pmac_i2c_devscan(pmac_i2c_dev_resume);
1439 }
1440
1441 /*
1442 * Initialize us: probe all i2c busses on the machine, instantiate
1443 * busses and platform functions as needed.
1444 */
1445 /* This is non-static as it might be called early by smp code */
1446 int __init pmac_i2c_init(void)
1447 {
1448 static int i2c_inited;
1449
1450 if (i2c_inited)
1451 return 0;
1452 i2c_inited = 1;
1453
1454 /* Probe keywest-i2c busses */
1455 kw_i2c_probe();
1456
1457 #ifdef CONFIG_ADB_PMU
1458 /* Probe PMU i2c busses */
1459 pmu_i2c_probe();
1460 #endif
1461
1462 #ifdef CONFIG_PMAC_SMU
1463 /* Probe SMU i2c busses */
1464 smu_i2c_probe();
1465 #endif
1466
1467 /* Now add plaform functions for some known devices */
1468 pmac_i2c_devscan(pmac_i2c_dev_create);
1469
1470 return 0;
1471 }
1472 machine_arch_initcall(powermac, pmac_i2c_init);
1473
1474 /* Since pmac_i2c_init can be called too early for the platform device
1475 * registration, we need to do it at a later time. In our case, subsys
1476 * happens to fit well, though I agree it's a bit of a hack...
1477 */
1478 static int __init pmac_i2c_create_platform_devices(void)
1479 {
1480 struct pmac_i2c_bus *bus;
1481 int i = 0;
1482
1483 /* In the case where we are initialized from smp_init(), we must
1484 * not use the timer (and thus the irq). It's safe from now on
1485 * though
1486 */
1487 pmac_i2c_force_poll = 0;
1488
1489 /* Create platform devices */
1490 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1491 bus->platform_dev =
1492 platform_device_alloc("i2c-powermac", i++);
1493 if (bus->platform_dev == NULL)
1494 return -ENOMEM;
1495 bus->platform_dev->dev.platform_data = bus;
1496 platform_device_add(bus->platform_dev);
1497 }
1498
1499 /* Now call platform "init" functions */
1500 pmac_i2c_devscan(pmac_i2c_dev_init);
1501
1502 return 0;
1503 }
1504 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);
Linux with added FPC-III support