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Merge branch 'for-linus' of git://oss.sgi.com/xfs/xfs
[linux/fpc-iii.git] / sound / soc / codecs / wm8993.c
blobd8d300c6175fb2b48db37207885f9110b2a8768c
1 /*
2 * wm8993.c -- WM8993 ALSA SoC audio driver
3 *
4 * Copyright 2009, 2010 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/pm.h>
18 #include <linux/i2c.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/spi/spi.h>
21 #include <linux/slab.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/tlv.h>
26 #include <sound/soc.h>
27 #include <sound/soc-dapm.h>
28 #include <sound/initval.h>
29 #include <sound/wm8993.h>
30
31 #include "wm8993.h"
32 #include "wm_hubs.h"
33
34 #define WM8993_NUM_SUPPLIES 6
35 static const char *wm8993_supply_names[WM8993_NUM_SUPPLIES] = {
36 "DCVDD",
37 "DBVDD",
38 "AVDD1",
39 "AVDD2",
40 "CPVDD",
41 "SPKVDD",
42 };
43
44 static u16 wm8993_reg_defaults[WM8993_REGISTER_COUNT] = {
45 0x8993, /* R0 - Software Reset */
46 0x0000, /* R1 - Power Management (1) */
47 0x6000, /* R2 - Power Management (2) */
48 0x0000, /* R3 - Power Management (3) */
49 0x4050, /* R4 - Audio Interface (1) */
50 0x4000, /* R5 - Audio Interface (2) */
51 0x01C8, /* R6 - Clocking 1 */
52 0x0000, /* R7 - Clocking 2 */
53 0x0000, /* R8 - Audio Interface (3) */
54 0x0040, /* R9 - Audio Interface (4) */
55 0x0004, /* R10 - DAC CTRL */
56 0x00C0, /* R11 - Left DAC Digital Volume */
57 0x00C0, /* R12 - Right DAC Digital Volume */
58 0x0000, /* R13 - Digital Side Tone */
59 0x0300, /* R14 - ADC CTRL */
60 0x00C0, /* R15 - Left ADC Digital Volume */
61 0x00C0, /* R16 - Right ADC Digital Volume */
62 0x0000, /* R17 */
63 0x0000, /* R18 - GPIO CTRL 1 */
64 0x0010, /* R19 - GPIO1 */
65 0x0000, /* R20 - IRQ_DEBOUNCE */
66 0x0000, /* R21 */
67 0x8000, /* R22 - GPIOCTRL 2 */
68 0x0800, /* R23 - GPIO_POL */
69 0x008B, /* R24 - Left Line Input 1&2 Volume */
70 0x008B, /* R25 - Left Line Input 3&4 Volume */
71 0x008B, /* R26 - Right Line Input 1&2 Volume */
72 0x008B, /* R27 - Right Line Input 3&4 Volume */
73 0x006D, /* R28 - Left Output Volume */
74 0x006D, /* R29 - Right Output Volume */
75 0x0066, /* R30 - Line Outputs Volume */
76 0x0020, /* R31 - HPOUT2 Volume */
77 0x0079, /* R32 - Left OPGA Volume */
78 0x0079, /* R33 - Right OPGA Volume */
79 0x0003, /* R34 - SPKMIXL Attenuation */
80 0x0003, /* R35 - SPKMIXR Attenuation */
81 0x0011, /* R36 - SPKOUT Mixers */
82 0x0100, /* R37 - SPKOUT Boost */
83 0x0079, /* R38 - Speaker Volume Left */
84 0x0079, /* R39 - Speaker Volume Right */
85 0x0000, /* R40 - Input Mixer2 */
86 0x0000, /* R41 - Input Mixer3 */
87 0x0000, /* R42 - Input Mixer4 */
88 0x0000, /* R43 - Input Mixer5 */
89 0x0000, /* R44 - Input Mixer6 */
90 0x0000, /* R45 - Output Mixer1 */
91 0x0000, /* R46 - Output Mixer2 */
92 0x0000, /* R47 - Output Mixer3 */
93 0x0000, /* R48 - Output Mixer4 */
94 0x0000, /* R49 - Output Mixer5 */
95 0x0000, /* R50 - Output Mixer6 */
96 0x0000, /* R51 - HPOUT2 Mixer */
97 0x0000, /* R52 - Line Mixer1 */
98 0x0000, /* R53 - Line Mixer2 */
99 0x0000, /* R54 - Speaker Mixer */
100 0x0000, /* R55 - Additional Control */
101 0x0000, /* R56 - AntiPOP1 */
102 0x0000, /* R57 - AntiPOP2 */
103 0x0000, /* R58 - MICBIAS */
104 0x0000, /* R59 */
105 0x0000, /* R60 - FLL Control 1 */
106 0x0000, /* R61 - FLL Control 2 */
107 0x0000, /* R62 - FLL Control 3 */
108 0x2EE0, /* R63 - FLL Control 4 */
109 0x0002, /* R64 - FLL Control 5 */
110 0x2287, /* R65 - Clocking 3 */
111 0x025F, /* R66 - Clocking 4 */
112 0x0000, /* R67 - MW Slave Control */
113 0x0000, /* R68 */
114 0x0002, /* R69 - Bus Control 1 */
115 0x0000, /* R70 - Write Sequencer 0 */
116 0x0000, /* R71 - Write Sequencer 1 */
117 0x0000, /* R72 - Write Sequencer 2 */
118 0x0000, /* R73 - Write Sequencer 3 */
119 0x0000, /* R74 - Write Sequencer 4 */
120 0x0000, /* R75 - Write Sequencer 5 */
121 0x1F25, /* R76 - Charge Pump 1 */
122 0x0000, /* R77 */
123 0x0000, /* R78 */
124 0x0000, /* R79 */
125 0x0000, /* R80 */
126 0x0000, /* R81 - Class W 0 */
127 0x0000, /* R82 */
128 0x0000, /* R83 */
129 0x0000, /* R84 - DC Servo 0 */
130 0x054A, /* R85 - DC Servo 1 */
131 0x0000, /* R86 */
132 0x0000, /* R87 - DC Servo 3 */
133 0x0000, /* R88 - DC Servo Readback 0 */
134 0x0000, /* R89 - DC Servo Readback 1 */
135 0x0000, /* R90 - DC Servo Readback 2 */
136 0x0000, /* R91 */
137 0x0000, /* R92 */
138 0x0000, /* R93 */
139 0x0000, /* R94 */
140 0x0000, /* R95 */
141 0x0100, /* R96 - Analogue HP 0 */
142 0x0000, /* R97 */
143 0x0000, /* R98 - EQ1 */
144 0x000C, /* R99 - EQ2 */
145 0x000C, /* R100 - EQ3 */
146 0x000C, /* R101 - EQ4 */
147 0x000C, /* R102 - EQ5 */
148 0x000C, /* R103 - EQ6 */
149 0x0FCA, /* R104 - EQ7 */
150 0x0400, /* R105 - EQ8 */
151 0x00D8, /* R106 - EQ9 */
152 0x1EB5, /* R107 - EQ10 */
153 0xF145, /* R108 - EQ11 */
154 0x0B75, /* R109 - EQ12 */
155 0x01C5, /* R110 - EQ13 */
156 0x1C58, /* R111 - EQ14 */
157 0xF373, /* R112 - EQ15 */
158 0x0A54, /* R113 - EQ16 */
159 0x0558, /* R114 - EQ17 */
160 0x168E, /* R115 - EQ18 */
161 0xF829, /* R116 - EQ19 */
162 0x07AD, /* R117 - EQ20 */
163 0x1103, /* R118 - EQ21 */
164 0x0564, /* R119 - EQ22 */
165 0x0559, /* R120 - EQ23 */
166 0x4000, /* R121 - EQ24 */
167 0x0000, /* R122 - Digital Pulls */
168 0x0F08, /* R123 - DRC Control 1 */
169 0x0000, /* R124 - DRC Control 2 */
170 0x0080, /* R125 - DRC Control 3 */
171 0x0000, /* R126 - DRC Control 4 */
172 };
173
174 static struct {
175 int ratio;
176 int clk_sys_rate;
177 } clk_sys_rates[] = {
178 { 64, 0 },
179 { 128, 1 },
180 { 192, 2 },
181 { 256, 3 },
182 { 384, 4 },
183 { 512, 5 },
184 { 768, 6 },
185 { 1024, 7 },
186 { 1408, 8 },
187 { 1536, 9 },
188 };
189
190 static struct {
191 int rate;
192 int sample_rate;
193 } sample_rates[] = {
194 { 8000, 0 },
195 { 11025, 1 },
196 { 12000, 1 },
197 { 16000, 2 },
198 { 22050, 3 },
199 { 24000, 3 },
200 { 32000, 4 },
201 { 44100, 5 },
202 { 48000, 5 },
203 };
204
205 static struct {
206 int div; /* *10 due to .5s */
207 int bclk_div;
208 } bclk_divs[] = {
209 { 10, 0 },
210 { 15, 1 },
211 { 20, 2 },
212 { 30, 3 },
213 { 40, 4 },
214 { 55, 5 },
215 { 60, 6 },
216 { 80, 7 },
217 { 110, 8 },
218 { 120, 9 },
219 { 160, 10 },
220 { 220, 11 },
221 { 240, 12 },
222 { 320, 13 },
223 { 440, 14 },
224 { 480, 15 },
225 };
226
227 struct wm8993_priv {
228 struct wm_hubs_data hubs_data;
229 u16 reg_cache[WM8993_REGISTER_COUNT];
230 struct regulator_bulk_data supplies[WM8993_NUM_SUPPLIES];
231 struct wm8993_platform_data pdata;
232 struct snd_soc_codec codec;
233 int master;
234 int sysclk_source;
235 int tdm_slots;
236 int tdm_width;
237 unsigned int mclk_rate;
238 unsigned int sysclk_rate;
239 unsigned int fs;
240 unsigned int bclk;
241 int class_w_users;
242 unsigned int fll_fref;
243 unsigned int fll_fout;
244 int fll_src;
245 };
246
247 static int wm8993_volatile(unsigned int reg)
248 {
249 switch (reg) {
250 case WM8993_SOFTWARE_RESET:
251 case WM8993_DC_SERVO_0:
252 case WM8993_DC_SERVO_READBACK_0:
253 case WM8993_DC_SERVO_READBACK_1:
254 case WM8993_DC_SERVO_READBACK_2:
255 return 1;
256 default:
257 return 0;
258 }
259 }
260
261 struct _fll_div {
262 u16 fll_fratio;
263 u16 fll_outdiv;
264 u16 fll_clk_ref_div;
265 u16 n;
266 u16 k;
267 };
268
269 /* The size in bits of the FLL divide multiplied by 10
270 * to allow rounding later */
271 #define FIXED_FLL_SIZE ((1 << 16) * 10)
272
273 static struct {
274 unsigned int min;
275 unsigned int max;
276 u16 fll_fratio;
277 int ratio;
278 } fll_fratios[] = {
279 { 0, 64000, 4, 16 },
280 { 64000, 128000, 3, 8 },
281 { 128000, 256000, 2, 4 },
282 { 256000, 1000000, 1, 2 },
283 { 1000000, 13500000, 0, 1 },
284 };
285
286 static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
287 unsigned int Fout)
288 {
289 u64 Kpart;
290 unsigned int K, Ndiv, Nmod, target;
291 unsigned int div;
292 int i;
293
294 /* Fref must be <=13.5MHz */
295 div = 1;
296 fll_div->fll_clk_ref_div = 0;
297 while ((Fref / div) > 13500000) {
298 div *= 2;
299 fll_div->fll_clk_ref_div++;
300
301 if (div > 8) {
302 pr_err("Can't scale %dMHz input down to <=13.5MHz\n",
303 Fref);
304 return -EINVAL;
305 }
306 }
307
308 pr_debug("Fref=%u Fout=%u\n", Fref, Fout);
309
310 /* Apply the division for our remaining calculations */
311 Fref /= div;
312
313 /* Fvco should be 90-100MHz; don't check the upper bound */
314 div = 0;
315 target = Fout * 2;
316 while (target < 90000000) {
317 div++;
318 target *= 2;
319 if (div > 7) {
320 pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n",
321 Fout);
322 return -EINVAL;
323 }
324 }
325 fll_div->fll_outdiv = div;
326
327 pr_debug("Fvco=%dHz\n", target);
328
329 /* Find an appropraite FLL_FRATIO and factor it out of the target */
330 for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
331 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
332 fll_div->fll_fratio = fll_fratios[i].fll_fratio;
333 target /= fll_fratios[i].ratio;
334 break;
335 }
336 }
337 if (i == ARRAY_SIZE(fll_fratios)) {
338 pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref);
339 return -EINVAL;
340 }
341
342 /* Now, calculate N.K */
343 Ndiv = target / Fref;
344
345 fll_div->n = Ndiv;
346 Nmod = target % Fref;
347 pr_debug("Nmod=%d\n", Nmod);
348
349 /* Calculate fractional part - scale up so we can round. */
350 Kpart = FIXED_FLL_SIZE * (long long)Nmod;
351
352 do_div(Kpart, Fref);
353
354 K = Kpart & 0xFFFFFFFF;
355
356 if ((K % 10) >= 5)
357 K += 5;
358
359 /* Move down to proper range now rounding is done */
360 fll_div->k = K / 10;
361
362 pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n",
363 fll_div->n, fll_div->k,
364 fll_div->fll_fratio, fll_div->fll_outdiv,
365 fll_div->fll_clk_ref_div);
366
367 return 0;
368 }
369
370 static int wm8993_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
371 unsigned int Fref, unsigned int Fout)
372 {
373 struct snd_soc_codec *codec = dai->codec;
374 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
375 u16 reg1, reg4, reg5;
376 struct _fll_div fll_div;
377 int ret;
378
379 /* Any change? */
380 if (Fref == wm8993->fll_fref && Fout == wm8993->fll_fout)
381 return 0;
382
383 /* Disable the FLL */
384 if (Fout == 0) {
385 dev_dbg(codec->dev, "FLL disabled\n");
386 wm8993->fll_fref = 0;
387 wm8993->fll_fout = 0;
388
389 reg1 = snd_soc_read(codec, WM8993_FLL_CONTROL_1);
390 reg1 &= ~WM8993_FLL_ENA;
391 snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1);
392
393 return 0;
394 }
395
396 ret = fll_factors(&fll_div, Fref, Fout);
397 if (ret != 0)
398 return ret;
399
400 reg5 = snd_soc_read(codec, WM8993_FLL_CONTROL_5);
401 reg5 &= ~WM8993_FLL_CLK_SRC_MASK;
402
403 switch (fll_id) {
404 case WM8993_FLL_MCLK:
405 break;
406
407 case WM8993_FLL_LRCLK:
408 reg5 |= 1;
409 break;
410
411 case WM8993_FLL_BCLK:
412 reg5 |= 2;
413 break;
414
415 default:
416 dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id);
417 return -EINVAL;
418 }
419
420 /* Any FLL configuration change requires that the FLL be
421 * disabled first. */
422 reg1 = snd_soc_read(codec, WM8993_FLL_CONTROL_1);
423 reg1 &= ~WM8993_FLL_ENA;
424 snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1);
425
426 /* Apply the configuration */
427 if (fll_div.k)
428 reg1 |= WM8993_FLL_FRAC_MASK;
429 else
430 reg1 &= ~WM8993_FLL_FRAC_MASK;
431 snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1);
432
433 snd_soc_write(codec, WM8993_FLL_CONTROL_2,
434 (fll_div.fll_outdiv << WM8993_FLL_OUTDIV_SHIFT) |
435 (fll_div.fll_fratio << WM8993_FLL_FRATIO_SHIFT));
436 snd_soc_write(codec, WM8993_FLL_CONTROL_3, fll_div.k);
437
438 reg4 = snd_soc_read(codec, WM8993_FLL_CONTROL_4);
439 reg4 &= ~WM8993_FLL_N_MASK;
440 reg4 |= fll_div.n << WM8993_FLL_N_SHIFT;
441 snd_soc_write(codec, WM8993_FLL_CONTROL_4, reg4);
442
443 reg5 &= ~WM8993_FLL_CLK_REF_DIV_MASK;
444 reg5 |= fll_div.fll_clk_ref_div << WM8993_FLL_CLK_REF_DIV_SHIFT;
445 snd_soc_write(codec, WM8993_FLL_CONTROL_5, reg5);
446
447 /* Enable the FLL */
448 snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1 | WM8993_FLL_ENA);
449
450 dev_dbg(codec->dev, "FLL enabled at %dHz->%dHz\n", Fref, Fout);
451
452 wm8993->fll_fref = Fref;
453 wm8993->fll_fout = Fout;
454 wm8993->fll_src = source;
455
456 return 0;
457 }
458
459 static int configure_clock(struct snd_soc_codec *codec)
460 {
461 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
462 unsigned int reg;
463
464 /* This should be done on init() for bypass paths */
465 switch (wm8993->sysclk_source) {
466 case WM8993_SYSCLK_MCLK:
467 dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8993->mclk_rate);
468
469 reg = snd_soc_read(codec, WM8993_CLOCKING_2);
470 reg &= ~(WM8993_MCLK_DIV | WM8993_SYSCLK_SRC);
471 if (wm8993->mclk_rate > 13500000) {
472 reg |= WM8993_MCLK_DIV;
473 wm8993->sysclk_rate = wm8993->mclk_rate / 2;
474 } else {
475 reg &= ~WM8993_MCLK_DIV;
476 wm8993->sysclk_rate = wm8993->mclk_rate;
477 }
478 snd_soc_write(codec, WM8993_CLOCKING_2, reg);
479 break;
480
481 case WM8993_SYSCLK_FLL:
482 dev_dbg(codec->dev, "Using %dHz FLL clock\n",
483 wm8993->fll_fout);
484
485 reg = snd_soc_read(codec, WM8993_CLOCKING_2);
486 reg |= WM8993_SYSCLK_SRC;
487 if (wm8993->fll_fout > 13500000) {
488 reg |= WM8993_MCLK_DIV;
489 wm8993->sysclk_rate = wm8993->fll_fout / 2;
490 } else {
491 reg &= ~WM8993_MCLK_DIV;
492 wm8993->sysclk_rate = wm8993->fll_fout;
493 }
494 snd_soc_write(codec, WM8993_CLOCKING_2, reg);
495 break;
496
497 default:
498 dev_err(codec->dev, "System clock not configured\n");
499 return -EINVAL;
500 }
501
502 dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8993->sysclk_rate);
503
504 return 0;
505 }
506
507 static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0);
508 static const DECLARE_TLV_DB_SCALE(drc_comp_threash, -4500, 75, 0);
509 static const DECLARE_TLV_DB_SCALE(drc_comp_amp, -2250, 75, 0);
510 static const DECLARE_TLV_DB_SCALE(drc_min_tlv, -1800, 600, 0);
511 static const unsigned int drc_max_tlv[] = {
512 TLV_DB_RANGE_HEAD(4),
513 0, 2, TLV_DB_SCALE_ITEM(1200, 600, 0),
514 3, 3, TLV_DB_SCALE_ITEM(3600, 0, 0),
515 };
516 static const DECLARE_TLV_DB_SCALE(drc_qr_tlv, 1200, 600, 0);
517 static const DECLARE_TLV_DB_SCALE(drc_startup_tlv, -1800, 300, 0);
518 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
519 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
520 static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0);
521
522 static const char *dac_deemph_text[] = {
523 "None",
524 "32kHz",
525 "44.1kHz",
526 "48kHz",
527 };
528
529 static const struct soc_enum dac_deemph =
530 SOC_ENUM_SINGLE(WM8993_DAC_CTRL, 4, 4, dac_deemph_text);
531
532 static const char *adc_hpf_text[] = {
533 "Hi-Fi",
534 "Voice 1",
535 "Voice 2",
536 "Voice 3",
537 };
538
539 static const struct soc_enum adc_hpf =
540 SOC_ENUM_SINGLE(WM8993_ADC_CTRL, 5, 4, adc_hpf_text);
541
542 static const char *drc_path_text[] = {
543 "ADC",
544 "DAC"
545 };
546
547 static const struct soc_enum drc_path =
548 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 14, 2, drc_path_text);
549
550 static const char *drc_r0_text[] = {
551 "1",
552 "1/2",
553 "1/4",
554 "1/8",
555 "1/16",
556 "0",
557 };
558
559 static const struct soc_enum drc_r0 =
560 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 8, 6, drc_r0_text);
561
562 static const char *drc_r1_text[] = {
563 "1",
564 "1/2",
565 "1/4",
566 "1/8",
567 "0",
568 };
569
570 static const struct soc_enum drc_r1 =
571 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_4, 13, 5, drc_r1_text);
572
573 static const char *drc_attack_text[] = {
574 "Reserved",
575 "181us",
576 "363us",
577 "726us",
578 "1.45ms",
579 "2.9ms",
580 "5.8ms",
581 "11.6ms",
582 "23.2ms",
583 "46.4ms",
584 "92.8ms",
585 "185.6ms",
586 };
587
588 static const struct soc_enum drc_attack =
589 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 12, 12, drc_attack_text);
590
591 static const char *drc_decay_text[] = {
592 "186ms",
593 "372ms",
594 "743ms",
595 "1.49s",
596 "2.97ms",
597 "5.94ms",
598 "11.89ms",
599 "23.78ms",
600 "47.56ms",
601 };
602
603 static const struct soc_enum drc_decay =
604 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 8, 9, drc_decay_text);
605
606 static const char *drc_ff_text[] = {
607 "5 samples",
608 "9 samples",
609 };
610
611 static const struct soc_enum drc_ff =
612 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 7, 2, drc_ff_text);
613
614 static const char *drc_qr_rate_text[] = {
615 "0.725ms",
616 "1.45ms",
617 "5.8ms",
618 };
619
620 static const struct soc_enum drc_qr_rate =
621 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 0, 3, drc_qr_rate_text);
622
623 static const char *drc_smooth_text[] = {
624 "Low",
625 "Medium",
626 "High",
627 };
628
629 static const struct soc_enum drc_smooth =
630 SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 4, 3, drc_smooth_text);
631
632 static const struct snd_kcontrol_new wm8993_snd_controls[] = {
633 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8993_DIGITAL_SIDE_TONE,
634 5, 9, 12, 0, sidetone_tlv),
635
636 SOC_SINGLE("DRC Switch", WM8993_DRC_CONTROL_1, 15, 1, 0),
637 SOC_ENUM("DRC Path", drc_path),
638 SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8993_DRC_CONTROL_2,
639 2, 60, 1, drc_comp_threash),
640 SOC_SINGLE_TLV("DRC Compressor Amplitude Volume", WM8993_DRC_CONTROL_3,
641 11, 30, 1, drc_comp_amp),
642 SOC_ENUM("DRC R0", drc_r0),
643 SOC_ENUM("DRC R1", drc_r1),
644 SOC_SINGLE_TLV("DRC Minimum Volume", WM8993_DRC_CONTROL_1, 2, 3, 1,
645 drc_min_tlv),
646 SOC_SINGLE_TLV("DRC Maximum Volume", WM8993_DRC_CONTROL_1, 0, 3, 0,
647 drc_max_tlv),
648 SOC_ENUM("DRC Attack Rate", drc_attack),
649 SOC_ENUM("DRC Decay Rate", drc_decay),
650 SOC_ENUM("DRC FF Delay", drc_ff),
651 SOC_SINGLE("DRC Anti-clip Switch", WM8993_DRC_CONTROL_1, 9, 1, 0),
652 SOC_SINGLE("DRC Quick Release Switch", WM8993_DRC_CONTROL_1, 10, 1, 0),
653 SOC_SINGLE_TLV("DRC Quick Release Volume", WM8993_DRC_CONTROL_3, 2, 3, 0,
654 drc_qr_tlv),
655 SOC_ENUM("DRC Quick Release Rate", drc_qr_rate),
656 SOC_SINGLE("DRC Smoothing Switch", WM8993_DRC_CONTROL_1, 11, 1, 0),
657 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8993_DRC_CONTROL_1, 8, 1, 0),
658 SOC_ENUM("DRC Smoothing Hysteresis Threshold", drc_smooth),
659 SOC_SINGLE_TLV("DRC Startup Volume", WM8993_DRC_CONTROL_4, 8, 18, 0,
660 drc_startup_tlv),
661
662 SOC_SINGLE("EQ Switch", WM8993_EQ1, 0, 1, 0),
663
664 SOC_DOUBLE_R_TLV("Capture Volume", WM8993_LEFT_ADC_DIGITAL_VOLUME,
665 WM8993_RIGHT_ADC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
666 SOC_SINGLE("ADC High Pass Filter Switch", WM8993_ADC_CTRL, 8, 1, 0),
667 SOC_ENUM("ADC High Pass Filter Mode", adc_hpf),
668
669 SOC_DOUBLE_R_TLV("Playback Volume", WM8993_LEFT_DAC_DIGITAL_VOLUME,
670 WM8993_RIGHT_DAC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
671 SOC_SINGLE_TLV("Playback Boost Volume", WM8993_AUDIO_INTERFACE_2, 10, 3, 0,
672 dac_boost_tlv),
673 SOC_ENUM("DAC Deemphasis", dac_deemph),
674
675 SOC_SINGLE_TLV("SPKL DAC Volume", WM8993_SPKMIXL_ATTENUATION,
676 2, 1, 1, wm_hubs_spkmix_tlv),
677
678 SOC_SINGLE_TLV("SPKR DAC Volume", WM8993_SPKMIXR_ATTENUATION,
679 2, 1, 1, wm_hubs_spkmix_tlv),
680 };
681
682 static const struct snd_kcontrol_new wm8993_eq_controls[] = {
683 SOC_SINGLE_TLV("EQ1 Volume", WM8993_EQ2, 0, 24, 0, eq_tlv),
684 SOC_SINGLE_TLV("EQ2 Volume", WM8993_EQ3, 0, 24, 0, eq_tlv),
685 SOC_SINGLE_TLV("EQ3 Volume", WM8993_EQ4, 0, 24, 0, eq_tlv),
686 SOC_SINGLE_TLV("EQ4 Volume", WM8993_EQ5, 0, 24, 0, eq_tlv),
687 SOC_SINGLE_TLV("EQ5 Volume", WM8993_EQ6, 0, 24, 0, eq_tlv),
688 };
689
690 static int clk_sys_event(struct snd_soc_dapm_widget *w,
691 struct snd_kcontrol *kcontrol, int event)
692 {
693 struct snd_soc_codec *codec = w->codec;
694
695 switch (event) {
696 case SND_SOC_DAPM_PRE_PMU:
697 return configure_clock(codec);
698
699 case SND_SOC_DAPM_POST_PMD:
700 break;
701 }
702
703 return 0;
704 }
705
706 /*
707 * When used with DAC outputs only the WM8993 charge pump supports
708 * operation in class W mode, providing very low power consumption
709 * when used with digital sources. Enable and disable this mode
710 * automatically depending on the mixer configuration.
711 *
712 * Currently the only supported paths are the direct DAC->headphone
713 * paths (which provide minimum power consumption anyway).
714 */
715 static int class_w_put(struct snd_kcontrol *kcontrol,
716 struct snd_ctl_elem_value *ucontrol)
717 {
718 struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol);
719 struct snd_soc_codec *codec = widget->codec;
720 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
721 int ret;
722
723 /* Turn it off if we're using the main output mixer */
724 if (ucontrol->value.integer.value[0] == 0) {
725 if (wm8993->class_w_users == 0) {
726 dev_dbg(codec->dev, "Disabling Class W\n");
727 snd_soc_update_bits(codec, WM8993_CLASS_W_0,
728 WM8993_CP_DYN_FREQ |
729 WM8993_CP_DYN_V,
730 0);
731 }
732 wm8993->class_w_users++;
733 }
734
735 /* Implement the change */
736 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
737
738 /* Enable it if we're using the direct DAC path */
739 if (ucontrol->value.integer.value[0] == 1) {
740 if (wm8993->class_w_users == 1) {
741 dev_dbg(codec->dev, "Enabling Class W\n");
742 snd_soc_update_bits(codec, WM8993_CLASS_W_0,
743 WM8993_CP_DYN_FREQ |
744 WM8993_CP_DYN_V,
745 WM8993_CP_DYN_FREQ |
746 WM8993_CP_DYN_V);
747 }
748 wm8993->class_w_users--;
749 }
750
751 dev_dbg(codec->dev, "Indirect DAC use count now %d\n",
752 wm8993->class_w_users);
753
754 return ret;
755 }
756
757 #define SOC_DAPM_ENUM_W(xname, xenum) \
758 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
759 .info = snd_soc_info_enum_double, \
760 .get = snd_soc_dapm_get_enum_double, \
761 .put = class_w_put, \
762 .private_value = (unsigned long)&xenum }
763
764 static const char *hp_mux_text[] = {
765 "Mixer",
766 "DAC",
767 };
768
769 static const struct soc_enum hpl_enum =
770 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
771
772 static const struct snd_kcontrol_new hpl_mux =
773 SOC_DAPM_ENUM_W("Left Headphone Mux", hpl_enum);
774
775 static const struct soc_enum hpr_enum =
776 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
777
778 static const struct snd_kcontrol_new hpr_mux =
779 SOC_DAPM_ENUM_W("Right Headphone Mux", hpr_enum);
780
781 static const struct snd_kcontrol_new left_speaker_mixer[] = {
782 SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 7, 1, 0),
783 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_SPEAKER_MIXER, 5, 1, 0),
784 SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 3, 1, 0),
785 SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
786 };
787
788 static const struct snd_kcontrol_new right_speaker_mixer[] = {
789 SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
790 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_SPEAKER_MIXER, 4, 1, 0),
791 SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 2, 1, 0),
792 SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 0, 1, 0),
793 };
794
795 static const char *aif_text[] = {
796 "Left", "Right"
797 };
798
799 static const struct soc_enum aifoutl_enum =
800 SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 15, 2, aif_text);
801
802 static const struct snd_kcontrol_new aifoutl_mux =
803 SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum);
804
805 static const struct soc_enum aifoutr_enum =
806 SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 14, 2, aif_text);
807
808 static const struct snd_kcontrol_new aifoutr_mux =
809 SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum);
810
811 static const struct soc_enum aifinl_enum =
812 SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 15, 2, aif_text);
813
814 static const struct snd_kcontrol_new aifinl_mux =
815 SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum);
816
817 static const struct soc_enum aifinr_enum =
818 SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 14, 2, aif_text);
819
820 static const struct snd_kcontrol_new aifinr_mux =
821 SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum);
822
823 static const char *sidetone_text[] = {
824 "None", "Left", "Right"
825 };
826
827 static const struct soc_enum sidetonel_enum =
828 SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 2, 3, sidetone_text);
829
830 static const struct snd_kcontrol_new sidetonel_mux =
831 SOC_DAPM_ENUM("Left Sidetone", sidetonel_enum);
832
833 static const struct soc_enum sidetoner_enum =
834 SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 0, 3, sidetone_text);
835
836 static const struct snd_kcontrol_new sidetoner_mux =
837 SOC_DAPM_ENUM("Right Sidetone", sidetoner_enum);
838
839 static const struct snd_soc_dapm_widget wm8993_dapm_widgets[] = {
840 SND_SOC_DAPM_SUPPLY("CLK_SYS", WM8993_BUS_CONTROL_1, 1, 0, clk_sys_event,
841 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
842 SND_SOC_DAPM_SUPPLY("TOCLK", WM8993_CLOCKING_1, 14, 0, NULL, 0),
843 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8993_CLOCKING_3, 0, 0, NULL, 0),
844
845 SND_SOC_DAPM_ADC("ADCL", NULL, WM8993_POWER_MANAGEMENT_2, 1, 0),
846 SND_SOC_DAPM_ADC("ADCR", NULL, WM8993_POWER_MANAGEMENT_2, 0, 0),
847
848 SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux),
849 SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux),
850
851 SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
852 SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
853
854 SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
855 SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
856
857 SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux),
858 SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux),
859
860 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &sidetonel_mux),
861 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &sidetoner_mux),
862
863 SND_SOC_DAPM_DAC("DACL", NULL, WM8993_POWER_MANAGEMENT_3, 1, 0),
864 SND_SOC_DAPM_DAC("DACR", NULL, WM8993_POWER_MANAGEMENT_3, 0, 0),
865
866 SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux),
867 SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux),
868
869 SND_SOC_DAPM_MIXER("SPKL", WM8993_POWER_MANAGEMENT_3, 8, 0,
870 left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
871 SND_SOC_DAPM_MIXER("SPKR", WM8993_POWER_MANAGEMENT_3, 9, 0,
872 right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
873
874 };
875
876 static const struct snd_soc_dapm_route routes[] = {
877 { "ADCL", NULL, "CLK_SYS" },
878 { "ADCL", NULL, "CLK_DSP" },
879 { "ADCR", NULL, "CLK_SYS" },
880 { "ADCR", NULL, "CLK_DSP" },
881
882 { "AIFOUTL Mux", "Left", "ADCL" },
883 { "AIFOUTL Mux", "Right", "ADCR" },
884 { "AIFOUTR Mux", "Left", "ADCL" },
885 { "AIFOUTR Mux", "Right", "ADCR" },
886
887 { "AIFOUTL", NULL, "AIFOUTL Mux" },
888 { "AIFOUTR", NULL, "AIFOUTR Mux" },
889
890 { "DACL Mux", "Left", "AIFINL" },
891 { "DACL Mux", "Right", "AIFINR" },
892 { "DACR Mux", "Left", "AIFINL" },
893 { "DACR Mux", "Right", "AIFINR" },
894
895 { "DACL Sidetone", "Left", "ADCL" },
896 { "DACL Sidetone", "Right", "ADCR" },
897 { "DACR Sidetone", "Left", "ADCL" },
898 { "DACR Sidetone", "Right", "ADCR" },
899
900 { "DACL", NULL, "CLK_SYS" },
901 { "DACL", NULL, "CLK_DSP" },
902 { "DACL", NULL, "DACL Mux" },
903 { "DACL", NULL, "DACL Sidetone" },
904 { "DACR", NULL, "CLK_SYS" },
905 { "DACR", NULL, "CLK_DSP" },
906 { "DACR", NULL, "DACR Mux" },
907 { "DACR", NULL, "DACR Sidetone" },
908
909 { "Left Output Mixer", "DAC Switch", "DACL" },
910
911 { "Right Output Mixer", "DAC Switch", "DACR" },
912
913 { "Left Output PGA", NULL, "CLK_SYS" },
914
915 { "Right Output PGA", NULL, "CLK_SYS" },
916
917 { "SPKL", "DAC Switch", "DACL" },
918 { "SPKL", NULL, "CLK_SYS" },
919
920 { "SPKR", "DAC Switch", "DACR" },
921 { "SPKR", NULL, "CLK_SYS" },
922
923 { "Left Headphone Mux", "DAC", "DACL" },
924 { "Right Headphone Mux", "DAC", "DACR" },
925 };
926
927 static void wm8993_cache_restore(struct snd_soc_codec *codec)
928 {
929 u16 *cache = codec->reg_cache;
930 int i;
931
932 if (!codec->cache_sync)
933 return;
934
935 /* Reenable hardware writes */
936 codec->cache_only = 0;
937
938 /* Restore the register settings */
939 for (i = 1; i < WM8993_MAX_REGISTER; i++) {
940 if (cache[i] == wm8993_reg_defaults[i])
941 continue;
942 snd_soc_write(codec, i, cache[i]);
943 }
944
945 /* We're in sync again */
946 codec->cache_sync = 0;
947 }
948
949 static int wm8993_set_bias_level(struct snd_soc_codec *codec,
950 enum snd_soc_bias_level level)
951 {
952 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
953 int ret;
954
955 switch (level) {
956 case SND_SOC_BIAS_ON:
957 case SND_SOC_BIAS_PREPARE:
958 /* VMID=2*40k */
959 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
960 WM8993_VMID_SEL_MASK, 0x2);
961 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
962 WM8993_TSHUT_ENA, WM8993_TSHUT_ENA);
963 break;
964
965 case SND_SOC_BIAS_STANDBY:
966 if (codec->bias_level == SND_SOC_BIAS_OFF) {
967 ret = regulator_bulk_enable(ARRAY_SIZE(wm8993->supplies),
968 wm8993->supplies);
969 if (ret != 0)
970 return ret;
971
972 wm8993_cache_restore(codec);
973
974 /* Tune DC servo configuration */
975 snd_soc_write(codec, 0x44, 3);
976 snd_soc_write(codec, 0x56, 3);
977 snd_soc_write(codec, 0x44, 0);
978
979 /* Bring up VMID with fast soft start */
980 snd_soc_update_bits(codec, WM8993_ANTIPOP2,
981 WM8993_STARTUP_BIAS_ENA |
982 WM8993_VMID_BUF_ENA |
983 WM8993_VMID_RAMP_MASK |
984 WM8993_BIAS_SRC,
985 WM8993_STARTUP_BIAS_ENA |
986 WM8993_VMID_BUF_ENA |
987 WM8993_VMID_RAMP_MASK |
988 WM8993_BIAS_SRC);
989
990 /* If either line output is single ended we
991 * need the VMID buffer */
992 if (!wm8993->pdata.lineout1_diff ||
993 !wm8993->pdata.lineout2_diff)
994 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
995 WM8993_LINEOUT_VMID_BUF_ENA,
996 WM8993_LINEOUT_VMID_BUF_ENA);
997
998 /* VMID=2*40k */
999 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1000 WM8993_VMID_SEL_MASK |
1001 WM8993_BIAS_ENA,
1002 WM8993_BIAS_ENA | 0x2);
1003 msleep(32);
1004
1005 /* Switch to normal bias */
1006 snd_soc_update_bits(codec, WM8993_ANTIPOP2,
1007 WM8993_BIAS_SRC |
1008 WM8993_STARTUP_BIAS_ENA, 0);
1009 }
1010
1011 /* VMID=2*240k */
1012 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1013 WM8993_VMID_SEL_MASK, 0x4);
1014
1015 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
1016 WM8993_TSHUT_ENA, 0);
1017 break;
1018
1019 case SND_SOC_BIAS_OFF:
1020 snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1021 WM8993_LINEOUT_VMID_BUF_ENA, 0);
1022
1023 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1024 WM8993_VMID_SEL_MASK | WM8993_BIAS_ENA,
1025 0);
1026
1027 #ifdef CONFIG_REGULATOR
1028 /* Post 2.6.34 we will be able to get a callback when
1029 * the regulators are disabled which we can use but
1030 * for now just assume that the power will be cut if
1031 * the regulator API is in use.
1032 */
1033 codec->cache_sync = 1;
1034 #endif
1035
1036 regulator_bulk_disable(ARRAY_SIZE(wm8993->supplies),
1037 wm8993->supplies);
1038 break;
1039 }
1040
1041 codec->bias_level = level;
1042
1043 return 0;
1044 }
1045
1046 static int wm8993_set_sysclk(struct snd_soc_dai *codec_dai,
1047 int clk_id, unsigned int freq, int dir)
1048 {
1049 struct snd_soc_codec *codec = codec_dai->codec;
1050 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1051
1052 switch (clk_id) {
1053 case WM8993_SYSCLK_MCLK:
1054 wm8993->mclk_rate = freq;
1055 case WM8993_SYSCLK_FLL:
1056 wm8993->sysclk_source = clk_id;
1057 break;
1058
1059 default:
1060 return -EINVAL;
1061 }
1062
1063 return 0;
1064 }
1065
1066 static int wm8993_set_dai_fmt(struct snd_soc_dai *dai,
1067 unsigned int fmt)
1068 {
1069 struct snd_soc_codec *codec = dai->codec;
1070 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1071 unsigned int aif1 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_1);
1072 unsigned int aif4 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_4);
1073
1074 aif1 &= ~(WM8993_BCLK_DIR | WM8993_AIF_BCLK_INV |
1075 WM8993_AIF_LRCLK_INV | WM8993_AIF_FMT_MASK);
1076 aif4 &= ~WM8993_LRCLK_DIR;
1077
1078 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1079 case SND_SOC_DAIFMT_CBS_CFS:
1080 wm8993->master = 0;
1081 break;
1082 case SND_SOC_DAIFMT_CBS_CFM:
1083 aif4 |= WM8993_LRCLK_DIR;
1084 wm8993->master = 1;
1085 break;
1086 case SND_SOC_DAIFMT_CBM_CFS:
1087 aif1 |= WM8993_BCLK_DIR;
1088 wm8993->master = 1;
1089 break;
1090 case SND_SOC_DAIFMT_CBM_CFM:
1091 aif1 |= WM8993_BCLK_DIR;
1092 aif4 |= WM8993_LRCLK_DIR;
1093 wm8993->master = 1;
1094 break;
1095 default:
1096 return -EINVAL;
1097 }
1098
1099 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1100 case SND_SOC_DAIFMT_DSP_B:
1101 aif1 |= WM8993_AIF_LRCLK_INV;
1102 case SND_SOC_DAIFMT_DSP_A:
1103 aif1 |= 0x18;
1104 break;
1105 case SND_SOC_DAIFMT_I2S:
1106 aif1 |= 0x10;
1107 break;
1108 case SND_SOC_DAIFMT_RIGHT_J:
1109 break;
1110 case SND_SOC_DAIFMT_LEFT_J:
1111 aif1 |= 0x8;
1112 break;
1113 default:
1114 return -EINVAL;
1115 }
1116
1117 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1118 case SND_SOC_DAIFMT_DSP_A:
1119 case SND_SOC_DAIFMT_DSP_B:
1120 /* frame inversion not valid for DSP modes */
1121 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1122 case SND_SOC_DAIFMT_NB_NF:
1123 break;
1124 case SND_SOC_DAIFMT_IB_NF:
1125 aif1 |= WM8993_AIF_BCLK_INV;
1126 break;
1127 default:
1128 return -EINVAL;
1129 }
1130 break;
1131
1132 case SND_SOC_DAIFMT_I2S:
1133 case SND_SOC_DAIFMT_RIGHT_J:
1134 case SND_SOC_DAIFMT_LEFT_J:
1135 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1136 case SND_SOC_DAIFMT_NB_NF:
1137 break;
1138 case SND_SOC_DAIFMT_IB_IF:
1139 aif1 |= WM8993_AIF_BCLK_INV | WM8993_AIF_LRCLK_INV;
1140 break;
1141 case SND_SOC_DAIFMT_IB_NF:
1142 aif1 |= WM8993_AIF_BCLK_INV;
1143 break;
1144 case SND_SOC_DAIFMT_NB_IF:
1145 aif1 |= WM8993_AIF_LRCLK_INV;
1146 break;
1147 default:
1148 return -EINVAL;
1149 }
1150 break;
1151 default:
1152 return -EINVAL;
1153 }
1154
1155 snd_soc_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1156 snd_soc_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1157
1158 return 0;
1159 }
1160
1161 static int wm8993_hw_params(struct snd_pcm_substream *substream,
1162 struct snd_pcm_hw_params *params,
1163 struct snd_soc_dai *dai)
1164 {
1165 struct snd_soc_codec *codec = dai->codec;
1166 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1167 int ret, i, best, best_val, cur_val;
1168 unsigned int clocking1, clocking3, aif1, aif4;
1169
1170 clocking1 = snd_soc_read(codec, WM8993_CLOCKING_1);
1171 clocking1 &= ~WM8993_BCLK_DIV_MASK;
1172
1173 clocking3 = snd_soc_read(codec, WM8993_CLOCKING_3);
1174 clocking3 &= ~(WM8993_CLK_SYS_RATE_MASK | WM8993_SAMPLE_RATE_MASK);
1175
1176 aif1 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_1);
1177 aif1 &= ~WM8993_AIF_WL_MASK;
1178
1179 aif4 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_4);
1180 aif4 &= ~WM8993_LRCLK_RATE_MASK;
1181
1182 /* What BCLK do we need? */
1183 wm8993->fs = params_rate(params);
1184 wm8993->bclk = 2 * wm8993->fs;
1185 if (wm8993->tdm_slots) {
1186 dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n",
1187 wm8993->tdm_slots, wm8993->tdm_width);
1188 wm8993->bclk *= wm8993->tdm_width * wm8993->tdm_slots;
1189 } else {
1190 switch (params_format(params)) {
1191 case SNDRV_PCM_FORMAT_S16_LE:
1192 wm8993->bclk *= 16;
1193 break;
1194 case SNDRV_PCM_FORMAT_S20_3LE:
1195 wm8993->bclk *= 20;
1196 aif1 |= 0x8;
1197 break;
1198 case SNDRV_PCM_FORMAT_S24_LE:
1199 wm8993->bclk *= 24;
1200 aif1 |= 0x10;
1201 break;
1202 case SNDRV_PCM_FORMAT_S32_LE:
1203 wm8993->bclk *= 32;
1204 aif1 |= 0x18;
1205 break;
1206 default:
1207 return -EINVAL;
1208 }
1209 }
1210
1211 dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8993->bclk);
1212
1213 ret = configure_clock(codec);
1214 if (ret != 0)
1215 return ret;
1216
1217 /* Select nearest CLK_SYS_RATE */
1218 best = 0;
1219 best_val = abs((wm8993->sysclk_rate / clk_sys_rates[0].ratio)
1220 - wm8993->fs);
1221 for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) {
1222 cur_val = abs((wm8993->sysclk_rate /
1223 clk_sys_rates[i].ratio) - wm8993->fs);;
1224 if (cur_val < best_val) {
1225 best = i;
1226 best_val = cur_val;
1227 }
1228 }
1229 dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n",
1230 clk_sys_rates[best].ratio);
1231 clocking3 |= (clk_sys_rates[best].clk_sys_rate
1232 << WM8993_CLK_SYS_RATE_SHIFT);
1233
1234 /* SAMPLE_RATE */
1235 best = 0;
1236 best_val = abs(wm8993->fs - sample_rates[0].rate);
1237 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1238 /* Closest match */
1239 cur_val = abs(wm8993->fs - sample_rates[i].rate);
1240 if (cur_val < best_val) {
1241 best = i;
1242 best_val = cur_val;
1243 }
1244 }
1245 dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n",
1246 sample_rates[best].rate);
1247 clocking3 |= (sample_rates[best].sample_rate
1248 << WM8993_SAMPLE_RATE_SHIFT);
1249
1250 /* BCLK_DIV */
1251 best = 0;
1252 best_val = INT_MAX;
1253 for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
1254 cur_val = ((wm8993->sysclk_rate * 10) / bclk_divs[i].div)
1255 - wm8993->bclk;
1256 if (cur_val < 0) /* Table is sorted */
1257 break;
1258 if (cur_val < best_val) {
1259 best = i;
1260 best_val = cur_val;
1261 }
1262 }
1263 wm8993->bclk = (wm8993->sysclk_rate * 10) / bclk_divs[best].div;
1264 dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n",
1265 bclk_divs[best].div, wm8993->bclk);
1266 clocking1 |= bclk_divs[best].bclk_div << WM8993_BCLK_DIV_SHIFT;
1267
1268 /* LRCLK is a simple fraction of BCLK */
1269 dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8993->bclk / wm8993->fs);
1270 aif4 |= wm8993->bclk / wm8993->fs;
1271
1272 snd_soc_write(codec, WM8993_CLOCKING_1, clocking1);
1273 snd_soc_write(codec, WM8993_CLOCKING_3, clocking3);
1274 snd_soc_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1275 snd_soc_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1276
1277 /* ReTune Mobile? */
1278 if (wm8993->pdata.num_retune_configs) {
1279 u16 eq1 = snd_soc_read(codec, WM8993_EQ1);
1280 struct wm8993_retune_mobile_setting *s;
1281
1282 best = 0;
1283 best_val = abs(wm8993->pdata.retune_configs[0].rate
1284 - wm8993->fs);
1285 for (i = 0; i < wm8993->pdata.num_retune_configs; i++) {
1286 cur_val = abs(wm8993->pdata.retune_configs[i].rate
1287 - wm8993->fs);
1288 if (cur_val < best_val) {
1289 best_val = cur_val;
1290 best = i;
1291 }
1292 }
1293 s = &wm8993->pdata.retune_configs[best];
1294
1295 dev_dbg(codec->dev, "ReTune Mobile %s tuned for %dHz\n",
1296 s->name, s->rate);
1297
1298 /* Disable EQ while we reconfigure */
1299 snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, 0);
1300
1301 for (i = 1; i < ARRAY_SIZE(s->config); i++)
1302 snd_soc_write(codec, WM8993_EQ1 + i, s->config[i]);
1303
1304 snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, eq1);
1305 }
1306
1307 return 0;
1308 }
1309
1310 static int wm8993_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1311 {
1312 struct snd_soc_codec *codec = codec_dai->codec;
1313 unsigned int reg;
1314
1315 reg = snd_soc_read(codec, WM8993_DAC_CTRL);
1316
1317 if (mute)
1318 reg |= WM8993_DAC_MUTE;
1319 else
1320 reg &= ~WM8993_DAC_MUTE;
1321
1322 snd_soc_write(codec, WM8993_DAC_CTRL, reg);
1323
1324 return 0;
1325 }
1326
1327 static int wm8993_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1328 unsigned int rx_mask, int slots, int slot_width)
1329 {
1330 struct snd_soc_codec *codec = dai->codec;
1331 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1332 int aif1 = 0;
1333 int aif2 = 0;
1334
1335 /* Don't need to validate anything if we're turning off TDM */
1336 if (slots == 0) {
1337 wm8993->tdm_slots = 0;
1338 goto out;
1339 }
1340
1341 /* Note that we allow configurations we can't handle ourselves -
1342 * for example, we can generate clocks for slots 2 and up even if
1343 * we can't use those slots ourselves.
1344 */
1345 aif1 |= WM8993_AIFADC_TDM;
1346 aif2 |= WM8993_AIFDAC_TDM;
1347
1348 switch (rx_mask) {
1349 case 3:
1350 break;
1351 case 0xc:
1352 aif1 |= WM8993_AIFADC_TDM_CHAN;
1353 break;
1354 default:
1355 return -EINVAL;
1356 }
1357
1358
1359 switch (tx_mask) {
1360 case 3:
1361 break;
1362 case 0xc:
1363 aif2 |= WM8993_AIFDAC_TDM_CHAN;
1364 break;
1365 default:
1366 return -EINVAL;
1367 }
1368
1369 out:
1370 wm8993->tdm_width = slot_width;
1371 wm8993->tdm_slots = slots / 2;
1372
1373 snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_1,
1374 WM8993_AIFADC_TDM | WM8993_AIFADC_TDM_CHAN, aif1);
1375 snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_2,
1376 WM8993_AIFDAC_TDM | WM8993_AIFDAC_TDM_CHAN, aif2);
1377
1378 return 0;
1379 }
1380
1381 static struct snd_soc_dai_ops wm8993_ops = {
1382 .set_sysclk = wm8993_set_sysclk,
1383 .set_fmt = wm8993_set_dai_fmt,
1384 .hw_params = wm8993_hw_params,
1385 .digital_mute = wm8993_digital_mute,
1386 .set_pll = wm8993_set_fll,
1387 .set_tdm_slot = wm8993_set_tdm_slot,
1388 };
1389
1390 #define WM8993_RATES SNDRV_PCM_RATE_8000_48000
1391
1392 #define WM8993_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1393 SNDRV_PCM_FMTBIT_S20_3LE |\
1394 SNDRV_PCM_FMTBIT_S24_LE |\
1395 SNDRV_PCM_FMTBIT_S32_LE)
1396
1397 struct snd_soc_dai wm8993_dai = {
1398 .name = "WM8993",
1399 .playback = {
1400 .stream_name = "Playback",
1401 .channels_min = 1,
1402 .channels_max = 2,
1403 .rates = WM8993_RATES,
1404 .formats = WM8993_FORMATS,
1405 },
1406 .capture = {
1407 .stream_name = "Capture",
1408 .channels_min = 1,
1409 .channels_max = 2,
1410 .rates = WM8993_RATES,
1411 .formats = WM8993_FORMATS,
1412 },
1413 .ops = &wm8993_ops,
1414 .symmetric_rates = 1,
1415 };
1416 EXPORT_SYMBOL_GPL(wm8993_dai);
1417
1418 static struct snd_soc_codec *wm8993_codec;
1419
1420 static int wm8993_probe(struct platform_device *pdev)
1421 {
1422 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1423 struct snd_soc_codec *codec;
1424 struct wm8993_priv *wm8993;
1425 int ret = 0;
1426
1427 if (!wm8993_codec) {
1428 dev_err(&pdev->dev, "I2C device not yet probed\n");
1429 goto err;
1430 }
1431
1432 socdev->card->codec = wm8993_codec;
1433 codec = wm8993_codec;
1434 wm8993 = snd_soc_codec_get_drvdata(codec);
1435
1436 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
1437 if (ret < 0) {
1438 dev_err(codec->dev, "failed to create pcms\n");
1439 goto err;
1440 }
1441
1442 snd_soc_add_controls(codec, wm8993_snd_controls,
1443 ARRAY_SIZE(wm8993_snd_controls));
1444 if (wm8993->pdata.num_retune_configs != 0) {
1445 dev_dbg(codec->dev, "Using ReTune Mobile\n");
1446 } else {
1447 dev_dbg(codec->dev, "No ReTune Mobile, using normal EQ\n");
1448 snd_soc_add_controls(codec, wm8993_eq_controls,
1449 ARRAY_SIZE(wm8993_eq_controls));
1450 }
1451
1452 snd_soc_dapm_new_controls(codec, wm8993_dapm_widgets,
1453 ARRAY_SIZE(wm8993_dapm_widgets));
1454 wm_hubs_add_analogue_controls(codec);
1455
1456 snd_soc_dapm_add_routes(codec, routes, ARRAY_SIZE(routes));
1457 wm_hubs_add_analogue_routes(codec, wm8993->pdata.lineout1_diff,
1458 wm8993->pdata.lineout2_diff);
1459
1460 return ret;
1461
1462 err:
1463 return ret;
1464 }
1465
1466 static int wm8993_remove(struct platform_device *pdev)
1467 {
1468 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1469
1470 snd_soc_free_pcms(socdev);
1471 snd_soc_dapm_free(socdev);
1472
1473 return 0;
1474 }
1475
1476 #ifdef CONFIG_PM
1477 static int wm8993_suspend(struct platform_device *pdev, pm_message_t state)
1478 {
1479 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1480 struct snd_soc_codec *codec = socdev->card->codec;
1481 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1482 int fll_fout = wm8993->fll_fout;
1483 int fll_fref = wm8993->fll_fref;
1484 int ret;
1485
1486 /* Stop the FLL in an orderly fashion */
1487 ret = wm8993_set_fll(codec->dai, 0, 0, 0, 0);
1488 if (ret != 0) {
1489 dev_err(&pdev->dev, "Failed to stop FLL\n");
1490 return ret;
1491 }
1492
1493 wm8993->fll_fout = fll_fout;
1494 wm8993->fll_fref = fll_fref;
1495
1496 wm8993_set_bias_level(codec, SND_SOC_BIAS_OFF);
1497
1498 return 0;
1499 }
1500
1501 static int wm8993_resume(struct platform_device *pdev)
1502 {
1503 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1504 struct snd_soc_codec *codec = socdev->card->codec;
1505 struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1506 int ret;
1507
1508 wm8993_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1509
1510 /* Restart the FLL? */
1511 if (wm8993->fll_fout) {
1512 int fll_fout = wm8993->fll_fout;
1513 int fll_fref = wm8993->fll_fref;
1514
1515 wm8993->fll_fref = 0;
1516 wm8993->fll_fout = 0;
1517
1518 ret = wm8993_set_fll(codec->dai, 0, wm8993->fll_src,
1519 fll_fref, fll_fout);
1520 if (ret != 0)
1521 dev_err(codec->dev, "Failed to restart FLL\n");
1522 }
1523
1524 return 0;
1525 }
1526 #else
1527 #define wm8993_suspend NULL
1528 #define wm8993_resume NULL
1529 #endif
1530
1531 struct snd_soc_codec_device soc_codec_dev_wm8993 = {
1532 .probe = wm8993_probe,
1533 .remove = wm8993_remove,
1534 .suspend = wm8993_suspend,
1535 .resume = wm8993_resume,
1536 };
1537 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8993);
1538
1539 static int wm8993_i2c_probe(struct i2c_client *i2c,
1540 const struct i2c_device_id *id)
1541 {
1542 struct wm8993_priv *wm8993;
1543 struct snd_soc_codec *codec;
1544 unsigned int val;
1545 int ret;
1546 int i;
1547
1548 if (wm8993_codec) {
1549 dev_err(&i2c->dev, "A WM8993 is already registered\n");
1550 return -EINVAL;
1551 }
1552
1553 wm8993 = kzalloc(sizeof(struct wm8993_priv), GFP_KERNEL);
1554 if (wm8993 == NULL)
1555 return -ENOMEM;
1556
1557 codec = &wm8993->codec;
1558 if (i2c->dev.platform_data)
1559 memcpy(&wm8993->pdata, i2c->dev.platform_data,
1560 sizeof(wm8993->pdata));
1561
1562 mutex_init(&codec->mutex);
1563 INIT_LIST_HEAD(&codec->dapm_widgets);
1564 INIT_LIST_HEAD(&codec->dapm_paths);
1565
1566 codec->name = "WM8993";
1567 codec->volatile_register = wm8993_volatile;
1568 codec->reg_cache = wm8993->reg_cache;
1569 codec->reg_cache_size = ARRAY_SIZE(wm8993->reg_cache);
1570 codec->bias_level = SND_SOC_BIAS_OFF;
1571 codec->set_bias_level = wm8993_set_bias_level;
1572 codec->dai = &wm8993_dai;
1573 codec->num_dai = 1;
1574 snd_soc_codec_set_drvdata(codec, wm8993);
1575
1576 wm8993->hubs_data.hp_startup_mode = 1;
1577 wm8993->hubs_data.dcs_codes = -2;
1578
1579 memcpy(wm8993->reg_cache, wm8993_reg_defaults,
1580 sizeof(wm8993->reg_cache));
1581
1582 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1583 if (ret != 0) {
1584 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1585 goto err;
1586 }
1587
1588 i2c_set_clientdata(i2c, wm8993);
1589 codec->control_data = i2c;
1590 wm8993_codec = codec;
1591
1592 codec->dev = &i2c->dev;
1593
1594 for (i = 0; i < ARRAY_SIZE(wm8993->supplies); i++)
1595 wm8993->supplies[i].supply = wm8993_supply_names[i];
1596
1597 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8993->supplies),
1598 wm8993->supplies);
1599 if (ret != 0) {
1600 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
1601 goto err;
1602 }
1603
1604 ret = regulator_bulk_enable(ARRAY_SIZE(wm8993->supplies),
1605 wm8993->supplies);
1606 if (ret != 0) {
1607 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
1608 goto err_get;
1609 }
1610
1611 val = snd_soc_read(codec, WM8993_SOFTWARE_RESET);
1612 if (val != wm8993_reg_defaults[WM8993_SOFTWARE_RESET]) {
1613 dev_err(codec->dev, "Invalid ID register value %x\n", val);
1614 ret = -EINVAL;
1615 goto err_enable;
1616 }
1617
1618 ret = snd_soc_write(codec, WM8993_SOFTWARE_RESET, 0xffff);
1619 if (ret != 0)
1620 goto err_enable;
1621
1622 codec->cache_only = 1;
1623
1624 /* By default we're using the output mixers */
1625 wm8993->class_w_users = 2;
1626
1627 /* Latch volume update bits and default ZC on */
1628 snd_soc_update_bits(codec, WM8993_RIGHT_DAC_DIGITAL_VOLUME,
1629 WM8993_DAC_VU, WM8993_DAC_VU);
1630 snd_soc_update_bits(codec, WM8993_RIGHT_ADC_DIGITAL_VOLUME,
1631 WM8993_ADC_VU, WM8993_ADC_VU);
1632
1633 /* Manualy manage the HPOUT sequencing for independent stereo
1634 * control. */
1635 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
1636 WM8993_HPOUT1_AUTO_PU, 0);
1637
1638 /* Use automatic clock configuration */
1639 snd_soc_update_bits(codec, WM8993_CLOCKING_4, WM8993_SR_MODE, 0);
1640
1641 wm_hubs_handle_analogue_pdata(codec, wm8993->pdata.lineout1_diff,
1642 wm8993->pdata.lineout2_diff,
1643 wm8993->pdata.lineout1fb,
1644 wm8993->pdata.lineout2fb,
1645 wm8993->pdata.jd_scthr,
1646 wm8993->pdata.jd_thr,
1647 wm8993->pdata.micbias1_lvl,
1648 wm8993->pdata.micbias2_lvl);
1649
1650 ret = wm8993_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1651 if (ret != 0)
1652 goto err_enable;
1653
1654 wm8993_dai.dev = codec->dev;
1655
1656 ret = snd_soc_register_dai(&wm8993_dai);
1657 if (ret != 0)
1658 goto err_bias;
1659
1660 ret = snd_soc_register_codec(codec);
1661
1662 return 0;
1663
1664 err_bias:
1665 wm8993_set_bias_level(codec, SND_SOC_BIAS_OFF);
1666 err_enable:
1667 regulator_bulk_disable(ARRAY_SIZE(wm8993->supplies), wm8993->supplies);
1668 err_get:
1669 regulator_bulk_free(ARRAY_SIZE(wm8993->supplies), wm8993->supplies);
1670 err:
1671 wm8993_codec = NULL;
1672 kfree(wm8993);
1673 return ret;
1674 }
1675
1676 static int wm8993_i2c_remove(struct i2c_client *client)
1677 {
1678 struct wm8993_priv *wm8993 = i2c_get_clientdata(client);
1679
1680 snd_soc_unregister_codec(&wm8993->codec);
1681 snd_soc_unregister_dai(&wm8993_dai);
1682
1683 wm8993_set_bias_level(&wm8993->codec, SND_SOC_BIAS_OFF);
1684 regulator_bulk_free(ARRAY_SIZE(wm8993->supplies), wm8993->supplies);
1685 kfree(wm8993);
1686
1687 return 0;
1688 }
1689
1690 static const struct i2c_device_id wm8993_i2c_id[] = {
1691 { "wm8993", 0 },
1692 { }
1693 };
1694 MODULE_DEVICE_TABLE(i2c, wm8993_i2c_id);
1695
1696 static struct i2c_driver wm8993_i2c_driver = {
1697 .driver = {
1698 .name = "WM8993",
1699 .owner = THIS_MODULE,
1700 },
1701 .probe = wm8993_i2c_probe,
1702 .remove = wm8993_i2c_remove,
1703 .id_table = wm8993_i2c_id,
1704 };
1705
1706
1707 static int __init wm8993_modinit(void)
1708 {
1709 int ret;
1710
1711 ret = i2c_add_driver(&wm8993_i2c_driver);
1712 if (ret != 0)
1713 pr_err("WM8993: Unable to register I2C driver: %d\n", ret);
1714
1715 return ret;
1716 }
1717 module_init(wm8993_modinit);
1718
1719 static void __exit wm8993_exit(void)
1720 {
1721 i2c_del_driver(&wm8993_i2c_driver);
1722 }
1723 module_exit(wm8993_exit);
1724
1725
1726 MODULE_DESCRIPTION("ASoC WM8993 driver");
1727 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1728 MODULE_LICENSE("GPL");
Linux with added FPC-III support