arch/arm/mach-mx3/armadillo5x0.c

   1 /*
   2  * armadillo5x0.c
   3  *
   4  * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
   5  * updates in http://alberdroid.blogspot.com/
   6  *
   7  * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
   8  * Based on mx31ads.c and pcm037.c Great Work!
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  23  * MA 02110-1301, USA.
  24  */
  25
  26 #include <linux/types.h>
  27 #include <linux/init.h>
  28 #include <linux/clk.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/gpio.h>
  31 #include <linux/smsc911x.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/irq.h>
  34 #include <linux/mtd/physmap.h>
  35 #include <linux/io.h>
  36
  37 #include <mach/hardware.h>
  38 #include <asm/mach-types.h>
  39 #include <asm/mach/arch.h>
  40 #include <asm/mach/time.h>
  41 #include <asm/memory.h>
  42 #include <asm/mach/map.h>
  43
  44 #include <mach/common.h>
  45 #include <mach/imx-uart.h>
  46 #include <mach/iomux-mx3.h>
  47 #include <mach/board-armadillo5x0.h>
  48 #include <mach/mmc.h>
  49 #include <mach/ipu.h>
  50 #include <mach/mx3fb.h>
  51 #include <mach/mxc_nand.h>
  52
  53 #include "devices.h"
  54 #include "crm_regs.h"
  55
  56 static int armadillo5x0_pins[] = {
  57         /* UART1 */
  58         MX31_PIN_CTS1__CTS1,
  59         MX31_PIN_RTS1__RTS1,
  60         MX31_PIN_TXD1__TXD1,
  61         MX31_PIN_RXD1__RXD1,
  62         /* UART2 */
  63         MX31_PIN_CTS2__CTS2,
  64         MX31_PIN_RTS2__RTS2,
  65         MX31_PIN_TXD2__TXD2,
  66         MX31_PIN_RXD2__RXD2,
  67         /* LAN9118_IRQ */
  68         IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
  69         /* SDHC1 */
  70         MX31_PIN_SD1_DATA3__SD1_DATA3,
  71         MX31_PIN_SD1_DATA2__SD1_DATA2,
  72         MX31_PIN_SD1_DATA1__SD1_DATA1,
  73         MX31_PIN_SD1_DATA0__SD1_DATA0,
  74         MX31_PIN_SD1_CLK__SD1_CLK,
  75         MX31_PIN_SD1_CMD__SD1_CMD,
  76         /* Framebuffer */
  77         MX31_PIN_LD0__LD0,
  78         MX31_PIN_LD1__LD1,
  79         MX31_PIN_LD2__LD2,
  80         MX31_PIN_LD3__LD3,
  81         MX31_PIN_LD4__LD4,
  82         MX31_PIN_LD5__LD5,
  83         MX31_PIN_LD6__LD6,
  84         MX31_PIN_LD7__LD7,
  85         MX31_PIN_LD8__LD8,
  86         MX31_PIN_LD9__LD9,
  87         MX31_PIN_LD10__LD10,
  88         MX31_PIN_LD11__LD11,
  89         MX31_PIN_LD12__LD12,
  90         MX31_PIN_LD13__LD13,
  91         MX31_PIN_LD14__LD14,
  92         MX31_PIN_LD15__LD15,
  93         MX31_PIN_LD16__LD16,
  94         MX31_PIN_LD17__LD17,
  95         MX31_PIN_VSYNC3__VSYNC3,
  96         MX31_PIN_HSYNC__HSYNC,
  97         MX31_PIN_FPSHIFT__FPSHIFT,
  98         MX31_PIN_DRDY0__DRDY0,
  99         IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
 100 };
 101
 102 /*
 103  * NAND Flash
 104  */
 105 static struct mxc_nand_platform_data armadillo5x0_nand_flash_pdata = {
 106         .width          = 1,
 107         .hw_ecc         = 1,
 108 };
 109
 110 /*
 111  * MTD NOR Flash
 112  */
 113 static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
 114         {
 115                 .name           = "nor.bootloader",
 116                 .offset         = 0x00000000,
 117                 .size           = 4*32*1024,
 118         }, {
 119                 .name           = "nor.kernel",
 120                 .offset         = MTDPART_OFS_APPEND,
 121                 .size           = 16*128*1024,
 122         }, {
 123                 .name           = "nor.userland",
 124                 .offset         = MTDPART_OFS_APPEND,
 125                 .size           = 110*128*1024,
 126         }, {
 127                 .name           = "nor.config",
 128                 .offset         = MTDPART_OFS_APPEND,
 129                 .size           = 1*128*1024,
 130         },
 131 };
 132
 133 static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
 134         .width          = 2,
 135         .parts          = armadillo5x0_nor_flash_partitions,
 136         .nr_parts       = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
 137 };
 138
 139 static struct resource armadillo5x0_nor_flash_resource = {
 140         .flags          = IORESOURCE_MEM,
 141         .start          = CS0_BASE_ADDR,
 142         .end            = CS0_BASE_ADDR + SZ_64M - 1,
 143 };
 144
 145 static struct platform_device armadillo5x0_nor_flash = {
 146         .name                   = "physmap-flash",
 147         .id                     = -1,
 148         .num_resources          = 1,
 149         .resource               = &armadillo5x0_nor_flash_resource,
 150 };
 151
 152 /*
 153  * FB support
 154  */
 155 static const struct fb_videomode fb_modedb[] = {
 156         {       /* 640x480 @ 60 Hz */
 157                 .name           = "CRT-VGA",
 158                 .refresh        = 60,
 159                 .xres           = 640,
 160                 .yres           = 480,
 161                 .pixclock       = 39721,
 162                 .left_margin    = 35,
 163                 .right_margin   = 115,
 164                 .upper_margin   = 43,
 165                 .lower_margin   = 1,
 166                 .hsync_len      = 10,
 167                 .vsync_len      = 1,
 168                 .sync           = FB_SYNC_OE_ACT_HIGH,
 169                 .vmode          = FB_VMODE_NONINTERLACED,
 170                 .flag           = 0,
 171         }, {/* 800x600 @ 56 Hz */
 172                 .name           = "CRT-SVGA",
 173                 .refresh        = 56,
 174                 .xres           = 800,
 175                 .yres           = 600,
 176                 .pixclock       = 30000,
 177                 .left_margin    = 30,
 178                 .right_margin   = 108,
 179                 .upper_margin   = 13,
 180                 .lower_margin   = 10,
 181                 .hsync_len      = 10,
 182                 .vsync_len      = 1,
 183                 .sync           = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
 184                                   FB_SYNC_VERT_HIGH_ACT,
 185                 .vmode          = FB_VMODE_NONINTERLACED,
 186                 .flag           = 0,
 187         },
 188 };
 189
 190 static struct ipu_platform_data mx3_ipu_data = {
 191         .irq_base = MXC_IPU_IRQ_START,
 192 };
 193
 194 static struct mx3fb_platform_data mx3fb_pdata = {
 195         .dma_dev        = &mx3_ipu.dev,
 196         .name           = "CRT-VGA",
 197         .mode           = fb_modedb,
 198         .num_modes      = ARRAY_SIZE(fb_modedb),
 199 };
 200
 201 /*
 202  * SDHC 1
 203  * MMC support
 204  */
 205 static int armadillo5x0_sdhc1_get_ro(struct device *dev)
 206 {
 207         return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
 208 }
 209
 210 static int armadillo5x0_sdhc1_init(struct device *dev,
 211                                    irq_handler_t detect_irq, void *data)
 212 {
 213         int ret;
 214         int gpio_det, gpio_wp;
 215
 216         gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
 217         gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
 218
 219         ret = gpio_request(gpio_det, "sdhc-card-detect");
 220         if (ret)
 221                 return ret;
 222
 223         gpio_direction_input(gpio_det);
 224
 225         ret = gpio_request(gpio_wp, "sdhc-write-protect");
 226         if (ret)
 227                 goto err_gpio_free;
 228
 229         gpio_direction_input(gpio_wp);
 230
 231         /* When supported the trigger type have to be BOTH */
 232         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
 233                           IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 234                           "sdhc-detect", data);
 235
 236         if (ret)
 237                 goto err_gpio_free_2;
 238
 239         return 0;
 240
 241 err_gpio_free_2:
 242         gpio_free(gpio_wp);
 243
 244 err_gpio_free:
 245         gpio_free(gpio_det);
 246
 247         return ret;
 248
 249 }
 250
 251 static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
 252 {
 253         free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
 254         gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
 255         gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
 256 }
 257
 258 static struct imxmmc_platform_data sdhc_pdata = {
 259         .get_ro = armadillo5x0_sdhc1_get_ro,
 260         .init = armadillo5x0_sdhc1_init,
 261         .exit = armadillo5x0_sdhc1_exit,
 262 };
 263
 264 /*
 265  * SMSC 9118
 266  * Network support
 267  */
 268 static struct resource armadillo5x0_smc911x_resources[] = {
 269         {
 270                 .start  = CS3_BASE_ADDR,
 271                 .end    = CS3_BASE_ADDR + SZ_32M - 1,
 272                 .flags  = IORESOURCE_MEM,
 273         }, {
 274                 .start  = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
 275                 .end    = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
 276                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 277         },
 278 };
 279
 280 static struct smsc911x_platform_config smsc911x_info = {
 281         .flags          = SMSC911X_USE_32BIT,
 282         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 283         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 284 };
 285
 286 static struct platform_device armadillo5x0_smc911x_device = {
 287         .name           = "smsc911x",
 288         .id             = -1,
 289         .num_resources  = ARRAY_SIZE(armadillo5x0_smc911x_resources),
 290         .resource       = armadillo5x0_smc911x_resources,
 291         .dev            = {
 292                 .platform_data = &smsc911x_info,
 293         },
 294 };
 295
 296 /* UART device data */
 297 static struct imxuart_platform_data uart_pdata = {
 298         .flags = IMXUART_HAVE_RTSCTS,
 299 };
 300
 301 static struct platform_device *devices[] __initdata = {
 302         &armadillo5x0_smc911x_device,
 303 };
 304
 305 /*
 306  * Perform board specific initializations
 307  */
 308 static void __init armadillo5x0_init(void)
 309 {
 310         mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
 311                         ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
 312
 313         platform_add_devices(devices, ARRAY_SIZE(devices));
 314
 315         /* Register UART */
 316         mxc_register_device(&mxc_uart_device0, &uart_pdata);
 317         mxc_register_device(&mxc_uart_device1, &uart_pdata);
 318
 319         /* SMSC9118 IRQ pin */
 320         gpio_direction_input(MX31_PIN_GPIO1_0);
 321
 322         /* Register SDHC */
 323         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
 324
 325         /* Register FB */
 326         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
 327         mxc_register_device(&mx3_fb, &mx3fb_pdata);
 328
 329         /* Register NOR Flash */
 330         mxc_register_device(&armadillo5x0_nor_flash,
 331                             &armadillo5x0_nor_flash_pdata);
 332
 333         /* Register NAND Flash */
 334         mxc_register_device(&mxc_nand_device, &armadillo5x0_nand_flash_pdata);
 335
 336         /* set NAND page size to 2k if not configured via boot mode pins */
 337         __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
 338 }
 339
 340 static void __init armadillo5x0_timer_init(void)
 341 {
 342         mx31_clocks_init(26000000);
 343 }
 344
 345 static struct sys_timer armadillo5x0_timer = {
 346         .init   = armadillo5x0_timer_init,
 347 };
 348
 349 MACHINE_START(ARMADILLO5X0, "Armadillo-500")
 350         /* Maintainer: Alberto Panizzo  */
 351         .phys_io        = AIPS1_BASE_ADDR,
 352         .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
 353         .boot_params    = PHYS_OFFSET + 0x00000100,
 354         .map_io         = mx31_map_io,
 355         .init_irq       = mxc_init_irq,
 356         .timer          = &armadillo5x0_timer,
 357         .init_machine   = armadillo5x0_init,
 358 MACHINE_END