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wl1251: use wiphy_dev instead of wl->spi->dev
[linux/fpc-iii.git] / arch / arm / mach-mx3 / pcm037.c
blob840cfda341d08c883489cc537d5ed851e93bd58d
1 /*
2 * Copyright (C) 2008 Sascha Hauer, Pengutronix
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19 #include <linux/types.h>
20 #include <linux/init.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/platform_device.h>
23 #include <linux/mtd/physmap.h>
24 #include <linux/mtd/plat-ram.h>
25 #include <linux/memory.h>
26 #include <linux/gpio.h>
27 #include <linux/smsc911x.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c/at24.h>
31 #include <linux/delay.h>
32 #include <linux/spi/spi.h>
33 #include <linux/irq.h>
34 #include <linux/fsl_devices.h>
35
36 #include <media/soc_camera.h>
37
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/time.h>
41 #include <asm/mach/map.h>
42 #include <mach/board-pcm037.h>
43 #include <mach/common.h>
44 #include <mach/hardware.h>
45 #include <mach/i2c.h>
46 #include <mach/imx-uart.h>
47 #include <mach/iomux-mx3.h>
48 #include <mach/ipu.h>
49 #include <mach/mmc.h>
50 #include <mach/mx3_camera.h>
51 #include <mach/mx3fb.h>
52 #include <mach/mxc_nand.h>
53
54 #include "devices.h"
55 #include "pcm037.h"
56
57 static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
58
59 static int __init pcm037_variant_setup(char *str)
60 {
61 if (!strcmp("eet", str))
62 pcm037_instance = PCM037_EET;
63 else if (strcmp("pcm970", str))
64 pr_warning("Unknown pcm037 baseboard variant %s\n", str);
65
66 return 1;
67 }
68
69 /* Supported values: "pcm970" (default) and "eet" */
70 __setup("pcm037_variant=", pcm037_variant_setup);
71
72 enum pcm037_board_variant pcm037_variant(void)
73 {
74 return pcm037_instance;
75 }
76
77 /* UART1 with RTS/CTS handshake signals */
78 static unsigned int pcm037_uart1_handshake_pins[] = {
79 MX31_PIN_CTS1__CTS1,
80 MX31_PIN_RTS1__RTS1,
81 MX31_PIN_TXD1__TXD1,
82 MX31_PIN_RXD1__RXD1,
83 };
84
85 /* UART1 without RTS/CTS handshake signals */
86 static unsigned int pcm037_uart1_pins[] = {
87 MX31_PIN_TXD1__TXD1,
88 MX31_PIN_RXD1__RXD1,
89 };
90
91 static unsigned int pcm037_pins[] = {
92 /* I2C */
93 MX31_PIN_CSPI2_MOSI__SCL,
94 MX31_PIN_CSPI2_MISO__SDA,
95 MX31_PIN_CSPI2_SS2__I2C3_SDA,
96 MX31_PIN_CSPI2_SCLK__I2C3_SCL,
97 /* SDHC1 */
98 MX31_PIN_SD1_DATA3__SD1_DATA3,
99 MX31_PIN_SD1_DATA2__SD1_DATA2,
100 MX31_PIN_SD1_DATA1__SD1_DATA1,
101 MX31_PIN_SD1_DATA0__SD1_DATA0,
102 MX31_PIN_SD1_CLK__SD1_CLK,
103 MX31_PIN_SD1_CMD__SD1_CMD,
104 IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
105 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
106 /* SPI1 */
107 MX31_PIN_CSPI1_MOSI__MOSI,
108 MX31_PIN_CSPI1_MISO__MISO,
109 MX31_PIN_CSPI1_SCLK__SCLK,
110 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
111 MX31_PIN_CSPI1_SS0__SS0,
112 MX31_PIN_CSPI1_SS1__SS1,
113 MX31_PIN_CSPI1_SS2__SS2,
114 /* UART2 */
115 MX31_PIN_TXD2__TXD2,
116 MX31_PIN_RXD2__RXD2,
117 MX31_PIN_CTS2__CTS2,
118 MX31_PIN_RTS2__RTS2,
119 /* UART3 */
120 MX31_PIN_CSPI3_MOSI__RXD3,
121 MX31_PIN_CSPI3_MISO__TXD3,
122 MX31_PIN_CSPI3_SCLK__RTS3,
123 MX31_PIN_CSPI3_SPI_RDY__CTS3,
124 /* LAN9217 irq pin */
125 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
126 /* Onewire */
127 MX31_PIN_BATT_LINE__OWIRE,
128 /* Framebuffer */
129 MX31_PIN_LD0__LD0,
130 MX31_PIN_LD1__LD1,
131 MX31_PIN_LD2__LD2,
132 MX31_PIN_LD3__LD3,
133 MX31_PIN_LD4__LD4,
134 MX31_PIN_LD5__LD5,
135 MX31_PIN_LD6__LD6,
136 MX31_PIN_LD7__LD7,
137 MX31_PIN_LD8__LD8,
138 MX31_PIN_LD9__LD9,
139 MX31_PIN_LD10__LD10,
140 MX31_PIN_LD11__LD11,
141 MX31_PIN_LD12__LD12,
142 MX31_PIN_LD13__LD13,
143 MX31_PIN_LD14__LD14,
144 MX31_PIN_LD15__LD15,
145 MX31_PIN_LD16__LD16,
146 MX31_PIN_LD17__LD17,
147 MX31_PIN_VSYNC3__VSYNC3,
148 MX31_PIN_HSYNC__HSYNC,
149 MX31_PIN_FPSHIFT__FPSHIFT,
150 MX31_PIN_DRDY0__DRDY0,
151 MX31_PIN_D3_REV__D3_REV,
152 MX31_PIN_CONTRAST__CONTRAST,
153 MX31_PIN_D3_SPL__D3_SPL,
154 MX31_PIN_D3_CLS__D3_CLS,
155 MX31_PIN_LCS0__GPI03_23,
156 /* CSI */
157 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO),
158 MX31_PIN_CSI_D6__CSI_D6,
159 MX31_PIN_CSI_D7__CSI_D7,
160 MX31_PIN_CSI_D8__CSI_D8,
161 MX31_PIN_CSI_D9__CSI_D9,
162 MX31_PIN_CSI_D10__CSI_D10,
163 MX31_PIN_CSI_D11__CSI_D11,
164 MX31_PIN_CSI_D12__CSI_D12,
165 MX31_PIN_CSI_D13__CSI_D13,
166 MX31_PIN_CSI_D14__CSI_D14,
167 MX31_PIN_CSI_D15__CSI_D15,
168 MX31_PIN_CSI_HSYNC__CSI_HSYNC,
169 MX31_PIN_CSI_MCLK__CSI_MCLK,
170 MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
171 MX31_PIN_CSI_VSYNC__CSI_VSYNC,
172 };
173
174 static struct physmap_flash_data pcm037_flash_data = {
175 .width = 2,
176 };
177
178 static struct resource pcm037_flash_resource = {
179 .start = 0xa0000000,
180 .end = 0xa1ffffff,
181 .flags = IORESOURCE_MEM,
182 };
183
184 static int usbotg_pins[] = {
185 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
186 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
187 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
188 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
189 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
190 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
191 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
192 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
193 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
194 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
195 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
196 MX31_PIN_USBOTG_STP__USBOTG_STP,
197 };
198
199 /* USB OTG HS port */
200 static int __init gpio_usbotg_hs_activate(void)
201 {
202 int ret = mxc_iomux_setup_multiple_pins(usbotg_pins,
203 ARRAY_SIZE(usbotg_pins), "usbotg");
204
205 if (ret < 0) {
206 printk(KERN_ERR "Cannot set up OTG pins\n");
207 return ret;
208 }
209
210 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
211 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
212 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
213 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
214 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
215 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
216 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
217 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
218 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
219 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
220 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
221 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST);
222
223 return 0;
224 }
225
226 /* OTG config */
227 static struct fsl_usb2_platform_data usb_pdata = {
228 .operating_mode = FSL_USB2_DR_DEVICE,
229 .phy_mode = FSL_USB2_PHY_ULPI,
230 };
231
232 static struct platform_device pcm037_flash = {
233 .name = "physmap-flash",
234 .id = 0,
235 .dev = {
236 .platform_data = &pcm037_flash_data,
237 },
238 .resource = &pcm037_flash_resource,
239 .num_resources = 1,
240 };
241
242 static struct imxuart_platform_data uart_pdata = {
243 .flags = IMXUART_HAVE_RTSCTS,
244 };
245
246 static struct resource smsc911x_resources[] = {
247 [0] = {
248 .start = CS1_BASE_ADDR + 0x300,
249 .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
250 .flags = IORESOURCE_MEM,
251 },
252 [1] = {
253 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
254 .end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
255 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
256 },
257 };
258
259 static struct smsc911x_platform_config smsc911x_info = {
260 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
261 SMSC911X_SAVE_MAC_ADDRESS,
262 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
263 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
264 .phy_interface = PHY_INTERFACE_MODE_MII,
265 };
266
267 static struct platform_device pcm037_eth = {
268 .name = "smsc911x",
269 .id = -1,
270 .num_resources = ARRAY_SIZE(smsc911x_resources),
271 .resource = smsc911x_resources,
272 .dev = {
273 .platform_data = &smsc911x_info,
274 },
275 };
276
277 static struct platdata_mtd_ram pcm038_sram_data = {
278 .bankwidth = 2,
279 };
280
281 static struct resource pcm038_sram_resource = {
282 .start = CS4_BASE_ADDR,
283 .end = CS4_BASE_ADDR + 512 * 1024 - 1,
284 .flags = IORESOURCE_MEM,
285 };
286
287 static struct platform_device pcm037_sram_device = {
288 .name = "mtd-ram",
289 .id = 0,
290 .dev = {
291 .platform_data = &pcm038_sram_data,
292 },
293 .num_resources = 1,
294 .resource = &pcm038_sram_resource,
295 };
296
297 static struct mxc_nand_platform_data pcm037_nand_board_info = {
298 .width = 1,
299 .hw_ecc = 1,
300 };
301
302 static struct imxi2c_platform_data pcm037_i2c_1_data = {
303 .bitrate = 100000,
304 };
305
306 static struct imxi2c_platform_data pcm037_i2c_2_data = {
307 .bitrate = 20000,
308 };
309
310 static struct at24_platform_data board_eeprom = {
311 .byte_len = 4096,
312 .page_size = 32,
313 .flags = AT24_FLAG_ADDR16,
314 };
315
316 static int pcm037_camera_power(struct device *dev, int on)
317 {
318 /* disable or enable the camera in X7 or X8 PCM970 connector */
319 gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), !on);
320 return 0;
321 }
322
323 static struct i2c_board_info pcm037_i2c_2_devices[] = {
324 {
325 I2C_BOARD_INFO("mt9t031", 0x5d),
326 },
327 };
328
329 static struct soc_camera_link iclink = {
330 .bus_id = 0, /* Must match with the camera ID */
331 .power = pcm037_camera_power,
332 .board_info = &pcm037_i2c_2_devices[0],
333 .i2c_adapter_id = 2,
334 .module_name = "mt9t031",
335 };
336
337 static struct i2c_board_info pcm037_i2c_devices[] = {
338 {
339 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
340 .platform_data = &board_eeprom,
341 }, {
342 I2C_BOARD_INFO("rtc-pcf8563", 0x51),
343 .type = "pcf8563",
344 }
345 };
346
347 static struct platform_device pcm037_camera = {
348 .name = "soc-camera-pdrv",
349 .id = 0,
350 .dev = {
351 .platform_data = &iclink,
352 },
353 };
354
355 /* Not connected by default */
356 #ifdef PCM970_SDHC_RW_SWITCH
357 static int pcm970_sdhc1_get_ro(struct device *dev)
358 {
359 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
360 }
361 #endif
362
363 #define SDHC1_GPIO_WP IOMUX_TO_GPIO(MX31_PIN_SFS6)
364 #define SDHC1_GPIO_DET IOMUX_TO_GPIO(MX31_PIN_SCK6)
365
366 static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
367 void *data)
368 {
369 int ret;
370
371 ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
372 if (ret)
373 return ret;
374
375 gpio_direction_input(SDHC1_GPIO_DET);
376
377 #ifdef PCM970_SDHC_RW_SWITCH
378 ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
379 if (ret)
380 goto err_gpio_free;
381 gpio_direction_input(SDHC1_GPIO_WP);
382 #endif
383
384 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
385 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
386 "sdhc-detect", data);
387 if (ret)
388 goto err_gpio_free_2;
389
390 return 0;
391
392 err_gpio_free_2:
393 #ifdef PCM970_SDHC_RW_SWITCH
394 gpio_free(SDHC1_GPIO_WP);
395 err_gpio_free:
396 #endif
397 gpio_free(SDHC1_GPIO_DET);
398
399 return ret;
400 }
401
402 static void pcm970_sdhc1_exit(struct device *dev, void *data)
403 {
404 free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
405 gpio_free(SDHC1_GPIO_DET);
406 gpio_free(SDHC1_GPIO_WP);
407 }
408
409 static struct imxmmc_platform_data sdhc_pdata = {
410 #ifdef PCM970_SDHC_RW_SWITCH
411 .get_ro = pcm970_sdhc1_get_ro,
412 #endif
413 .init = pcm970_sdhc1_init,
414 .exit = pcm970_sdhc1_exit,
415 };
416
417 struct mx3_camera_pdata camera_pdata = {
418 .dma_dev = &mx3_ipu.dev,
419 .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
420 .mclk_10khz = 2000,
421 };
422
423 static int __init pcm037_camera_alloc_dma(const size_t buf_size)
424 {
425 dma_addr_t dma_handle;
426 void *buf;
427 int dma;
428
429 if (buf_size < 2 * 1024 * 1024)
430 return -EINVAL;
431
432 buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
433 if (!buf) {
434 pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
435 return -ENOMEM;
436 }
437
438 memset(buf, 0, buf_size);
439
440 dma = dma_declare_coherent_memory(&mx3_camera.dev,
441 dma_handle, dma_handle, buf_size,
442 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
443
444 /* The way we call dma_declare_coherent_memory only a malloc can fail */
445 return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
446 }
447
448 static struct platform_device *devices[] __initdata = {
449 &pcm037_flash,
450 &pcm037_sram_device,
451 &pcm037_camera,
452 };
453
454 static struct ipu_platform_data mx3_ipu_data = {
455 .irq_base = MXC_IPU_IRQ_START,
456 };
457
458 static const struct fb_videomode fb_modedb[] = {
459 {
460 /* 240x320 @ 60 Hz Sharp */
461 .name = "Sharp-LQ035Q7DH06-QVGA",
462 .refresh = 60,
463 .xres = 240,
464 .yres = 320,
465 .pixclock = 185925,
466 .left_margin = 9,
467 .right_margin = 16,
468 .upper_margin = 7,
469 .lower_margin = 9,
470 .hsync_len = 1,
471 .vsync_len = 1,
472 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
473 FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
474 .vmode = FB_VMODE_NONINTERLACED,
475 .flag = 0,
476 }, {
477 /* 240x320 @ 60 Hz */
478 .name = "TX090",
479 .refresh = 60,
480 .xres = 240,
481 .yres = 320,
482 .pixclock = 38255,
483 .left_margin = 144,
484 .right_margin = 0,
485 .upper_margin = 7,
486 .lower_margin = 40,
487 .hsync_len = 96,
488 .vsync_len = 1,
489 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
490 .vmode = FB_VMODE_NONINTERLACED,
491 .flag = 0,
492 }, {
493 /* 240x320 @ 60 Hz */
494 .name = "CMEL-OLED",
495 .refresh = 60,
496 .xres = 240,
497 .yres = 320,
498 .pixclock = 185925,
499 .left_margin = 9,
500 .right_margin = 16,
501 .upper_margin = 7,
502 .lower_margin = 9,
503 .hsync_len = 1,
504 .vsync_len = 1,
505 .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
506 .vmode = FB_VMODE_NONINTERLACED,
507 .flag = 0,
508 },
509 };
510
511 static struct mx3fb_platform_data mx3fb_pdata = {
512 .dma_dev = &mx3_ipu.dev,
513 .name = "Sharp-LQ035Q7DH06-QVGA",
514 .mode = fb_modedb,
515 .num_modes = ARRAY_SIZE(fb_modedb),
516 };
517
518 /*
519 * Board specific initialization.
520 */
521 static void __init mxc_board_init(void)
522 {
523 int ret;
524
525 mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
526 "pcm037");
527
528 if (pcm037_variant() == PCM037_EET)
529 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
530 ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
531 else
532 mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
533 ARRAY_SIZE(pcm037_uart1_handshake_pins),
534 "pcm037_uart1");
535
536 platform_add_devices(devices, ARRAY_SIZE(devices));
537
538 mxc_register_device(&mxc_uart_device0, &uart_pdata);
539 mxc_register_device(&mxc_uart_device1, &uart_pdata);
540 mxc_register_device(&mxc_uart_device2, &uart_pdata);
541
542 mxc_register_device(&mxc_w1_master_device, NULL);
543
544 /* LAN9217 IRQ pin */
545 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
546 if (ret)
547 pr_warning("could not get LAN irq gpio\n");
548 else {
549 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
550 platform_device_register(&pcm037_eth);
551 }
552
553
554 /* I2C adapters and devices */
555 i2c_register_board_info(1, pcm037_i2c_devices,
556 ARRAY_SIZE(pcm037_i2c_devices));
557
558 mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data);
559 mxc_register_device(&mxc_i2c_device2, &pcm037_i2c_2_data);
560
561 mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
562 mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
563 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
564 mxc_register_device(&mx3_fb, &mx3fb_pdata);
565 if (!gpio_usbotg_hs_activate())
566 mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
567
568 /* CSI */
569 /* Camera power: default - off */
570 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
571 if (!ret)
572 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
573 else
574 iclink.power = NULL;
575
576 if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
577 mxc_register_device(&mx3_camera, &camera_pdata);
578 }
579
580 static void __init pcm037_timer_init(void)
581 {
582 mx31_clocks_init(26000000);
583 }
584
585 struct sys_timer pcm037_timer = {
586 .init = pcm037_timer_init,
587 };
588
589 MACHINE_START(PCM037, "Phytec Phycore pcm037")
590 /* Maintainer: Pengutronix */
591 .phys_io = AIPS1_BASE_ADDR,
592 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
593 .boot_params = PHYS_OFFSET + 0x100,
594 .map_io = mx31_map_io,
595 .init_irq = mxc_init_irq,
596 .init_machine = mxc_board_init,
597 .timer = &pcm037_timer,
598 MACHINE_END
Linux with added FPC-III support