2 * Mailbox reservation modules for OMAP2/3
4 * Copyright (C) 2006-2009 Nokia Corporation
5 * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/kernel.h>
14 #include <linux/clk.h>
15 #include <linux/err.h>
16 #include <linux/platform_device.h>
18 #include <mach/mailbox.h>
19 #include <mach/irqs.h>
21 #define MAILBOX_REVISION 0x000
22 #define MAILBOX_SYSCONFIG 0x010
23 #define MAILBOX_SYSSTATUS 0x014
24 #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
25 #define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
26 #define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
27 #define MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
28 #define MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
30 #define MAILBOX_IRQ_NEWMSG(u) (1 << (2 * (u)))
31 #define MAILBOX_IRQ_NOTFULL(u) (1 << (2 * (u) + 1))
33 #define MBOX_REG_SIZE 0x120
34 #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
36 static void __iomem
*mbox_base
;
38 struct omap_mbox2_fifo
{
40 unsigned long fifo_stat
;
41 unsigned long msg_stat
;
44 struct omap_mbox2_priv
{
45 struct omap_mbox2_fifo tx_fifo
;
46 struct omap_mbox2_fifo rx_fifo
;
47 unsigned long irqenable
;
48 unsigned long irqstatus
;
51 u32 ctx
[MBOX_NR_REGS
];
54 static struct clk
*mbox_ick_handle
;
56 static void omap2_mbox_enable_irq(struct omap_mbox
*mbox
,
57 omap_mbox_type_t irq
);
59 static inline unsigned int mbox_read_reg(size_t ofs
)
61 return __raw_readl(mbox_base
+ ofs
);
64 static inline void mbox_write_reg(u32 val
, size_t ofs
)
66 __raw_writel(val
, mbox_base
+ ofs
);
69 /* Mailbox H/W preparations */
70 static int omap2_mbox_startup(struct omap_mbox
*mbox
)
74 mbox_ick_handle
= clk_get(NULL
, "mailboxes_ick");
75 if (IS_ERR(mbox_ick_handle
)) {
76 printk("Could not get mailboxes_ick\n");
79 clk_enable(mbox_ick_handle
);
81 l
= mbox_read_reg(MAILBOX_REVISION
);
82 pr_info("omap mailbox rev %d.%d\n", (l
& 0xf0) >> 4, (l
& 0x0f));
84 /* set smart-idle & autoidle */
85 l
= mbox_read_reg(MAILBOX_SYSCONFIG
);
87 mbox_write_reg(l
, MAILBOX_SYSCONFIG
);
89 omap2_mbox_enable_irq(mbox
, IRQ_RX
);
94 static void omap2_mbox_shutdown(struct omap_mbox
*mbox
)
96 clk_disable(mbox_ick_handle
);
97 clk_put(mbox_ick_handle
);
100 /* Mailbox FIFO handle functions */
101 static mbox_msg_t
omap2_mbox_fifo_read(struct omap_mbox
*mbox
)
103 struct omap_mbox2_fifo
*fifo
=
104 &((struct omap_mbox2_priv
*)mbox
->priv
)->rx_fifo
;
105 return (mbox_msg_t
) mbox_read_reg(fifo
->msg
);
108 static void omap2_mbox_fifo_write(struct omap_mbox
*mbox
, mbox_msg_t msg
)
110 struct omap_mbox2_fifo
*fifo
=
111 &((struct omap_mbox2_priv
*)mbox
->priv
)->tx_fifo
;
112 mbox_write_reg(msg
, fifo
->msg
);
115 static int omap2_mbox_fifo_empty(struct omap_mbox
*mbox
)
117 struct omap_mbox2_fifo
*fifo
=
118 &((struct omap_mbox2_priv
*)mbox
->priv
)->rx_fifo
;
119 return (mbox_read_reg(fifo
->msg_stat
) == 0);
122 static int omap2_mbox_fifo_full(struct omap_mbox
*mbox
)
124 struct omap_mbox2_fifo
*fifo
=
125 &((struct omap_mbox2_priv
*)mbox
->priv
)->tx_fifo
;
126 return (mbox_read_reg(fifo
->fifo_stat
));
129 /* Mailbox IRQ handle functions */
130 static void omap2_mbox_enable_irq(struct omap_mbox
*mbox
,
131 omap_mbox_type_t irq
)
133 struct omap_mbox2_priv
*p
= (struct omap_mbox2_priv
*)mbox
->priv
;
134 u32 l
, bit
= (irq
== IRQ_TX
) ? p
->notfull_bit
: p
->newmsg_bit
;
136 l
= mbox_read_reg(p
->irqenable
);
138 mbox_write_reg(l
, p
->irqenable
);
141 static void omap2_mbox_disable_irq(struct omap_mbox
*mbox
,
142 omap_mbox_type_t irq
)
144 struct omap_mbox2_priv
*p
= (struct omap_mbox2_priv
*)mbox
->priv
;
145 u32 l
, bit
= (irq
== IRQ_TX
) ? p
->notfull_bit
: p
->newmsg_bit
;
147 l
= mbox_read_reg(p
->irqenable
);
149 mbox_write_reg(l
, p
->irqenable
);
152 static void omap2_mbox_ack_irq(struct omap_mbox
*mbox
,
153 omap_mbox_type_t irq
)
155 struct omap_mbox2_priv
*p
= (struct omap_mbox2_priv
*)mbox
->priv
;
156 u32 bit
= (irq
== IRQ_TX
) ? p
->notfull_bit
: p
->newmsg_bit
;
158 mbox_write_reg(bit
, p
->irqstatus
);
161 static int omap2_mbox_is_irq(struct omap_mbox
*mbox
,
162 omap_mbox_type_t irq
)
164 struct omap_mbox2_priv
*p
= (struct omap_mbox2_priv
*)mbox
->priv
;
165 u32 bit
= (irq
== IRQ_TX
) ? p
->notfull_bit
: p
->newmsg_bit
;
166 u32 enable
= mbox_read_reg(p
->irqenable
);
167 u32 status
= mbox_read_reg(p
->irqstatus
);
169 return (enable
& status
& bit
);
172 static void omap2_mbox_save_ctx(struct omap_mbox
*mbox
)
175 struct omap_mbox2_priv
*p
= mbox
->priv
;
177 for (i
= 0; i
< MBOX_NR_REGS
; i
++) {
178 p
->ctx
[i
] = mbox_read_reg(i
* sizeof(u32
));
180 dev_dbg(mbox
->dev
, "%s: [%02x] %08x\n", __func__
,
185 static void omap2_mbox_restore_ctx(struct omap_mbox
*mbox
)
188 struct omap_mbox2_priv
*p
= mbox
->priv
;
190 for (i
= 0; i
< MBOX_NR_REGS
; i
++) {
191 mbox_write_reg(p
->ctx
[i
], i
* sizeof(u32
));
193 dev_dbg(mbox
->dev
, "%s: [%02x] %08x\n", __func__
,
198 static struct omap_mbox_ops omap2_mbox_ops
= {
199 .type
= OMAP_MBOX_TYPE2
,
200 .startup
= omap2_mbox_startup
,
201 .shutdown
= omap2_mbox_shutdown
,
202 .fifo_read
= omap2_mbox_fifo_read
,
203 .fifo_write
= omap2_mbox_fifo_write
,
204 .fifo_empty
= omap2_mbox_fifo_empty
,
205 .fifo_full
= omap2_mbox_fifo_full
,
206 .enable_irq
= omap2_mbox_enable_irq
,
207 .disable_irq
= omap2_mbox_disable_irq
,
208 .ack_irq
= omap2_mbox_ack_irq
,
209 .is_irq
= omap2_mbox_is_irq
,
210 .save_ctx
= omap2_mbox_save_ctx
,
211 .restore_ctx
= omap2_mbox_restore_ctx
,
215 * MAILBOX 0: ARM -> DSP,
216 * MAILBOX 1: ARM <- DSP.
217 * MAILBOX 2: ARM -> IVA,
218 * MAILBOX 3: ARM <- IVA.
221 /* FIXME: the following structs should be filled automatically by the user id */
224 static struct omap_mbox2_priv omap2_mbox_dsp_priv
= {
226 .msg
= MAILBOX_MESSAGE(0),
227 .fifo_stat
= MAILBOX_FIFOSTATUS(0),
230 .msg
= MAILBOX_MESSAGE(1),
231 .msg_stat
= MAILBOX_MSGSTATUS(1),
233 .irqenable
= MAILBOX_IRQENABLE(0),
234 .irqstatus
= MAILBOX_IRQSTATUS(0),
235 .notfull_bit
= MAILBOX_IRQ_NOTFULL(0),
236 .newmsg_bit
= MAILBOX_IRQ_NEWMSG(1),
239 struct omap_mbox mbox_dsp_info
= {
241 .ops
= &omap2_mbox_ops
,
242 .priv
= &omap2_mbox_dsp_priv
,
244 EXPORT_SYMBOL(mbox_dsp_info
);
246 #if defined(CONFIG_ARCH_OMAP2420) /* IVA */
247 static struct omap_mbox2_priv omap2_mbox_iva_priv
= {
249 .msg
= MAILBOX_MESSAGE(2),
250 .fifo_stat
= MAILBOX_FIFOSTATUS(2),
253 .msg
= MAILBOX_MESSAGE(3),
254 .msg_stat
= MAILBOX_MSGSTATUS(3),
256 .irqenable
= MAILBOX_IRQENABLE(3),
257 .irqstatus
= MAILBOX_IRQSTATUS(3),
258 .notfull_bit
= MAILBOX_IRQ_NOTFULL(2),
259 .newmsg_bit
= MAILBOX_IRQ_NEWMSG(3),
262 static struct omap_mbox mbox_iva_info
= {
264 .ops
= &omap2_mbox_ops
,
265 .priv
= &omap2_mbox_iva_priv
,
269 static int __devinit
omap2_mbox_probe(struct platform_device
*pdev
)
271 struct resource
*res
;
275 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
276 if (unlikely(!res
)) {
277 dev_err(&pdev
->dev
, "invalid mem resource\n");
280 mbox_base
= ioremap(res
->start
, res
->end
- res
->start
);
284 /* DSP or IVA2 IRQ */
285 ret
= platform_get_irq(pdev
, 0);
287 dev_err(&pdev
->dev
, "invalid irq resource\n");
290 mbox_dsp_info
.irq
= ret
;
292 ret
= omap_mbox_register(&pdev
->dev
, &mbox_dsp_info
);
296 #if defined(CONFIG_ARCH_OMAP2420) /* IVA */
297 if (cpu_is_omap2420()) {
299 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 1);
300 if (unlikely(!res
)) {
301 dev_err(&pdev
->dev
, "invalid irq resource\n");
305 mbox_iva_info
.irq
= res
->start
;
306 ret
= omap_mbox_register(&pdev
->dev
, &mbox_iva_info
);
314 omap_mbox_unregister(&mbox_dsp_info
);
320 static int __devexit
omap2_mbox_remove(struct platform_device
*pdev
)
322 #if defined(CONFIG_ARCH_OMAP2420)
323 omap_mbox_unregister(&mbox_iva_info
);
325 omap_mbox_unregister(&mbox_dsp_info
);
330 static struct platform_driver omap2_mbox_driver
= {
331 .probe
= omap2_mbox_probe
,
332 .remove
= __devexit_p(omap2_mbox_remove
),
334 .name
= "omap2-mailbox",
338 static int __init
omap2_mbox_init(void)
340 return platform_driver_register(&omap2_mbox_driver
);
343 static void __exit
omap2_mbox_exit(void)
345 platform_driver_unregister(&omap2_mbox_driver
);
348 module_init(omap2_mbox_init
);
349 module_exit(omap2_mbox_exit
);
351 MODULE_LICENSE("GPL v2");
352 MODULE_DESCRIPTION("omap mailbox: omap2/3 architecture specific functions");
353 MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, Paul Mundt");
354 MODULE_ALIAS("platform:omap2-mailbox");