arch/arm/mach-s3c2410/include/mach/gpio-nrs.h

   1 /* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
   2  *
   3  * Copyright (c) 2008 Simtec Electronics
   4  *      http://armlinux.simtec.co.uk/
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * S3C2410 - GPIO bank numbering
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12 */
  13
  14 #ifndef __MACH_GPIONRS_H
  15 #define __MACH_GPIONRS_H
  16
  17 #define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
  18
  19 #define S3C2410_GPIO_BANKA   (32*0)
  20 #define S3C2410_GPIO_BANKB   (32*1)
  21 #define S3C2410_GPIO_BANKC   (32*2)
  22 #define S3C2410_GPIO_BANKD   (32*3)
  23 #define S3C2410_GPIO_BANKE   (32*4)
  24 #define S3C2410_GPIO_BANKF   (32*5)
  25 #define S3C2410_GPIO_BANKG   (32*6)
  26 #define S3C2410_GPIO_BANKH   (32*7)
  27
  28 /* GPIO bank sizes */
  29 #define S3C2410_GPIO_A_NR       (32)
  30 #define S3C2410_GPIO_B_NR       (32)
  31 #define S3C2410_GPIO_C_NR       (32)
  32 #define S3C2410_GPIO_D_NR       (32)
  33 #define S3C2410_GPIO_E_NR       (32)
  34 #define S3C2410_GPIO_F_NR       (32)
  35 #define S3C2410_GPIO_G_NR       (32)
  36 #define S3C2410_GPIO_H_NR       (32)
  37
  38 #if CONFIG_S3C_GPIO_SPACE != 0
  39 #error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment
  40 #endif
  41
  42 #define S3C2410_GPIO_NEXT(__gpio) \
  43         ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0)
  44
  45 #ifndef __ASSEMBLY__
  46
  47 enum s3c_gpio_number {
  48         S3C2410_GPIO_A_START = 0,
  49         S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A),
  50         S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B),
  51         S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C),
  52         S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D),
  53         S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
  54         S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
  55         S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
  56 };
  57
  58 #endif /* __ASSEMBLY__ */
  59
  60 /* S3C2410 GPIO number definitions. */
  61
  62 #define S3C2410_GPA(_nr)        (S3C2410_GPIO_A_START + (_nr))
  63 #define S3C2410_GPB(_nr)        (S3C2410_GPIO_B_START + (_nr))
  64 #define S3C2410_GPC(_nr)        (S3C2410_GPIO_C_START + (_nr))
  65 #define S3C2410_GPD(_nr)        (S3C2410_GPIO_D_START + (_nr))
  66 #define S3C2410_GPE(_nr)        (S3C2410_GPIO_E_START + (_nr))
  67 #define S3C2410_GPF(_nr)        (S3C2410_GPIO_F_START + (_nr))
  68 #define S3C2410_GPG(_nr)        (S3C2410_GPIO_G_START + (_nr))
  69 #define S3C2410_GPH(_nr)        (S3C2410_GPIO_H_START + (_nr))
  70
  71 /* compatibility until drivers can be modified */
  72
  73 #define S3C2410_GPA0    S3C2410_GPA(0)
  74 #define S3C2410_GPA1    S3C2410_GPA(1)
  75 #define S3C2410_GPA3    S3C2410_GPA(3)
  76 #define S3C2410_GPA7    S3C2410_GPA(7)
  77
  78 #define S3C2410_GPE0    S3C2410_GPE(0)
  79 #define S3C2410_GPE1    S3C2410_GPE(1)
  80 #define S3C2410_GPE2    S3C2410_GPE(2)
  81 #define S3C2410_GPE3    S3C2410_GPE(3)
  82 #define S3C2410_GPE4    S3C2410_GPE(4)
  83 #define S3C2410_GPE5    S3C2410_GPE(5)
  84 #define S3C2410_GPE6    S3C2410_GPE(6)
  85 #define S3C2410_GPE7    S3C2410_GPE(7)
  86 #define S3C2410_GPE8    S3C2410_GPE(8)
  87 #define S3C2410_GPE9    S3C2410_GPE(9)
  88 #define S3C2410_GPE10   S3C2410_GPE(10)
  89
  90 #define S3C2410_GPH10   S3C2410_GPH(10)
  91
  92 #endif /* __MACH_GPIONRS_H */
  93