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wl1251: use wiphy_dev instead of wl->spi->dev
[linux/fpc-iii.git] / drivers / net / cnic.c
blob4869d77cbe91dc9fde5cee6b82babc8f50517ff7
1 /* cnic.c: Broadcom CNIC core network driver.
2 *
3 * Copyright (c) 2006-2009 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11 */
12
13 #include <linux/module.h>
14
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/list.h>
18 #include <linux/slab.h>
19 #include <linux/pci.h>
20 #include <linux/init.h>
21 #include <linux/netdevice.h>
22 #include <linux/uio_driver.h>
23 #include <linux/in.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/delay.h>
26 #include <linux/ethtool.h>
27 #include <linux/if_vlan.h>
28 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
29 #define BCM_VLAN 1
30 #endif
31 #include <net/ip.h>
32 #include <net/tcp.h>
33 #include <net/route.h>
34 #include <net/ipv6.h>
35 #include <net/ip6_route.h>
36 #include <scsi/iscsi_if.h>
37
38 #include "cnic_if.h"
39 #include "bnx2.h"
40 #include "cnic.h"
41 #include "cnic_defs.h"
42
43 #define DRV_MODULE_NAME "cnic"
44 #define PFX DRV_MODULE_NAME ": "
45
46 static char version[] __devinitdata =
47 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
48
49 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
50 "Chen (zongxi@broadcom.com");
51 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
52 MODULE_LICENSE("GPL");
53 MODULE_VERSION(CNIC_MODULE_VERSION);
54
55 static LIST_HEAD(cnic_dev_list);
56 static DEFINE_RWLOCK(cnic_dev_lock);
57 static DEFINE_MUTEX(cnic_lock);
58
59 static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
60
61 static int cnic_service_bnx2(void *, void *);
62 static int cnic_ctl(void *, struct cnic_ctl_info *);
63
64 static struct cnic_ops cnic_bnx2_ops = {
65 .cnic_owner = THIS_MODULE,
66 .cnic_handler = cnic_service_bnx2,
67 .cnic_ctl = cnic_ctl,
68 };
69
70 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *);
71 static void cnic_init_bnx2_tx_ring(struct cnic_dev *);
72 static void cnic_init_bnx2_rx_ring(struct cnic_dev *);
73 static int cnic_cm_set_pg(struct cnic_sock *);
74
75 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
76 {
77 struct cnic_dev *dev = uinfo->priv;
78 struct cnic_local *cp = dev->cnic_priv;
79
80 if (!capable(CAP_NET_ADMIN))
81 return -EPERM;
82
83 if (cp->uio_dev != -1)
84 return -EBUSY;
85
86 cp->uio_dev = iminor(inode);
87
88 cnic_shutdown_bnx2_rx_ring(dev);
89
90 cnic_init_bnx2_tx_ring(dev);
91 cnic_init_bnx2_rx_ring(dev);
92
93 return 0;
94 }
95
96 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
97 {
98 struct cnic_dev *dev = uinfo->priv;
99 struct cnic_local *cp = dev->cnic_priv;
100
101 cp->uio_dev = -1;
102 return 0;
103 }
104
105 static inline void cnic_hold(struct cnic_dev *dev)
106 {
107 atomic_inc(&dev->ref_count);
108 }
109
110 static inline void cnic_put(struct cnic_dev *dev)
111 {
112 atomic_dec(&dev->ref_count);
113 }
114
115 static inline void csk_hold(struct cnic_sock *csk)
116 {
117 atomic_inc(&csk->ref_count);
118 }
119
120 static inline void csk_put(struct cnic_sock *csk)
121 {
122 atomic_dec(&csk->ref_count);
123 }
124
125 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
126 {
127 struct cnic_dev *cdev;
128
129 read_lock(&cnic_dev_lock);
130 list_for_each_entry(cdev, &cnic_dev_list, list) {
131 if (netdev == cdev->netdev) {
132 cnic_hold(cdev);
133 read_unlock(&cnic_dev_lock);
134 return cdev;
135 }
136 }
137 read_unlock(&cnic_dev_lock);
138 return NULL;
139 }
140
141 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
142 {
143 struct cnic_local *cp = dev->cnic_priv;
144 struct cnic_eth_dev *ethdev = cp->ethdev;
145 struct drv_ctl_info info;
146 struct drv_ctl_io *io = &info.data.io;
147
148 info.cmd = DRV_CTL_CTX_WR_CMD;
149 io->cid_addr = cid_addr;
150 io->offset = off;
151 io->data = val;
152 ethdev->drv_ctl(dev->netdev, &info);
153 }
154
155 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
156 {
157 struct cnic_local *cp = dev->cnic_priv;
158 struct cnic_eth_dev *ethdev = cp->ethdev;
159 struct drv_ctl_info info;
160 struct drv_ctl_io *io = &info.data.io;
161
162 info.cmd = DRV_CTL_IO_WR_CMD;
163 io->offset = off;
164 io->data = val;
165 ethdev->drv_ctl(dev->netdev, &info);
166 }
167
168 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
169 {
170 struct cnic_local *cp = dev->cnic_priv;
171 struct cnic_eth_dev *ethdev = cp->ethdev;
172 struct drv_ctl_info info;
173 struct drv_ctl_io *io = &info.data.io;
174
175 info.cmd = DRV_CTL_IO_RD_CMD;
176 io->offset = off;
177 ethdev->drv_ctl(dev->netdev, &info);
178 return io->data;
179 }
180
181 static int cnic_in_use(struct cnic_sock *csk)
182 {
183 return test_bit(SK_F_INUSE, &csk->flags);
184 }
185
186 static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
187 {
188 struct cnic_local *cp = dev->cnic_priv;
189 struct cnic_eth_dev *ethdev = cp->ethdev;
190 struct drv_ctl_info info;
191
192 info.cmd = DRV_CTL_COMPLETION_CMD;
193 info.data.comp.comp_count = count;
194 ethdev->drv_ctl(dev->netdev, &info);
195 }
196
197 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
198 struct cnic_sock *csk)
199 {
200 struct iscsi_path path_req;
201 char *buf = NULL;
202 u16 len = 0;
203 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
204 struct cnic_ulp_ops *ulp_ops;
205
206 if (cp->uio_dev == -1)
207 return -ENODEV;
208
209 if (csk) {
210 len = sizeof(path_req);
211 buf = (char *) &path_req;
212 memset(&path_req, 0, len);
213
214 msg_type = ISCSI_KEVENT_PATH_REQ;
215 path_req.handle = (u64) csk->l5_cid;
216 if (test_bit(SK_F_IPV6, &csk->flags)) {
217 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
218 sizeof(struct in6_addr));
219 path_req.ip_addr_len = 16;
220 } else {
221 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
222 sizeof(struct in_addr));
223 path_req.ip_addr_len = 4;
224 }
225 path_req.vlan_id = csk->vlan_id;
226 path_req.pmtu = csk->mtu;
227 }
228
229 rcu_read_lock();
230 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
231 if (ulp_ops)
232 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
233 rcu_read_unlock();
234 return 0;
235 }
236
237 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
238 char *buf, u16 len)
239 {
240 int rc = -EINVAL;
241
242 switch (msg_type) {
243 case ISCSI_UEVENT_PATH_UPDATE: {
244 struct cnic_local *cp;
245 u32 l5_cid;
246 struct cnic_sock *csk;
247 struct iscsi_path *path_resp;
248
249 if (len < sizeof(*path_resp))
250 break;
251
252 path_resp = (struct iscsi_path *) buf;
253 cp = dev->cnic_priv;
254 l5_cid = (u32) path_resp->handle;
255 if (l5_cid >= MAX_CM_SK_TBL_SZ)
256 break;
257
258 csk = &cp->csk_tbl[l5_cid];
259 csk_hold(csk);
260 if (cnic_in_use(csk)) {
261 memcpy(csk->ha, path_resp->mac_addr, 6);
262 if (test_bit(SK_F_IPV6, &csk->flags))
263 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
264 sizeof(struct in6_addr));
265 else
266 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
267 sizeof(struct in_addr));
268 if (is_valid_ether_addr(csk->ha))
269 cnic_cm_set_pg(csk);
270 }
271 csk_put(csk);
272 rc = 0;
273 }
274 }
275
276 return rc;
277 }
278
279 static int cnic_offld_prep(struct cnic_sock *csk)
280 {
281 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
282 return 0;
283
284 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
285 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
286 return 0;
287 }
288
289 return 1;
290 }
291
292 static int cnic_close_prep(struct cnic_sock *csk)
293 {
294 clear_bit(SK_F_CONNECT_START, &csk->flags);
295 smp_mb__after_clear_bit();
296
297 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
298 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
299 msleep(1);
300
301 return 1;
302 }
303 return 0;
304 }
305
306 static int cnic_abort_prep(struct cnic_sock *csk)
307 {
308 clear_bit(SK_F_CONNECT_START, &csk->flags);
309 smp_mb__after_clear_bit();
310
311 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
312 msleep(1);
313
314 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
315 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
316 return 1;
317 }
318
319 return 0;
320 }
321
322 static void cnic_uio_stop(void)
323 {
324 struct cnic_dev *dev;
325
326 read_lock(&cnic_dev_lock);
327 list_for_each_entry(dev, &cnic_dev_list, list) {
328 struct cnic_local *cp = dev->cnic_priv;
329
330 if (cp->cnic_uinfo)
331 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
332 }
333 read_unlock(&cnic_dev_lock);
334 }
335
336 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
337 {
338 struct cnic_dev *dev;
339
340 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
341 printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
342 ulp_type);
343 return -EINVAL;
344 }
345 mutex_lock(&cnic_lock);
346 if (cnic_ulp_tbl[ulp_type]) {
347 printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
348 "been registered\n", ulp_type);
349 mutex_unlock(&cnic_lock);
350 return -EBUSY;
351 }
352
353 read_lock(&cnic_dev_lock);
354 list_for_each_entry(dev, &cnic_dev_list, list) {
355 struct cnic_local *cp = dev->cnic_priv;
356
357 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
358 }
359 read_unlock(&cnic_dev_lock);
360
361 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
362 mutex_unlock(&cnic_lock);
363
364 /* Prevent race conditions with netdev_event */
365 rtnl_lock();
366 read_lock(&cnic_dev_lock);
367 list_for_each_entry(dev, &cnic_dev_list, list) {
368 struct cnic_local *cp = dev->cnic_priv;
369
370 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
371 ulp_ops->cnic_init(dev);
372 }
373 read_unlock(&cnic_dev_lock);
374 rtnl_unlock();
375
376 return 0;
377 }
378
379 int cnic_unregister_driver(int ulp_type)
380 {
381 struct cnic_dev *dev;
382
383 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
384 printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
385 ulp_type);
386 return -EINVAL;
387 }
388 mutex_lock(&cnic_lock);
389 if (!cnic_ulp_tbl[ulp_type]) {
390 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
391 "been registered\n", ulp_type);
392 goto out_unlock;
393 }
394 read_lock(&cnic_dev_lock);
395 list_for_each_entry(dev, &cnic_dev_list, list) {
396 struct cnic_local *cp = dev->cnic_priv;
397
398 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
399 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
400 "still has devices registered\n", ulp_type);
401 read_unlock(&cnic_dev_lock);
402 goto out_unlock;
403 }
404 }
405 read_unlock(&cnic_dev_lock);
406
407 if (ulp_type == CNIC_ULP_ISCSI)
408 cnic_uio_stop();
409
410 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
411
412 mutex_unlock(&cnic_lock);
413 synchronize_rcu();
414 return 0;
415
416 out_unlock:
417 mutex_unlock(&cnic_lock);
418 return -EINVAL;
419 }
420
421 static int cnic_start_hw(struct cnic_dev *);
422 static void cnic_stop_hw(struct cnic_dev *);
423
424 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
425 void *ulp_ctx)
426 {
427 struct cnic_local *cp = dev->cnic_priv;
428 struct cnic_ulp_ops *ulp_ops;
429
430 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
431 printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
432 ulp_type);
433 return -EINVAL;
434 }
435 mutex_lock(&cnic_lock);
436 if (cnic_ulp_tbl[ulp_type] == NULL) {
437 printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
438 "has not been registered\n", ulp_type);
439 mutex_unlock(&cnic_lock);
440 return -EAGAIN;
441 }
442 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
443 printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
444 "been registered to this device\n", ulp_type);
445 mutex_unlock(&cnic_lock);
446 return -EBUSY;
447 }
448
449 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
450 cp->ulp_handle[ulp_type] = ulp_ctx;
451 ulp_ops = cnic_ulp_tbl[ulp_type];
452 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
453 cnic_hold(dev);
454
455 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
456 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
457 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
458
459 mutex_unlock(&cnic_lock);
460
461 return 0;
462
463 }
464 EXPORT_SYMBOL(cnic_register_driver);
465
466 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
467 {
468 struct cnic_local *cp = dev->cnic_priv;
469
470 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
471 printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
472 ulp_type);
473 return -EINVAL;
474 }
475 mutex_lock(&cnic_lock);
476 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
477 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
478 cnic_put(dev);
479 } else {
480 printk(KERN_ERR PFX "cnic_unregister_device: device not "
481 "registered to this ulp type %d\n", ulp_type);
482 mutex_unlock(&cnic_lock);
483 return -EINVAL;
484 }
485 mutex_unlock(&cnic_lock);
486
487 synchronize_rcu();
488
489 return 0;
490 }
491 EXPORT_SYMBOL(cnic_unregister_driver);
492
493 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
494 {
495 id_tbl->start = start_id;
496 id_tbl->max = size;
497 id_tbl->next = 0;
498 spin_lock_init(&id_tbl->lock);
499 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
500 if (!id_tbl->table)
501 return -ENOMEM;
502
503 return 0;
504 }
505
506 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
507 {
508 kfree(id_tbl->table);
509 id_tbl->table = NULL;
510 }
511
512 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
513 {
514 int ret = -1;
515
516 id -= id_tbl->start;
517 if (id >= id_tbl->max)
518 return ret;
519
520 spin_lock(&id_tbl->lock);
521 if (!test_bit(id, id_tbl->table)) {
522 set_bit(id, id_tbl->table);
523 ret = 0;
524 }
525 spin_unlock(&id_tbl->lock);
526 return ret;
527 }
528
529 /* Returns -1 if not successful */
530 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
531 {
532 u32 id;
533
534 spin_lock(&id_tbl->lock);
535 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
536 if (id >= id_tbl->max) {
537 id = -1;
538 if (id_tbl->next != 0) {
539 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
540 if (id >= id_tbl->next)
541 id = -1;
542 }
543 }
544
545 if (id < id_tbl->max) {
546 set_bit(id, id_tbl->table);
547 id_tbl->next = (id + 1) & (id_tbl->max - 1);
548 id += id_tbl->start;
549 }
550
551 spin_unlock(&id_tbl->lock);
552
553 return id;
554 }
555
556 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
557 {
558 if (id == -1)
559 return;
560
561 id -= id_tbl->start;
562 if (id >= id_tbl->max)
563 return;
564
565 clear_bit(id, id_tbl->table);
566 }
567
568 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
569 {
570 int i;
571
572 if (!dma->pg_arr)
573 return;
574
575 for (i = 0; i < dma->num_pages; i++) {
576 if (dma->pg_arr[i]) {
577 pci_free_consistent(dev->pcidev, BCM_PAGE_SIZE,
578 dma->pg_arr[i], dma->pg_map_arr[i]);
579 dma->pg_arr[i] = NULL;
580 }
581 }
582 if (dma->pgtbl) {
583 pci_free_consistent(dev->pcidev, dma->pgtbl_size,
584 dma->pgtbl, dma->pgtbl_map);
585 dma->pgtbl = NULL;
586 }
587 kfree(dma->pg_arr);
588 dma->pg_arr = NULL;
589 dma->num_pages = 0;
590 }
591
592 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
593 {
594 int i;
595 u32 *page_table = dma->pgtbl;
596
597 for (i = 0; i < dma->num_pages; i++) {
598 /* Each entry needs to be in big endian format. */
599 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
600 page_table++;
601 *page_table = (u32) dma->pg_map_arr[i];
602 page_table++;
603 }
604 }
605
606 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
607 int pages, int use_pg_tbl)
608 {
609 int i, size;
610 struct cnic_local *cp = dev->cnic_priv;
611
612 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
613 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
614 if (dma->pg_arr == NULL)
615 return -ENOMEM;
616
617 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
618 dma->num_pages = pages;
619
620 for (i = 0; i < pages; i++) {
621 dma->pg_arr[i] = pci_alloc_consistent(dev->pcidev,
622 BCM_PAGE_SIZE,
623 &dma->pg_map_arr[i]);
624 if (dma->pg_arr[i] == NULL)
625 goto error;
626 }
627 if (!use_pg_tbl)
628 return 0;
629
630 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
631 ~(BCM_PAGE_SIZE - 1);
632 dma->pgtbl = pci_alloc_consistent(dev->pcidev, dma->pgtbl_size,
633 &dma->pgtbl_map);
634 if (dma->pgtbl == NULL)
635 goto error;
636
637 cp->setup_pgtbl(dev, dma);
638
639 return 0;
640
641 error:
642 cnic_free_dma(dev, dma);
643 return -ENOMEM;
644 }
645
646 static void cnic_free_resc(struct cnic_dev *dev)
647 {
648 struct cnic_local *cp = dev->cnic_priv;
649 int i = 0;
650
651 if (cp->cnic_uinfo) {
652 while (cp->uio_dev != -1 && i < 15) {
653 msleep(100);
654 i++;
655 }
656 uio_unregister_device(cp->cnic_uinfo);
657 kfree(cp->cnic_uinfo);
658 cp->cnic_uinfo = NULL;
659 }
660
661 if (cp->l2_buf) {
662 pci_free_consistent(dev->pcidev, cp->l2_buf_size,
663 cp->l2_buf, cp->l2_buf_map);
664 cp->l2_buf = NULL;
665 }
666
667 if (cp->l2_ring) {
668 pci_free_consistent(dev->pcidev, cp->l2_ring_size,
669 cp->l2_ring, cp->l2_ring_map);
670 cp->l2_ring = NULL;
671 }
672
673 for (i = 0; i < cp->ctx_blks; i++) {
674 if (cp->ctx_arr[i].ctx) {
675 pci_free_consistent(dev->pcidev, cp->ctx_blk_size,
676 cp->ctx_arr[i].ctx,
677 cp->ctx_arr[i].mapping);
678 cp->ctx_arr[i].ctx = NULL;
679 }
680 }
681 kfree(cp->ctx_arr);
682 cp->ctx_arr = NULL;
683 cp->ctx_blks = 0;
684
685 cnic_free_dma(dev, &cp->gbl_buf_info);
686 cnic_free_dma(dev, &cp->conn_buf_info);
687 cnic_free_dma(dev, &cp->kwq_info);
688 cnic_free_dma(dev, &cp->kcq_info);
689 kfree(cp->iscsi_tbl);
690 cp->iscsi_tbl = NULL;
691 kfree(cp->ctx_tbl);
692 cp->ctx_tbl = NULL;
693
694 cnic_free_id_tbl(&cp->cid_tbl);
695 }
696
697 static int cnic_alloc_context(struct cnic_dev *dev)
698 {
699 struct cnic_local *cp = dev->cnic_priv;
700
701 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
702 int i, k, arr_size;
703
704 cp->ctx_blk_size = BCM_PAGE_SIZE;
705 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
706 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
707 sizeof(struct cnic_ctx);
708 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
709 if (cp->ctx_arr == NULL)
710 return -ENOMEM;
711
712 k = 0;
713 for (i = 0; i < 2; i++) {
714 u32 j, reg, off, lo, hi;
715
716 if (i == 0)
717 off = BNX2_PG_CTX_MAP;
718 else
719 off = BNX2_ISCSI_CTX_MAP;
720
721 reg = cnic_reg_rd_ind(dev, off);
722 lo = reg >> 16;
723 hi = reg & 0xffff;
724 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
725 cp->ctx_arr[k].cid = j;
726 }
727
728 cp->ctx_blks = k;
729 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
730 cp->ctx_blks = 0;
731 return -ENOMEM;
732 }
733
734 for (i = 0; i < cp->ctx_blks; i++) {
735 cp->ctx_arr[i].ctx =
736 pci_alloc_consistent(dev->pcidev, BCM_PAGE_SIZE,
737 &cp->ctx_arr[i].mapping);
738 if (cp->ctx_arr[i].ctx == NULL)
739 return -ENOMEM;
740 }
741 }
742 return 0;
743 }
744
745 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
746 {
747 struct cnic_local *cp = dev->cnic_priv;
748 struct uio_info *uinfo;
749 int ret;
750
751 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
752 if (ret)
753 goto error;
754 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
755
756 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
757 if (ret)
758 goto error;
759 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
760
761 ret = cnic_alloc_context(dev);
762 if (ret)
763 goto error;
764
765 cp->l2_ring_size = 2 * BCM_PAGE_SIZE;
766 cp->l2_ring = pci_alloc_consistent(dev->pcidev, cp->l2_ring_size,
767 &cp->l2_ring_map);
768 if (!cp->l2_ring)
769 goto error;
770
771 cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
772 cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
773 cp->l2_buf = pci_alloc_consistent(dev->pcidev, cp->l2_buf_size,
774 &cp->l2_buf_map);
775 if (!cp->l2_buf)
776 goto error;
777
778 uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
779 if (!uinfo)
780 goto error;
781
782 uinfo->mem[0].addr = dev->netdev->base_addr;
783 uinfo->mem[0].internal_addr = dev->regview;
784 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
785 uinfo->mem[0].memtype = UIO_MEM_PHYS;
786
787 uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
788 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
789 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
790 else
791 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
792 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
793
794 uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
795 uinfo->mem[2].size = cp->l2_ring_size;
796 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
797
798 uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
799 uinfo->mem[3].size = cp->l2_buf_size;
800 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
801
802 uinfo->name = "bnx2_cnic";
803 uinfo->version = CNIC_MODULE_VERSION;
804 uinfo->irq = UIO_IRQ_CUSTOM;
805
806 uinfo->open = cnic_uio_open;
807 uinfo->release = cnic_uio_close;
808
809 uinfo->priv = dev;
810
811 ret = uio_register_device(&dev->pcidev->dev, uinfo);
812 if (ret) {
813 kfree(uinfo);
814 goto error;
815 }
816
817 cp->cnic_uinfo = uinfo;
818
819 return 0;
820
821 error:
822 cnic_free_resc(dev);
823 return ret;
824 }
825
826 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
827 {
828 return cp->max_kwq_idx -
829 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
830 }
831
832 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
833 u32 num_wqes)
834 {
835 struct cnic_local *cp = dev->cnic_priv;
836 struct kwqe *prod_qe;
837 u16 prod, sw_prod, i;
838
839 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
840 return -EAGAIN; /* bnx2 is down */
841
842 spin_lock_bh(&cp->cnic_ulp_lock);
843 if (num_wqes > cnic_kwq_avail(cp) &&
844 !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
845 spin_unlock_bh(&cp->cnic_ulp_lock);
846 return -EAGAIN;
847 }
848
849 cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
850
851 prod = cp->kwq_prod_idx;
852 sw_prod = prod & MAX_KWQ_IDX;
853 for (i = 0; i < num_wqes; i++) {
854 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
855 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
856 prod++;
857 sw_prod = prod & MAX_KWQ_IDX;
858 }
859 cp->kwq_prod_idx = prod;
860
861 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
862
863 spin_unlock_bh(&cp->cnic_ulp_lock);
864 return 0;
865 }
866
867 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
868 {
869 struct cnic_local *cp = dev->cnic_priv;
870 int i, j;
871
872 i = 0;
873 j = 1;
874 while (num_cqes) {
875 struct cnic_ulp_ops *ulp_ops;
876 int ulp_type;
877 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
878 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
879
880 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
881 cnic_kwq_completion(dev, 1);
882
883 while (j < num_cqes) {
884 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
885
886 if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
887 break;
888
889 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
890 cnic_kwq_completion(dev, 1);
891 j++;
892 }
893
894 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
895 ulp_type = CNIC_ULP_RDMA;
896 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
897 ulp_type = CNIC_ULP_ISCSI;
898 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
899 ulp_type = CNIC_ULP_L4;
900 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
901 goto end;
902 else {
903 printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
904 dev->netdev->name, kcqe_op_flag);
905 goto end;
906 }
907
908 rcu_read_lock();
909 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
910 if (likely(ulp_ops)) {
911 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
912 cp->completed_kcq + i, j);
913 }
914 rcu_read_unlock();
915 end:
916 num_cqes -= j;
917 i += j;
918 j = 1;
919 }
920 return;
921 }
922
923 static u16 cnic_bnx2_next_idx(u16 idx)
924 {
925 return idx + 1;
926 }
927
928 static u16 cnic_bnx2_hw_idx(u16 idx)
929 {
930 return idx;
931 }
932
933 static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
934 {
935 struct cnic_local *cp = dev->cnic_priv;
936 u16 i, ri, last;
937 struct kcqe *kcqe;
938 int kcqe_cnt = 0, last_cnt = 0;
939
940 i = ri = last = *sw_prod;
941 ri &= MAX_KCQ_IDX;
942
943 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
944 kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
945 cp->completed_kcq[kcqe_cnt++] = kcqe;
946 i = cp->next_idx(i);
947 ri = i & MAX_KCQ_IDX;
948 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
949 last_cnt = kcqe_cnt;
950 last = i;
951 }
952 }
953
954 *sw_prod = last;
955 return last_cnt;
956 }
957
958 static void cnic_chk_bnx2_pkt_rings(struct cnic_local *cp)
959 {
960 u16 rx_cons = *cp->rx_cons_ptr;
961 u16 tx_cons = *cp->tx_cons_ptr;
962
963 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
964 cp->tx_cons = tx_cons;
965 cp->rx_cons = rx_cons;
966 uio_event_notify(cp->cnic_uinfo);
967 }
968 }
969
970 static int cnic_service_bnx2(void *data, void *status_blk)
971 {
972 struct cnic_dev *dev = data;
973 struct status_block *sblk = status_blk;
974 struct cnic_local *cp = dev->cnic_priv;
975 u32 status_idx = sblk->status_idx;
976 u16 hw_prod, sw_prod;
977 int kcqe_cnt;
978
979 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
980 return status_idx;
981
982 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
983
984 hw_prod = sblk->status_completion_producer_index;
985 sw_prod = cp->kcq_prod_idx;
986 while (sw_prod != hw_prod) {
987 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
988 if (kcqe_cnt == 0)
989 goto done;
990
991 service_kcqes(dev, kcqe_cnt);
992
993 /* Tell compiler that status_blk fields can change. */
994 barrier();
995 if (status_idx != sblk->status_idx) {
996 status_idx = sblk->status_idx;
997 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
998 hw_prod = sblk->status_completion_producer_index;
999 } else
1000 break;
1001 }
1002
1003 done:
1004 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
1005
1006 cp->kcq_prod_idx = sw_prod;
1007
1008 cnic_chk_bnx2_pkt_rings(cp);
1009 return status_idx;
1010 }
1011
1012 static void cnic_service_bnx2_msix(unsigned long data)
1013 {
1014 struct cnic_dev *dev = (struct cnic_dev *) data;
1015 struct cnic_local *cp = dev->cnic_priv;
1016 struct status_block_msix *status_blk = cp->bnx2_status_blk;
1017 u32 status_idx = status_blk->status_idx;
1018 u16 hw_prod, sw_prod;
1019 int kcqe_cnt;
1020
1021 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
1022
1023 hw_prod = status_blk->status_completion_producer_index;
1024 sw_prod = cp->kcq_prod_idx;
1025 while (sw_prod != hw_prod) {
1026 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
1027 if (kcqe_cnt == 0)
1028 goto done;
1029
1030 service_kcqes(dev, kcqe_cnt);
1031
1032 /* Tell compiler that status_blk fields can change. */
1033 barrier();
1034 if (status_idx != status_blk->status_idx) {
1035 status_idx = status_blk->status_idx;
1036 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
1037 hw_prod = status_blk->status_completion_producer_index;
1038 } else
1039 break;
1040 }
1041
1042 done:
1043 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
1044 cp->kcq_prod_idx = sw_prod;
1045
1046 cnic_chk_bnx2_pkt_rings(cp);
1047
1048 cp->last_status_idx = status_idx;
1049 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
1050 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
1051 }
1052
1053 static irqreturn_t cnic_irq(int irq, void *dev_instance)
1054 {
1055 struct cnic_dev *dev = dev_instance;
1056 struct cnic_local *cp = dev->cnic_priv;
1057 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
1058
1059 if (cp->ack_int)
1060 cp->ack_int(dev);
1061
1062 prefetch(cp->status_blk);
1063 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
1064
1065 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
1066 tasklet_schedule(&cp->cnic_irq_task);
1067
1068 return IRQ_HANDLED;
1069 }
1070
1071 static void cnic_ulp_stop(struct cnic_dev *dev)
1072 {
1073 struct cnic_local *cp = dev->cnic_priv;
1074 int if_type;
1075
1076 if (cp->cnic_uinfo)
1077 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
1078
1079 rcu_read_lock();
1080 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
1081 struct cnic_ulp_ops *ulp_ops;
1082
1083 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
1084 if (!ulp_ops)
1085 continue;
1086
1087 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
1088 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
1089 }
1090 rcu_read_unlock();
1091 }
1092
1093 static void cnic_ulp_start(struct cnic_dev *dev)
1094 {
1095 struct cnic_local *cp = dev->cnic_priv;
1096 int if_type;
1097
1098 rcu_read_lock();
1099 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
1100 struct cnic_ulp_ops *ulp_ops;
1101
1102 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
1103 if (!ulp_ops || !ulp_ops->cnic_start)
1104 continue;
1105
1106 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
1107 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
1108 }
1109 rcu_read_unlock();
1110 }
1111
1112 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
1113 {
1114 struct cnic_dev *dev = data;
1115
1116 switch (info->cmd) {
1117 case CNIC_CTL_STOP_CMD:
1118 cnic_hold(dev);
1119 mutex_lock(&cnic_lock);
1120
1121 cnic_ulp_stop(dev);
1122 cnic_stop_hw(dev);
1123
1124 mutex_unlock(&cnic_lock);
1125 cnic_put(dev);
1126 break;
1127 case CNIC_CTL_START_CMD:
1128 cnic_hold(dev);
1129 mutex_lock(&cnic_lock);
1130
1131 if (!cnic_start_hw(dev))
1132 cnic_ulp_start(dev);
1133
1134 mutex_unlock(&cnic_lock);
1135 cnic_put(dev);
1136 break;
1137 default:
1138 return -EINVAL;
1139 }
1140 return 0;
1141 }
1142
1143 static void cnic_ulp_init(struct cnic_dev *dev)
1144 {
1145 int i;
1146 struct cnic_local *cp = dev->cnic_priv;
1147
1148 rcu_read_lock();
1149 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
1150 struct cnic_ulp_ops *ulp_ops;
1151
1152 ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
1153 if (!ulp_ops || !ulp_ops->cnic_init)
1154 continue;
1155
1156 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
1157 ulp_ops->cnic_init(dev);
1158
1159 }
1160 rcu_read_unlock();
1161 }
1162
1163 static void cnic_ulp_exit(struct cnic_dev *dev)
1164 {
1165 int i;
1166 struct cnic_local *cp = dev->cnic_priv;
1167
1168 rcu_read_lock();
1169 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
1170 struct cnic_ulp_ops *ulp_ops;
1171
1172 ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
1173 if (!ulp_ops || !ulp_ops->cnic_exit)
1174 continue;
1175
1176 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
1177 ulp_ops->cnic_exit(dev);
1178
1179 }
1180 rcu_read_unlock();
1181 }
1182
1183 static int cnic_cm_offload_pg(struct cnic_sock *csk)
1184 {
1185 struct cnic_dev *dev = csk->dev;
1186 struct l4_kwq_offload_pg *l4kwqe;
1187 struct kwqe *wqes[1];
1188
1189 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
1190 memset(l4kwqe, 0, sizeof(*l4kwqe));
1191 wqes[0] = (struct kwqe *) l4kwqe;
1192
1193 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
1194 l4kwqe->flags =
1195 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
1196 l4kwqe->l2hdr_nbytes = ETH_HLEN;
1197
1198 l4kwqe->da0 = csk->ha[0];
1199 l4kwqe->da1 = csk->ha[1];
1200 l4kwqe->da2 = csk->ha[2];
1201 l4kwqe->da3 = csk->ha[3];
1202 l4kwqe->da4 = csk->ha[4];
1203 l4kwqe->da5 = csk->ha[5];
1204
1205 l4kwqe->sa0 = dev->mac_addr[0];
1206 l4kwqe->sa1 = dev->mac_addr[1];
1207 l4kwqe->sa2 = dev->mac_addr[2];
1208 l4kwqe->sa3 = dev->mac_addr[3];
1209 l4kwqe->sa4 = dev->mac_addr[4];
1210 l4kwqe->sa5 = dev->mac_addr[5];
1211
1212 l4kwqe->etype = ETH_P_IP;
1213 l4kwqe->ipid_count = DEF_IPID_COUNT;
1214 l4kwqe->host_opaque = csk->l5_cid;
1215
1216 if (csk->vlan_id) {
1217 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
1218 l4kwqe->vlan_tag = csk->vlan_id;
1219 l4kwqe->l2hdr_nbytes += 4;
1220 }
1221
1222 return dev->submit_kwqes(dev, wqes, 1);
1223 }
1224
1225 static int cnic_cm_update_pg(struct cnic_sock *csk)
1226 {
1227 struct cnic_dev *dev = csk->dev;
1228 struct l4_kwq_update_pg *l4kwqe;
1229 struct kwqe *wqes[1];
1230
1231 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
1232 memset(l4kwqe, 0, sizeof(*l4kwqe));
1233 wqes[0] = (struct kwqe *) l4kwqe;
1234
1235 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
1236 l4kwqe->flags =
1237 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
1238 l4kwqe->pg_cid = csk->pg_cid;
1239
1240 l4kwqe->da0 = csk->ha[0];
1241 l4kwqe->da1 = csk->ha[1];
1242 l4kwqe->da2 = csk->ha[2];
1243 l4kwqe->da3 = csk->ha[3];
1244 l4kwqe->da4 = csk->ha[4];
1245 l4kwqe->da5 = csk->ha[5];
1246
1247 l4kwqe->pg_host_opaque = csk->l5_cid;
1248 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
1249
1250 return dev->submit_kwqes(dev, wqes, 1);
1251 }
1252
1253 static int cnic_cm_upload_pg(struct cnic_sock *csk)
1254 {
1255 struct cnic_dev *dev = csk->dev;
1256 struct l4_kwq_upload *l4kwqe;
1257 struct kwqe *wqes[1];
1258
1259 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
1260 memset(l4kwqe, 0, sizeof(*l4kwqe));
1261 wqes[0] = (struct kwqe *) l4kwqe;
1262
1263 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
1264 l4kwqe->flags =
1265 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
1266 l4kwqe->cid = csk->pg_cid;
1267
1268 return dev->submit_kwqes(dev, wqes, 1);
1269 }
1270
1271 static int cnic_cm_conn_req(struct cnic_sock *csk)
1272 {
1273 struct cnic_dev *dev = csk->dev;
1274 struct l4_kwq_connect_req1 *l4kwqe1;
1275 struct l4_kwq_connect_req2 *l4kwqe2;
1276 struct l4_kwq_connect_req3 *l4kwqe3;
1277 struct kwqe *wqes[3];
1278 u8 tcp_flags = 0;
1279 int num_wqes = 2;
1280
1281 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
1282 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
1283 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
1284 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
1285 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
1286 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
1287
1288 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
1289 l4kwqe3->flags =
1290 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
1291 l4kwqe3->ka_timeout = csk->ka_timeout;
1292 l4kwqe3->ka_interval = csk->ka_interval;
1293 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
1294 l4kwqe3->tos = csk->tos;
1295 l4kwqe3->ttl = csk->ttl;
1296 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
1297 l4kwqe3->pmtu = csk->mtu;
1298 l4kwqe3->rcv_buf = csk->rcv_buf;
1299 l4kwqe3->snd_buf = csk->snd_buf;
1300 l4kwqe3->seed = csk->seed;
1301
1302 wqes[0] = (struct kwqe *) l4kwqe1;
1303 if (test_bit(SK_F_IPV6, &csk->flags)) {
1304 wqes[1] = (struct kwqe *) l4kwqe2;
1305 wqes[2] = (struct kwqe *) l4kwqe3;
1306 num_wqes = 3;
1307
1308 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
1309 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
1310 l4kwqe2->flags =
1311 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
1312 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
1313 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
1314 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
1315 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
1316 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
1317 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
1318 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
1319 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
1320 sizeof(struct tcphdr);
1321 } else {
1322 wqes[1] = (struct kwqe *) l4kwqe3;
1323 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
1324 sizeof(struct tcphdr);
1325 }
1326
1327 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
1328 l4kwqe1->flags =
1329 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
1330 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
1331 l4kwqe1->cid = csk->cid;
1332 l4kwqe1->pg_cid = csk->pg_cid;
1333 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
1334 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
1335 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
1336 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
1337 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
1338 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
1339 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
1340 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
1341 if (csk->tcp_flags & SK_TCP_NAGLE)
1342 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
1343 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
1344 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
1345 if (csk->tcp_flags & SK_TCP_SACK)
1346 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
1347 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
1348 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
1349
1350 l4kwqe1->tcp_flags = tcp_flags;
1351
1352 return dev->submit_kwqes(dev, wqes, num_wqes);
1353 }
1354
1355 static int cnic_cm_close_req(struct cnic_sock *csk)
1356 {
1357 struct cnic_dev *dev = csk->dev;
1358 struct l4_kwq_close_req *l4kwqe;
1359 struct kwqe *wqes[1];
1360
1361 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
1362 memset(l4kwqe, 0, sizeof(*l4kwqe));
1363 wqes[0] = (struct kwqe *) l4kwqe;
1364
1365 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
1366 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
1367 l4kwqe->cid = csk->cid;
1368
1369 return dev->submit_kwqes(dev, wqes, 1);
1370 }
1371
1372 static int cnic_cm_abort_req(struct cnic_sock *csk)
1373 {
1374 struct cnic_dev *dev = csk->dev;
1375 struct l4_kwq_reset_req *l4kwqe;
1376 struct kwqe *wqes[1];
1377
1378 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
1379 memset(l4kwqe, 0, sizeof(*l4kwqe));
1380 wqes[0] = (struct kwqe *) l4kwqe;
1381
1382 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
1383 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
1384 l4kwqe->cid = csk->cid;
1385
1386 return dev->submit_kwqes(dev, wqes, 1);
1387 }
1388
1389 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
1390 u32 l5_cid, struct cnic_sock **csk, void *context)
1391 {
1392 struct cnic_local *cp = dev->cnic_priv;
1393 struct cnic_sock *csk1;
1394
1395 if (l5_cid >= MAX_CM_SK_TBL_SZ)
1396 return -EINVAL;
1397
1398 csk1 = &cp->csk_tbl[l5_cid];
1399 if (atomic_read(&csk1->ref_count))
1400 return -EAGAIN;
1401
1402 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
1403 return -EBUSY;
1404
1405 csk1->dev = dev;
1406 csk1->cid = cid;
1407 csk1->l5_cid = l5_cid;
1408 csk1->ulp_type = ulp_type;
1409 csk1->context = context;
1410
1411 csk1->ka_timeout = DEF_KA_TIMEOUT;
1412 csk1->ka_interval = DEF_KA_INTERVAL;
1413 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
1414 csk1->tos = DEF_TOS;
1415 csk1->ttl = DEF_TTL;
1416 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
1417 csk1->rcv_buf = DEF_RCV_BUF;
1418 csk1->snd_buf = DEF_SND_BUF;
1419 csk1->seed = DEF_SEED;
1420
1421 *csk = csk1;
1422 return 0;
1423 }
1424
1425 static void cnic_cm_cleanup(struct cnic_sock *csk)
1426 {
1427 if (csk->src_port) {
1428 struct cnic_dev *dev = csk->dev;
1429 struct cnic_local *cp = dev->cnic_priv;
1430
1431 cnic_free_id(&cp->csk_port_tbl, csk->src_port);
1432 csk->src_port = 0;
1433 }
1434 }
1435
1436 static void cnic_close_conn(struct cnic_sock *csk)
1437 {
1438 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
1439 cnic_cm_upload_pg(csk);
1440 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
1441 }
1442 cnic_cm_cleanup(csk);
1443 }
1444
1445 static int cnic_cm_destroy(struct cnic_sock *csk)
1446 {
1447 if (!cnic_in_use(csk))
1448 return -EINVAL;
1449
1450 csk_hold(csk);
1451 clear_bit(SK_F_INUSE, &csk->flags);
1452 smp_mb__after_clear_bit();
1453 while (atomic_read(&csk->ref_count) != 1)
1454 msleep(1);
1455 cnic_cm_cleanup(csk);
1456
1457 csk->flags = 0;
1458 csk_put(csk);
1459 return 0;
1460 }
1461
1462 static inline u16 cnic_get_vlan(struct net_device *dev,
1463 struct net_device **vlan_dev)
1464 {
1465 if (dev->priv_flags & IFF_802_1Q_VLAN) {
1466 *vlan_dev = vlan_dev_real_dev(dev);
1467 return vlan_dev_vlan_id(dev);
1468 }
1469 *vlan_dev = dev;
1470 return 0;
1471 }
1472
1473 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
1474 struct dst_entry **dst)
1475 {
1476 #if defined(CONFIG_INET)
1477 struct flowi fl;
1478 int err;
1479 struct rtable *rt;
1480
1481 memset(&fl, 0, sizeof(fl));
1482 fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
1483
1484 err = ip_route_output_key(&init_net, &rt, &fl);
1485 if (!err)
1486 *dst = &rt->u.dst;
1487 return err;
1488 #else
1489 return -ENETUNREACH;
1490 #endif
1491 }
1492
1493 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
1494 struct dst_entry **dst)
1495 {
1496 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
1497 struct flowi fl;
1498
1499 memset(&fl, 0, sizeof(fl));
1500 ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
1501 if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
1502 fl.oif = dst_addr->sin6_scope_id;
1503
1504 *dst = ip6_route_output(&init_net, NULL, &fl);
1505 if (*dst)
1506 return 0;
1507 #endif
1508
1509 return -ENETUNREACH;
1510 }
1511
1512 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
1513 int ulp_type)
1514 {
1515 struct cnic_dev *dev = NULL;
1516 struct dst_entry *dst;
1517 struct net_device *netdev = NULL;
1518 int err = -ENETUNREACH;
1519
1520 if (dst_addr->sin_family == AF_INET)
1521 err = cnic_get_v4_route(dst_addr, &dst);
1522 else if (dst_addr->sin_family == AF_INET6) {
1523 struct sockaddr_in6 *dst_addr6 =
1524 (struct sockaddr_in6 *) dst_addr;
1525
1526 err = cnic_get_v6_route(dst_addr6, &dst);
1527 } else
1528 return NULL;
1529
1530 if (err)
1531 return NULL;
1532
1533 if (!dst->dev)
1534 goto done;
1535
1536 cnic_get_vlan(dst->dev, &netdev);
1537
1538 dev = cnic_from_netdev(netdev);
1539
1540 done:
1541 dst_release(dst);
1542 if (dev)
1543 cnic_put(dev);
1544 return dev;
1545 }
1546
1547 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
1548 {
1549 struct cnic_dev *dev = csk->dev;
1550 struct cnic_local *cp = dev->cnic_priv;
1551
1552 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
1553 }
1554
1555 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
1556 {
1557 struct cnic_dev *dev = csk->dev;
1558 struct cnic_local *cp = dev->cnic_priv;
1559 int is_v6, err, rc = -ENETUNREACH;
1560 struct dst_entry *dst;
1561 struct net_device *realdev;
1562 u32 local_port;
1563
1564 if (saddr->local.v6.sin6_family == AF_INET6 &&
1565 saddr->remote.v6.sin6_family == AF_INET6)
1566 is_v6 = 1;
1567 else if (saddr->local.v4.sin_family == AF_INET &&
1568 saddr->remote.v4.sin_family == AF_INET)
1569 is_v6 = 0;
1570 else
1571 return -EINVAL;
1572
1573 clear_bit(SK_F_IPV6, &csk->flags);
1574
1575 if (is_v6) {
1576 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
1577 set_bit(SK_F_IPV6, &csk->flags);
1578 err = cnic_get_v6_route(&saddr->remote.v6, &dst);
1579 if (err)
1580 return err;
1581
1582 if (!dst || dst->error || !dst->dev)
1583 goto err_out;
1584
1585 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
1586 sizeof(struct in6_addr));
1587 csk->dst_port = saddr->remote.v6.sin6_port;
1588 local_port = saddr->local.v6.sin6_port;
1589 #else
1590 return rc;
1591 #endif
1592
1593 } else {
1594 err = cnic_get_v4_route(&saddr->remote.v4, &dst);
1595 if (err)
1596 return err;
1597
1598 if (!dst || dst->error || !dst->dev)
1599 goto err_out;
1600
1601 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
1602 csk->dst_port = saddr->remote.v4.sin_port;
1603 local_port = saddr->local.v4.sin_port;
1604 }
1605
1606 csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
1607 if (realdev != dev->netdev)
1608 goto err_out;
1609
1610 if (local_port >= CNIC_LOCAL_PORT_MIN &&
1611 local_port < CNIC_LOCAL_PORT_MAX) {
1612 if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
1613 local_port = 0;
1614 } else
1615 local_port = 0;
1616
1617 if (!local_port) {
1618 local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
1619 if (local_port == -1) {
1620 rc = -ENOMEM;
1621 goto err_out;
1622 }
1623 }
1624 csk->src_port = local_port;
1625
1626 csk->mtu = dst_mtu(dst);
1627 rc = 0;
1628
1629 err_out:
1630 dst_release(dst);
1631 return rc;
1632 }
1633
1634 static void cnic_init_csk_state(struct cnic_sock *csk)
1635 {
1636 csk->state = 0;
1637 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
1638 clear_bit(SK_F_CLOSING, &csk->flags);
1639 }
1640
1641 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
1642 {
1643 int err = 0;
1644
1645 if (!cnic_in_use(csk))
1646 return -EINVAL;
1647
1648 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
1649 return -EINVAL;
1650
1651 cnic_init_csk_state(csk);
1652
1653 err = cnic_get_route(csk, saddr);
1654 if (err)
1655 goto err_out;
1656
1657 err = cnic_resolve_addr(csk, saddr);
1658 if (!err)
1659 return 0;
1660
1661 err_out:
1662 clear_bit(SK_F_CONNECT_START, &csk->flags);
1663 return err;
1664 }
1665
1666 static int cnic_cm_abort(struct cnic_sock *csk)
1667 {
1668 struct cnic_local *cp = csk->dev->cnic_priv;
1669 u32 opcode;
1670
1671 if (!cnic_in_use(csk))
1672 return -EINVAL;
1673
1674 if (cnic_abort_prep(csk))
1675 return cnic_cm_abort_req(csk);
1676
1677 /* Getting here means that we haven't started connect, or
1678 * connect was not successful.
1679 */
1680
1681 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
1682 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
1683 opcode = csk->state;
1684 else
1685 opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
1686 cp->close_conn(csk, opcode);
1687
1688 return 0;
1689 }
1690
1691 static int cnic_cm_close(struct cnic_sock *csk)
1692 {
1693 if (!cnic_in_use(csk))
1694 return -EINVAL;
1695
1696 if (cnic_close_prep(csk)) {
1697 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
1698 return cnic_cm_close_req(csk);
1699 }
1700 return 0;
1701 }
1702
1703 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
1704 u8 opcode)
1705 {
1706 struct cnic_ulp_ops *ulp_ops;
1707 int ulp_type = csk->ulp_type;
1708
1709 rcu_read_lock();
1710 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1711 if (ulp_ops) {
1712 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
1713 ulp_ops->cm_connect_complete(csk);
1714 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
1715 ulp_ops->cm_close_complete(csk);
1716 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
1717 ulp_ops->cm_remote_abort(csk);
1718 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
1719 ulp_ops->cm_abort_complete(csk);
1720 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
1721 ulp_ops->cm_remote_close(csk);
1722 }
1723 rcu_read_unlock();
1724 }
1725
1726 static int cnic_cm_set_pg(struct cnic_sock *csk)
1727 {
1728 if (cnic_offld_prep(csk)) {
1729 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
1730 cnic_cm_update_pg(csk);
1731 else
1732 cnic_cm_offload_pg(csk);
1733 }
1734 return 0;
1735 }
1736
1737 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
1738 {
1739 struct cnic_local *cp = dev->cnic_priv;
1740 u32 l5_cid = kcqe->pg_host_opaque;
1741 u8 opcode = kcqe->op_code;
1742 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1743
1744 csk_hold(csk);
1745 if (!cnic_in_use(csk))
1746 goto done;
1747
1748 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
1749 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
1750 goto done;
1751 }
1752 csk->pg_cid = kcqe->pg_cid;
1753 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
1754 cnic_cm_conn_req(csk);
1755
1756 done:
1757 csk_put(csk);
1758 }
1759
1760 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
1761 {
1762 struct cnic_local *cp = dev->cnic_priv;
1763 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
1764 u8 opcode = l4kcqe->op_code;
1765 u32 l5_cid;
1766 struct cnic_sock *csk;
1767
1768 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
1769 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
1770 cnic_cm_process_offld_pg(dev, l4kcqe);
1771 return;
1772 }
1773
1774 l5_cid = l4kcqe->conn_id;
1775 if (opcode & 0x80)
1776 l5_cid = l4kcqe->cid;
1777 if (l5_cid >= MAX_CM_SK_TBL_SZ)
1778 return;
1779
1780 csk = &cp->csk_tbl[l5_cid];
1781 csk_hold(csk);
1782
1783 if (!cnic_in_use(csk)) {
1784 csk_put(csk);
1785 return;
1786 }
1787
1788 switch (opcode) {
1789 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
1790 if (l4kcqe->status == 0)
1791 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
1792
1793 smp_mb__before_clear_bit();
1794 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
1795 cnic_cm_upcall(cp, csk, opcode);
1796 break;
1797
1798 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
1799 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
1800 csk->state = opcode;
1801 /* fall through */
1802 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
1803 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
1804 cp->close_conn(csk, opcode);
1805 break;
1806
1807 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
1808 cnic_cm_upcall(cp, csk, opcode);
1809 break;
1810 }
1811 csk_put(csk);
1812 }
1813
1814 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
1815 {
1816 struct cnic_dev *dev = data;
1817 int i;
1818
1819 for (i = 0; i < num; i++)
1820 cnic_cm_process_kcqe(dev, kcqe[i]);
1821 }
1822
1823 static struct cnic_ulp_ops cm_ulp_ops = {
1824 .indicate_kcqes = cnic_cm_indicate_kcqe,
1825 };
1826
1827 static void cnic_cm_free_mem(struct cnic_dev *dev)
1828 {
1829 struct cnic_local *cp = dev->cnic_priv;
1830
1831 kfree(cp->csk_tbl);
1832 cp->csk_tbl = NULL;
1833 cnic_free_id_tbl(&cp->csk_port_tbl);
1834 }
1835
1836 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
1837 {
1838 struct cnic_local *cp = dev->cnic_priv;
1839
1840 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
1841 GFP_KERNEL);
1842 if (!cp->csk_tbl)
1843 return -ENOMEM;
1844
1845 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
1846 CNIC_LOCAL_PORT_MIN)) {
1847 cnic_cm_free_mem(dev);
1848 return -ENOMEM;
1849 }
1850 return 0;
1851 }
1852
1853 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
1854 {
1855 if ((opcode == csk->state) ||
1856 (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
1857 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
1858 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
1859 return 1;
1860 }
1861 return 0;
1862 }
1863
1864 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
1865 {
1866 struct cnic_dev *dev = csk->dev;
1867 struct cnic_local *cp = dev->cnic_priv;
1868
1869 clear_bit(SK_F_CONNECT_START, &csk->flags);
1870 if (cnic_ready_to_close(csk, opcode)) {
1871 cnic_close_conn(csk);
1872 cnic_cm_upcall(cp, csk, opcode);
1873 }
1874 }
1875
1876 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
1877 {
1878 }
1879
1880 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
1881 {
1882 u32 seed;
1883
1884 get_random_bytes(&seed, 4);
1885 cnic_ctx_wr(dev, 45, 0, seed);
1886 return 0;
1887 }
1888
1889 static int cnic_cm_open(struct cnic_dev *dev)
1890 {
1891 struct cnic_local *cp = dev->cnic_priv;
1892 int err;
1893
1894 err = cnic_cm_alloc_mem(dev);
1895 if (err)
1896 return err;
1897
1898 err = cp->start_cm(dev);
1899
1900 if (err)
1901 goto err_out;
1902
1903 dev->cm_create = cnic_cm_create;
1904 dev->cm_destroy = cnic_cm_destroy;
1905 dev->cm_connect = cnic_cm_connect;
1906 dev->cm_abort = cnic_cm_abort;
1907 dev->cm_close = cnic_cm_close;
1908 dev->cm_select_dev = cnic_cm_select_dev;
1909
1910 cp->ulp_handle[CNIC_ULP_L4] = dev;
1911 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
1912 return 0;
1913
1914 err_out:
1915 cnic_cm_free_mem(dev);
1916 return err;
1917 }
1918
1919 static int cnic_cm_shutdown(struct cnic_dev *dev)
1920 {
1921 struct cnic_local *cp = dev->cnic_priv;
1922 int i;
1923
1924 cp->stop_cm(dev);
1925
1926 if (!cp->csk_tbl)
1927 return 0;
1928
1929 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
1930 struct cnic_sock *csk = &cp->csk_tbl[i];
1931
1932 clear_bit(SK_F_INUSE, &csk->flags);
1933 cnic_cm_cleanup(csk);
1934 }
1935 cnic_cm_free_mem(dev);
1936
1937 return 0;
1938 }
1939
1940 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
1941 {
1942 struct cnic_local *cp = dev->cnic_priv;
1943 u32 cid_addr;
1944 int i;
1945
1946 if (CHIP_NUM(cp) == CHIP_NUM_5709)
1947 return;
1948
1949 cid_addr = GET_CID_ADDR(cid);
1950
1951 for (i = 0; i < CTX_SIZE; i += 4)
1952 cnic_ctx_wr(dev, cid_addr, i, 0);
1953 }
1954
1955 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
1956 {
1957 struct cnic_local *cp = dev->cnic_priv;
1958 int ret = 0, i;
1959 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
1960
1961 if (CHIP_NUM(cp) != CHIP_NUM_5709)
1962 return 0;
1963
1964 for (i = 0; i < cp->ctx_blks; i++) {
1965 int j;
1966 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
1967 u32 val;
1968
1969 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
1970
1971 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
1972 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
1973 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
1974 (u64) cp->ctx_arr[i].mapping >> 32);
1975 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
1976 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
1977 for (j = 0; j < 10; j++) {
1978
1979 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
1980 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
1981 break;
1982 udelay(5);
1983 }
1984 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
1985 ret = -EBUSY;
1986 break;
1987 }
1988 }
1989 return ret;
1990 }
1991
1992 static void cnic_free_irq(struct cnic_dev *dev)
1993 {
1994 struct cnic_local *cp = dev->cnic_priv;
1995 struct cnic_eth_dev *ethdev = cp->ethdev;
1996
1997 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
1998 cp->disable_int_sync(dev);
1999 tasklet_disable(&cp->cnic_irq_task);
2000 free_irq(ethdev->irq_arr[0].vector, dev);
2001 }
2002 }
2003
2004 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
2005 {
2006 struct cnic_local *cp = dev->cnic_priv;
2007 struct cnic_eth_dev *ethdev = cp->ethdev;
2008
2009 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
2010 int err, i = 0;
2011 int sblk_num = cp->status_blk_num;
2012 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
2013 BNX2_HC_SB_CONFIG_1;
2014
2015 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
2016
2017 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
2018 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
2019 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
2020
2021 cp->bnx2_status_blk = cp->status_blk;
2022 cp->last_status_idx = cp->bnx2_status_blk->status_idx;
2023 tasklet_init(&cp->cnic_irq_task, &cnic_service_bnx2_msix,
2024 (unsigned long) dev);
2025 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
2026 "cnic", dev);
2027 if (err) {
2028 tasklet_disable(&cp->cnic_irq_task);
2029 return err;
2030 }
2031 while (cp->bnx2_status_blk->status_completion_producer_index &&
2032 i < 10) {
2033 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
2034 1 << (11 + sblk_num));
2035 udelay(10);
2036 i++;
2037 barrier();
2038 }
2039 if (cp->bnx2_status_blk->status_completion_producer_index) {
2040 cnic_free_irq(dev);
2041 goto failed;
2042 }
2043
2044 } else {
2045 struct status_block *sblk = cp->status_blk;
2046 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
2047 int i = 0;
2048
2049 while (sblk->status_completion_producer_index && i < 10) {
2050 CNIC_WR(dev, BNX2_HC_COMMAND,
2051 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
2052 udelay(10);
2053 i++;
2054 barrier();
2055 }
2056 if (sblk->status_completion_producer_index)
2057 goto failed;
2058
2059 }
2060 return 0;
2061
2062 failed:
2063 printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
2064 dev->netdev->name);
2065 return -EBUSY;
2066 }
2067
2068 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
2069 {
2070 struct cnic_local *cp = dev->cnic_priv;
2071 struct cnic_eth_dev *ethdev = cp->ethdev;
2072
2073 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2074 return;
2075
2076 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2077 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2078 }
2079
2080 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
2081 {
2082 struct cnic_local *cp = dev->cnic_priv;
2083 struct cnic_eth_dev *ethdev = cp->ethdev;
2084
2085 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2086 return;
2087
2088 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2089 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
2090 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
2091 synchronize_irq(ethdev->irq_arr[0].vector);
2092 }
2093
2094 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
2095 {
2096 struct cnic_local *cp = dev->cnic_priv;
2097 struct cnic_eth_dev *ethdev = cp->ethdev;
2098 u32 cid_addr, tx_cid, sb_id;
2099 u32 val, offset0, offset1, offset2, offset3;
2100 int i;
2101 struct tx_bd *txbd;
2102 dma_addr_t buf_map;
2103 struct status_block *s_blk = cp->status_blk;
2104
2105 sb_id = cp->status_blk_num;
2106 tx_cid = 20;
2107 cnic_init_context(dev, tx_cid);
2108 cnic_init_context(dev, tx_cid + 1);
2109 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
2110 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
2111 struct status_block_msix *sblk = cp->status_blk;
2112
2113 tx_cid = TX_TSS_CID + sb_id - 1;
2114 cnic_init_context(dev, tx_cid);
2115 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
2116 (TX_TSS_CID << 7));
2117 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
2118 }
2119 cp->tx_cons = *cp->tx_cons_ptr;
2120
2121 cid_addr = GET_CID_ADDR(tx_cid);
2122 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
2123 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
2124
2125 for (i = 0; i < PHY_CTX_SIZE; i += 4)
2126 cnic_ctx_wr(dev, cid_addr2, i, 0);
2127
2128 offset0 = BNX2_L2CTX_TYPE_XI;
2129 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
2130 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
2131 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
2132 } else {
2133 offset0 = BNX2_L2CTX_TYPE;
2134 offset1 = BNX2_L2CTX_CMD_TYPE;
2135 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
2136 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
2137 }
2138 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
2139 cnic_ctx_wr(dev, cid_addr, offset0, val);
2140
2141 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
2142 cnic_ctx_wr(dev, cid_addr, offset1, val);
2143
2144 txbd = (struct tx_bd *) cp->l2_ring;
2145
2146 buf_map = cp->l2_buf_map;
2147 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
2148 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
2149 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
2150 }
2151 val = (u64) cp->l2_ring_map >> 32;
2152 cnic_ctx_wr(dev, cid_addr, offset2, val);
2153 txbd->tx_bd_haddr_hi = val;
2154
2155 val = (u64) cp->l2_ring_map & 0xffffffff;
2156 cnic_ctx_wr(dev, cid_addr, offset3, val);
2157 txbd->tx_bd_haddr_lo = val;
2158 }
2159
2160 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
2161 {
2162 struct cnic_local *cp = dev->cnic_priv;
2163 struct cnic_eth_dev *ethdev = cp->ethdev;
2164 u32 cid_addr, sb_id, val, coal_reg, coal_val;
2165 int i;
2166 struct rx_bd *rxbd;
2167 struct status_block *s_blk = cp->status_blk;
2168
2169 sb_id = cp->status_blk_num;
2170 cnic_init_context(dev, 2);
2171 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
2172 coal_reg = BNX2_HC_COMMAND;
2173 coal_val = CNIC_RD(dev, coal_reg);
2174 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
2175 struct status_block_msix *sblk = cp->status_blk;
2176
2177 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
2178 coal_reg = BNX2_HC_COALESCE_NOW;
2179 coal_val = 1 << (11 + sb_id);
2180 }
2181 i = 0;
2182 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
2183 CNIC_WR(dev, coal_reg, coal_val);
2184 udelay(10);
2185 i++;
2186 barrier();
2187 }
2188 cp->rx_cons = *cp->rx_cons_ptr;
2189
2190 cid_addr = GET_CID_ADDR(2);
2191 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
2192 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
2193 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
2194
2195 if (sb_id == 0)
2196 val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT;
2197 else
2198 val = BNX2_L2CTX_STATUSB_NUM(sb_id);
2199 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
2200
2201 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
2202 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
2203 dma_addr_t buf_map;
2204 int n = (i % cp->l2_rx_ring_size) + 1;
2205
2206 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
2207 rxbd->rx_bd_len = cp->l2_single_buf_size;
2208 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
2209 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
2210 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
2211 }
2212 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
2213 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
2214 rxbd->rx_bd_haddr_hi = val;
2215
2216 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
2217 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
2218 rxbd->rx_bd_haddr_lo = val;
2219
2220 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
2221 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
2222 }
2223
2224 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
2225 {
2226 struct kwqe *wqes[1], l2kwqe;
2227
2228 memset(&l2kwqe, 0, sizeof(l2kwqe));
2229 wqes[0] = &l2kwqe;
2230 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
2231 (L2_KWQE_OPCODE_VALUE_FLUSH <<
2232 KWQE_OPCODE_SHIFT) | 2;
2233 dev->submit_kwqes(dev, wqes, 1);
2234 }
2235
2236 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
2237 {
2238 struct cnic_local *cp = dev->cnic_priv;
2239 u32 val;
2240
2241 val = cp->func << 2;
2242
2243 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
2244
2245 val = cnic_reg_rd_ind(dev, cp->shmem_base +
2246 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
2247 dev->mac_addr[0] = (u8) (val >> 8);
2248 dev->mac_addr[1] = (u8) val;
2249
2250 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
2251
2252 val = cnic_reg_rd_ind(dev, cp->shmem_base +
2253 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
2254 dev->mac_addr[2] = (u8) (val >> 24);
2255 dev->mac_addr[3] = (u8) (val >> 16);
2256 dev->mac_addr[4] = (u8) (val >> 8);
2257 dev->mac_addr[5] = (u8) val;
2258
2259 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
2260
2261 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
2262 if (CHIP_NUM(cp) != CHIP_NUM_5709)
2263 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
2264
2265 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
2266 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
2267 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
2268 }
2269
2270 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
2271 {
2272 struct cnic_local *cp = dev->cnic_priv;
2273 struct cnic_eth_dev *ethdev = cp->ethdev;
2274 struct status_block *sblk = cp->status_blk;
2275 u32 val;
2276 int err;
2277
2278 cnic_set_bnx2_mac(dev);
2279
2280 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
2281 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
2282 if (BCM_PAGE_BITS > 12)
2283 val |= (12 - 8) << 4;
2284 else
2285 val |= (BCM_PAGE_BITS - 8) << 4;
2286
2287 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
2288
2289 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
2290 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
2291 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
2292
2293 err = cnic_setup_5709_context(dev, 1);
2294 if (err)
2295 return err;
2296
2297 cnic_init_context(dev, KWQ_CID);
2298 cnic_init_context(dev, KCQ_CID);
2299
2300 cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
2301 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
2302
2303 cp->max_kwq_idx = MAX_KWQ_IDX;
2304 cp->kwq_prod_idx = 0;
2305 cp->kwq_con_idx = 0;
2306 cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
2307
2308 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
2309 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
2310 else
2311 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
2312
2313 /* Initialize the kernel work queue context. */
2314 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
2315 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
2316 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
2317
2318 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
2319 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
2320
2321 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
2322 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
2323
2324 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
2325 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
2326
2327 val = (u32) cp->kwq_info.pgtbl_map;
2328 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
2329
2330 cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
2331 cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
2332
2333 cp->kcq_prod_idx = 0;
2334
2335 /* Initialize the kernel complete queue context. */
2336 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
2337 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
2338 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
2339
2340 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
2341 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
2342
2343 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
2344 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
2345
2346 val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
2347 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
2348
2349 val = (u32) cp->kcq_info.pgtbl_map;
2350 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
2351
2352 cp->int_num = 0;
2353 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
2354 u32 sb_id = cp->status_blk_num;
2355 u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id);
2356
2357 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
2358 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
2359 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
2360 }
2361
2362 /* Enable Commnad Scheduler notification when we write to the
2363 * host producer index of the kernel contexts. */
2364 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
2365
2366 /* Enable Command Scheduler notification when we write to either
2367 * the Send Queue or Receive Queue producer indexes of the kernel
2368 * bypass contexts. */
2369 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
2370 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
2371
2372 /* Notify COM when the driver post an application buffer. */
2373 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
2374
2375 /* Set the CP and COM doorbells. These two processors polls the
2376 * doorbell for a non zero value before running. This must be done
2377 * after setting up the kernel queue contexts. */
2378 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
2379 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
2380
2381 cnic_init_bnx2_tx_ring(dev);
2382 cnic_init_bnx2_rx_ring(dev);
2383
2384 err = cnic_init_bnx2_irq(dev);
2385 if (err) {
2386 printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
2387 dev->netdev->name);
2388 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
2389 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
2390 return err;
2391 }
2392
2393 return 0;
2394 }
2395
2396 static int cnic_start_hw(struct cnic_dev *dev)
2397 {
2398 struct cnic_local *cp = dev->cnic_priv;
2399 struct cnic_eth_dev *ethdev = cp->ethdev;
2400 int err;
2401
2402 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
2403 return -EALREADY;
2404
2405 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
2406 if (err) {
2407 printk(KERN_ERR PFX "%s: register_cnic failed\n",
2408 dev->netdev->name);
2409 goto err2;
2410 }
2411
2412 dev->regview = ethdev->io_base;
2413 cp->chip_id = ethdev->chip_id;
2414 pci_dev_get(dev->pcidev);
2415 cp->func = PCI_FUNC(dev->pcidev->devfn);
2416 cp->status_blk = ethdev->irq_arr[0].status_blk;
2417 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
2418
2419 err = cp->alloc_resc(dev);
2420 if (err) {
2421 printk(KERN_ERR PFX "%s: allocate resource failure\n",
2422 dev->netdev->name);
2423 goto err1;
2424 }
2425
2426 err = cp->start_hw(dev);
2427 if (err)
2428 goto err1;
2429
2430 err = cnic_cm_open(dev);
2431 if (err)
2432 goto err1;
2433
2434 set_bit(CNIC_F_CNIC_UP, &dev->flags);
2435
2436 cp->enable_int(dev);
2437
2438 return 0;
2439
2440 err1:
2441 ethdev->drv_unregister_cnic(dev->netdev);
2442 cp->free_resc(dev);
2443 pci_dev_put(dev->pcidev);
2444 err2:
2445 return err;
2446 }
2447
2448 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
2449 {
2450 struct cnic_local *cp = dev->cnic_priv;
2451 struct cnic_eth_dev *ethdev = cp->ethdev;
2452
2453 cnic_disable_bnx2_int_sync(dev);
2454
2455 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
2456 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
2457
2458 cnic_init_context(dev, KWQ_CID);
2459 cnic_init_context(dev, KCQ_CID);
2460
2461 cnic_setup_5709_context(dev, 0);
2462 cnic_free_irq(dev);
2463
2464 ethdev->drv_unregister_cnic(dev->netdev);
2465
2466 cnic_free_resc(dev);
2467 }
2468
2469 static void cnic_stop_hw(struct cnic_dev *dev)
2470 {
2471 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
2472 struct cnic_local *cp = dev->cnic_priv;
2473
2474 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
2475 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
2476 synchronize_rcu();
2477 cnic_cm_shutdown(dev);
2478 cp->stop_hw(dev);
2479 pci_dev_put(dev->pcidev);
2480 }
2481 }
2482
2483 static void cnic_free_dev(struct cnic_dev *dev)
2484 {
2485 int i = 0;
2486
2487 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
2488 msleep(100);
2489 i++;
2490 }
2491 if (atomic_read(&dev->ref_count) != 0)
2492 printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
2493 " to zero.\n", dev->netdev->name);
2494
2495 printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
2496 dev_put(dev->netdev);
2497 kfree(dev);
2498 }
2499
2500 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
2501 struct pci_dev *pdev)
2502 {
2503 struct cnic_dev *cdev;
2504 struct cnic_local *cp;
2505 int alloc_size;
2506
2507 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
2508
2509 cdev = kzalloc(alloc_size , GFP_KERNEL);
2510 if (cdev == NULL) {
2511 printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
2512 dev->name);
2513 return NULL;
2514 }
2515
2516 cdev->netdev = dev;
2517 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
2518 cdev->register_device = cnic_register_device;
2519 cdev->unregister_device = cnic_unregister_device;
2520 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
2521
2522 cp = cdev->cnic_priv;
2523 cp->dev = cdev;
2524 cp->uio_dev = -1;
2525 cp->l2_single_buf_size = 0x400;
2526 cp->l2_rx_ring_size = 3;
2527
2528 spin_lock_init(&cp->cnic_ulp_lock);
2529
2530 printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
2531
2532 return cdev;
2533 }
2534
2535 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
2536 {
2537 struct pci_dev *pdev;
2538 struct cnic_dev *cdev;
2539 struct cnic_local *cp;
2540 struct cnic_eth_dev *ethdev = NULL;
2541 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
2542
2543 probe = symbol_get(bnx2_cnic_probe);
2544 if (probe) {
2545 ethdev = (*probe)(dev);
2546 symbol_put_addr(probe);
2547 }
2548 if (!ethdev)
2549 return NULL;
2550
2551 pdev = ethdev->pdev;
2552 if (!pdev)
2553 return NULL;
2554
2555 dev_hold(dev);
2556 pci_dev_get(pdev);
2557 if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
2558 pdev->device == PCI_DEVICE_ID_NX2_5709S) {
2559 u8 rev;
2560
2561 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
2562 if (rev < 0x10) {
2563 pci_dev_put(pdev);
2564 goto cnic_err;
2565 }
2566 }
2567 pci_dev_put(pdev);
2568
2569 cdev = cnic_alloc_dev(dev, pdev);
2570 if (cdev == NULL)
2571 goto cnic_err;
2572
2573 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
2574 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
2575
2576 cp = cdev->cnic_priv;
2577 cp->ethdev = ethdev;
2578 cdev->pcidev = pdev;
2579
2580 cp->cnic_ops = &cnic_bnx2_ops;
2581 cp->start_hw = cnic_start_bnx2_hw;
2582 cp->stop_hw = cnic_stop_bnx2_hw;
2583 cp->setup_pgtbl = cnic_setup_page_tbl;
2584 cp->alloc_resc = cnic_alloc_bnx2_resc;
2585 cp->free_resc = cnic_free_resc;
2586 cp->start_cm = cnic_cm_init_bnx2_hw;
2587 cp->stop_cm = cnic_cm_stop_bnx2_hw;
2588 cp->enable_int = cnic_enable_bnx2_int;
2589 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
2590 cp->close_conn = cnic_close_bnx2_conn;
2591 cp->next_idx = cnic_bnx2_next_idx;
2592 cp->hw_idx = cnic_bnx2_hw_idx;
2593 return cdev;
2594
2595 cnic_err:
2596 dev_put(dev);
2597 return NULL;
2598 }
2599
2600 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
2601 {
2602 struct ethtool_drvinfo drvinfo;
2603 struct cnic_dev *cdev = NULL;
2604
2605 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
2606 memset(&drvinfo, 0, sizeof(drvinfo));
2607 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
2608
2609 if (!strcmp(drvinfo.driver, "bnx2"))
2610 cdev = init_bnx2_cnic(dev);
2611 if (cdev) {
2612 write_lock(&cnic_dev_lock);
2613 list_add(&cdev->list, &cnic_dev_list);
2614 write_unlock(&cnic_dev_lock);
2615 }
2616 }
2617 return cdev;
2618 }
2619
2620 /**
2621 * netdev event handler
2622 */
2623 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
2624 void *ptr)
2625 {
2626 struct net_device *netdev = ptr;
2627 struct cnic_dev *dev;
2628 int if_type;
2629 int new_dev = 0;
2630
2631 dev = cnic_from_netdev(netdev);
2632
2633 if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
2634 /* Check for the hot-plug device */
2635 dev = is_cnic_dev(netdev);
2636 if (dev) {
2637 new_dev = 1;
2638 cnic_hold(dev);
2639 }
2640 }
2641 if (dev) {
2642 struct cnic_local *cp = dev->cnic_priv;
2643
2644 if (new_dev)
2645 cnic_ulp_init(dev);
2646 else if (event == NETDEV_UNREGISTER)
2647 cnic_ulp_exit(dev);
2648 else if (event == NETDEV_UP) {
2649 mutex_lock(&cnic_lock);
2650 if (!cnic_start_hw(dev))
2651 cnic_ulp_start(dev);
2652 mutex_unlock(&cnic_lock);
2653 }
2654
2655 rcu_read_lock();
2656 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2657 struct cnic_ulp_ops *ulp_ops;
2658 void *ctx;
2659
2660 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
2661 if (!ulp_ops || !ulp_ops->indicate_netevent)
2662 continue;
2663
2664 ctx = cp->ulp_handle[if_type];
2665
2666 ulp_ops->indicate_netevent(ctx, event);
2667 }
2668 rcu_read_unlock();
2669
2670 if (event == NETDEV_GOING_DOWN) {
2671 mutex_lock(&cnic_lock);
2672 cnic_ulp_stop(dev);
2673 cnic_stop_hw(dev);
2674 mutex_unlock(&cnic_lock);
2675 } else if (event == NETDEV_UNREGISTER) {
2676 write_lock(&cnic_dev_lock);
2677 list_del_init(&dev->list);
2678 write_unlock(&cnic_dev_lock);
2679
2680 cnic_put(dev);
2681 cnic_free_dev(dev);
2682 goto done;
2683 }
2684 cnic_put(dev);
2685 }
2686 done:
2687 return NOTIFY_DONE;
2688 }
2689
2690 static struct notifier_block cnic_netdev_notifier = {
2691 .notifier_call = cnic_netdev_event
2692 };
2693
2694 static void cnic_release(void)
2695 {
2696 struct cnic_dev *dev;
2697
2698 while (!list_empty(&cnic_dev_list)) {
2699 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
2700 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
2701 cnic_ulp_stop(dev);
2702 cnic_stop_hw(dev);
2703 }
2704
2705 cnic_ulp_exit(dev);
2706 list_del_init(&dev->list);
2707 cnic_free_dev(dev);
2708 }
2709 }
2710
2711 static int __init cnic_init(void)
2712 {
2713 int rc = 0;
2714
2715 printk(KERN_INFO "%s", version);
2716
2717 rc = register_netdevice_notifier(&cnic_netdev_notifier);
2718 if (rc) {
2719 cnic_release();
2720 return rc;
2721 }
2722
2723 return 0;
2724 }
2725
2726 static void __exit cnic_exit(void)
2727 {
2728 unregister_netdevice_notifier(&cnic_netdev_notifier);
2729 cnic_release();
2730 return;
2731 }
2732
2733 module_init(cnic_init);
2734 module_exit(cnic_exit);
Linux with added FPC-III support