drivers/net/sfc/xfp_phy.c

   1 /****************************************************************************
   2  * Driver for Solarflare Solarstorm network controllers and boards
   3  * Copyright 2006-2008 Solarflare Communications Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published
   7  * by the Free Software Foundation, incorporated herein by reference.
   8  */
   9 /*
  10  * Driver for SFP+ and XFP optical PHYs plus some support specific to the
  11  * AMCC QT20xx adapters; see www.amcc.com for details
  12  */
  13
  14 #include <linux/timer.h>
  15 #include <linux/delay.h>
  16 #include "efx.h"
  17 #include "mdio_10g.h"
  18 #include "phy.h"
  19 #include "falcon.h"
  20
  21 #define XFP_REQUIRED_DEVS (MDIO_DEVS_PCS |      \
  22                            MDIO_DEVS_PMAPMD |   \
  23                            MDIO_DEVS_PHYXS)
  24
  25 #define XFP_LOOPBACKS ((1 << LOOPBACK_PCS) |            \
  26                        (1 << LOOPBACK_PMAPMD) |         \
  27                        (1 << LOOPBACK_NETWORK))
  28
  29 /****************************************************************************/
  30 /* Quake-specific MDIO registers */
  31 #define MDIO_QUAKE_LED0_REG     (0xD006)
  32
  33 /* QT2025C only */
  34 #define PCS_FW_HEARTBEAT_REG    0xd7ee
  35 #define PCS_FW_HEARTB_LBN       0
  36 #define PCS_FW_HEARTB_WIDTH     8
  37 #define PCS_UC8051_STATUS_REG   0xd7fd
  38 #define PCS_UC_STATUS_LBN       0
  39 #define PCS_UC_STATUS_WIDTH     8
  40 #define PCS_UC_STATUS_FW_SAVE   0x20
  41 #define PMA_PMD_FTX_CTRL2_REG   0xc309
  42 #define PMA_PMD_FTX_STATIC_LBN  13
  43 #define PMA_PMD_VEND1_REG       0xc001
  44 #define PMA_PMD_VEND1_LBTXD_LBN 15
  45 #define PCS_VEND1_REG           0xc000
  46 #define PCS_VEND1_LBTXD_LBN     5
  47
  48 void xfp_set_led(struct efx_nic *p, int led, int mode)
  49 {
  50         int addr = MDIO_QUAKE_LED0_REG + led;
  51         efx_mdio_write(p, MDIO_MMD_PMAPMD, addr, mode);
  52 }
  53
  54 struct xfp_phy_data {
  55         enum efx_phy_mode phy_mode;
  56 };
  57
  58 #define XFP_MAX_RESET_TIME 500
  59 #define XFP_RESET_WAIT 10
  60
  61 static int qt2025c_wait_reset(struct efx_nic *efx)
  62 {
  63         unsigned long timeout = jiffies + 10 * HZ;
  64         int reg, old_counter = 0;
  65
  66         /* Wait for firmware heartbeat to start */
  67         for (;;) {
  68                 int counter;
  69                 reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_FW_HEARTBEAT_REG);
  70                 if (reg < 0)
  71                         return reg;
  72                 counter = ((reg >> PCS_FW_HEARTB_LBN) &
  73                             ((1 << PCS_FW_HEARTB_WIDTH) - 1));
  74                 if (old_counter == 0)
  75                         old_counter = counter;
  76                 else if (counter != old_counter)
  77                         break;
  78                 if (time_after(jiffies, timeout))
  79                         return -ETIMEDOUT;
  80                 msleep(10);
  81         }
  82
  83         /* Wait for firmware status to look good */
  84         for (;;) {
  85                 reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_UC8051_STATUS_REG);
  86                 if (reg < 0)
  87                         return reg;
  88                 if ((reg &
  89                      ((1 << PCS_UC_STATUS_WIDTH) - 1) << PCS_UC_STATUS_LBN) >=
  90                     PCS_UC_STATUS_FW_SAVE)
  91                         break;
  92                 if (time_after(jiffies, timeout))
  93                         return -ETIMEDOUT;
  94                 msleep(100);
  95         }
  96
  97         return 0;
  98 }
  99
 100 /* Reset the PHYXS MMD. This is documented (for the Quake PHYs) as doing
 101  * a complete soft reset.
 102  */
 103 static int xfp_reset_phy(struct efx_nic *efx)
 104 {
 105         int rc;
 106
 107         rc = efx_mdio_reset_mmd(efx, MDIO_MMD_PHYXS,
 108                                 XFP_MAX_RESET_TIME / XFP_RESET_WAIT,
 109                                 XFP_RESET_WAIT);
 110         if (rc < 0)
 111                 goto fail;
 112
 113         if (efx->phy_type == PHY_TYPE_QT2025C) {
 114                 rc = qt2025c_wait_reset(efx);
 115                 if (rc < 0)
 116                         goto fail;
 117         }
 118
 119         /* Wait 250ms for the PHY to complete bootup */
 120         msleep(250);
 121
 122         /* Check that all the MMDs we expect are present and responding. We
 123          * expect faults on some if the link is down, but not on the PHY XS */
 124         rc = efx_mdio_check_mmds(efx, XFP_REQUIRED_DEVS, MDIO_DEVS_PHYXS);
 125         if (rc < 0)
 126                 goto fail;
 127
 128         efx->board_info.init_leds(efx);
 129
 130         return rc;
 131
 132  fail:
 133         EFX_ERR(efx, "PHY reset timed out\n");
 134         return rc;
 135 }
 136
 137 static int xfp_phy_init(struct efx_nic *efx)
 138 {
 139         struct xfp_phy_data *phy_data;
 140         u32 devid = efx_mdio_read_id(efx, MDIO_MMD_PHYXS);
 141         int rc;
 142
 143         phy_data = kzalloc(sizeof(struct xfp_phy_data), GFP_KERNEL);
 144         if (!phy_data)
 145                 return -ENOMEM;
 146         efx->phy_data = phy_data;
 147
 148         EFX_INFO(efx, "PHY ID reg %x (OUI %06x model %02x revision %x)\n",
 149                  devid, efx_mdio_id_oui(devid), efx_mdio_id_model(devid),
 150                  efx_mdio_id_rev(devid));
 151
 152         phy_data->phy_mode = efx->phy_mode;
 153
 154         rc = xfp_reset_phy(efx);
 155
 156         EFX_INFO(efx, "PHY init %s.\n",
 157                  rc ? "failed" : "successful");
 158         if (rc < 0)
 159                 goto fail;
 160
 161         return 0;
 162
 163  fail:
 164         kfree(efx->phy_data);
 165         efx->phy_data = NULL;
 166         return rc;
 167 }
 168
 169 static void xfp_phy_clear_interrupt(struct efx_nic *efx)
 170 {
 171         /* Read to clear link status alarm */
 172         efx_mdio_read(efx, MDIO_MMD_PMAPMD, MDIO_PMA_LASI_STAT);
 173 }
 174
 175 static int xfp_link_ok(struct efx_nic *efx)
 176 {
 177         return efx_mdio_links_ok(efx, XFP_REQUIRED_DEVS);
 178 }
 179
 180 static void xfp_phy_poll(struct efx_nic *efx)
 181 {
 182         int link_up = xfp_link_ok(efx);
 183         /* Simulate a PHY event if link state has changed */
 184         if (link_up != efx->link_up)
 185                 falcon_sim_phy_event(efx);
 186 }
 187
 188 static void xfp_phy_reconfigure(struct efx_nic *efx)
 189 {
 190         struct xfp_phy_data *phy_data = efx->phy_data;
 191
 192         if (efx->phy_type == PHY_TYPE_QT2025C) {
 193                 /* There are several different register bits which can
 194                  * disable TX (and save power) on direct-attach cables
 195                  * or optical transceivers, varying somewhat between
 196                  * firmware versions.  Only 'static mode' appears to
 197                  * cover everything. */
 198                 mdio_set_flag(
 199                         &efx->mdio, efx->mdio.prtad, MDIO_MMD_PMAPMD,
 200                         PMA_PMD_FTX_CTRL2_REG, 1 << PMA_PMD_FTX_STATIC_LBN,
 201                         efx->phy_mode & PHY_MODE_TX_DISABLED ||
 202                         efx->phy_mode & PHY_MODE_LOW_POWER ||
 203                         efx->loopback_mode == LOOPBACK_PCS ||
 204                         efx->loopback_mode == LOOPBACK_PMAPMD);
 205         } else {
 206                 /* Reset the PHY when moving from tx off to tx on */
 207                 if (!(efx->phy_mode & PHY_MODE_TX_DISABLED) &&
 208                     (phy_data->phy_mode & PHY_MODE_TX_DISABLED))
 209                         xfp_reset_phy(efx);
 210
 211                 efx_mdio_transmit_disable(efx);
 212         }
 213
 214         efx_mdio_phy_reconfigure(efx);
 215
 216         phy_data->phy_mode = efx->phy_mode;
 217         efx->link_up = xfp_link_ok(efx);
 218         efx->link_speed = 10000;
 219         efx->link_fd = true;
 220         efx->link_fc = efx->wanted_fc;
 221 }
 222
 223 static void xfp_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
 224 {
 225         mdio45_ethtool_gset(&efx->mdio, ecmd);
 226 }
 227
 228 static void xfp_phy_fini(struct efx_nic *efx)
 229 {
 230         /* Clobber the LED if it was blinking */
 231         efx->board_info.blink(efx, false);
 232
 233         /* Free the context block */
 234         kfree(efx->phy_data);
 235         efx->phy_data = NULL;
 236 }
 237
 238 struct efx_phy_operations falcon_xfp_phy_ops = {
 239         .macs            = EFX_XMAC,
 240         .init            = xfp_phy_init,
 241         .reconfigure     = xfp_phy_reconfigure,
 242         .poll            = xfp_phy_poll,
 243         .fini            = xfp_phy_fini,
 244         .clear_interrupt = xfp_phy_clear_interrupt,
 245         .get_settings    = xfp_phy_get_settings,
 246         .set_settings    = efx_mdio_set_settings,
 247         .mmds            = XFP_REQUIRED_DEVS,
 248         .loopbacks       = XFP_LOOPBACKS,
 249 };