2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: Implement functions to access baseband
29 * BBuGetFrameTime - Calculate data frame transmitting time
30 * BBvCaculateParameter - Caculate PhyLength, PhyService and Phy Signal
31 * parameter for baseband Tx
32 * BBbReadEmbedded - Embedded read baseband register via MAC
33 * BBbWriteEmbedded - Embedded write baseband register via MAC
34 * BBbVT3253Init - VIA VT3253 baseband chip init code
37 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
38 * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support.
39 * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and
40 * BBvCalculateParameter().
41 * cancel the setting of MAC_REG_SOFTPWRCTL on
44 * 09-01-2003 Bryan YC Fan: RF & BB tables updated.
45 * Modified BBvLoopbackOn & BBvLoopbackOff().
56 /*--------------------- Static Classes ----------------------------*/
58 /*--------------------- Static Variables --------------------------*/
60 /*--------------------- Static Functions --------------------------*/
62 /*--------------------- Export Variables --------------------------*/
64 /*--------------------- Static Definitions -------------------------*/
66 /*--------------------- Static Classes ----------------------------*/
68 /*--------------------- Static Variables --------------------------*/
70 #define CB_VT3253_INIT_FOR_RFMD 446
71 static const unsigned char byVT3253InitTab_RFMD
[CB_VT3253_INIT_FOR_RFMD
][2] = {
520 #define CB_VT3253B0_INIT_FOR_RFMD 256
521 static const unsigned char byVT3253B0_RFMD
[CB_VT3253B0_INIT_FOR_RFMD
][2] = {
780 #define CB_VT3253B0_AGC_FOR_RFMD2959 195
783 unsigned char byVT3253B0_AGC4_RFMD2959
[CB_VT3253B0_AGC_FOR_RFMD2959
][2] = {
981 #define CB_VT3253B0_INIT_FOR_AIROHA2230 256
984 unsigned char byVT3253B0_AIROHA2230
[CB_VT3253B0_INIT_FOR_AIROHA2230
][2] = {
1093 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1243 #define CB_VT3253B0_INIT_FOR_UW2451 256
1245 static unsigned char byVT3253B0_UW2451
[CB_VT3253B0_INIT_FOR_UW2451
][2] = {
1354 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1504 #define CB_VT3253B0_AGC 193
1506 static unsigned char byVT3253B0_AGC
[CB_VT3253B0_AGC
][2] = {
1702 static const unsigned short awcFrameTime
[MAX_RATE
] = {
1703 10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216
1706 /*--------------------- Export Variables --------------------------*/
1708 * Description: Calculate data frame transmitting time
1712 * byPreambleType - Preamble Type
1713 * byPktType - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1714 * cbFrameLength - Baseband Type
1718 * Return Value: FrameTime
1723 unsigned char byPreambleType
,
1724 unsigned char byPktType
,
1725 unsigned int cbFrameLength
,
1726 unsigned short wRate
1729 unsigned int uFrameTime
;
1730 unsigned int uPreamble
;
1732 unsigned int uRateIdx
= (unsigned int)wRate
;
1733 unsigned int uRate
= 0;
1735 if (uRateIdx
> RATE_54M
)
1738 uRate
= (unsigned int)awcFrameTime
[uRateIdx
];
1740 if (uRateIdx
<= 3) { /* CCK mode */
1741 if (byPreambleType
== 1) /* Short */
1746 uFrameTime
= (cbFrameLength
* 80) / uRate
; /* ????? */
1747 uTmp
= (uFrameTime
* uRate
) / 80;
1748 if (cbFrameLength
!= uTmp
)
1751 return uPreamble
+ uFrameTime
;
1753 uFrameTime
= (cbFrameLength
* 8 + 22) / uRate
; /* ???????? */
1754 uTmp
= ((uFrameTime
* uRate
) - 22) / 8;
1755 if (cbFrameLength
!= uTmp
)
1758 uFrameTime
= uFrameTime
* 4; /* ??????? */
1759 if (byPktType
!= PK_TYPE_11A
)
1760 uFrameTime
+= 6; /* ?????? */
1762 return 20 + uFrameTime
; /* ?????? */
1766 * Description: Calculate Length, Service, and Signal fields of Phy for Tx
1770 * priv - Device Structure
1771 * frame_length - Tx Frame Length
1774 * struct vnt_phy_field *phy
1775 * - pointer to Phy Length field
1776 * - pointer to Phy Service field
1777 * - pointer to Phy Signal field
1779 * Return Value: none
1782 void vnt_get_phy_field(struct vnt_private
*priv
, u32 frame_length
,
1783 u16 tx_rate
, u8 pkt_type
, struct vnt_phy_field
*phy
)
1789 u8 preamble_type
= priv
->byPreambleType
;
1791 bit_count
= frame_length
* 8;
1802 count
= bit_count
/ 2;
1804 if (preamble_type
== 1)
1811 count
= (bit_count
* 10) / 55;
1812 tmp
= (count
* 55) / 10;
1814 if (tmp
!= bit_count
)
1817 if (preamble_type
== 1)
1824 count
= bit_count
/ 11;
1827 if (tmp
!= bit_count
) {
1830 if ((bit_count
- tmp
) <= 3)
1834 if (preamble_type
== 1)
1841 if (pkt_type
== PK_TYPE_11A
)
1848 if (pkt_type
== PK_TYPE_11A
)
1855 if (pkt_type
== PK_TYPE_11A
)
1862 if (pkt_type
== PK_TYPE_11A
)
1869 if (pkt_type
== PK_TYPE_11A
)
1876 if (pkt_type
== PK_TYPE_11A
)
1883 if (pkt_type
== PK_TYPE_11A
)
1890 if (pkt_type
== PK_TYPE_11A
)
1896 if (pkt_type
== PK_TYPE_11A
)
1903 if (pkt_type
== PK_TYPE_11B
) {
1904 phy
->service
= 0x00;
1906 phy
->service
|= 0x80;
1907 phy
->len
= cpu_to_le16((u16
)count
);
1909 phy
->service
= 0x00;
1910 phy
->len
= cpu_to_le16((u16
)frame_length
);
1915 * Description: Read a byte from BASEBAND, by embedded programming
1919 * dwIoBase - I/O base address
1920 * byBBAddr - address of register in Baseband
1922 * pbyData - data read
1924 * Return Value: true if succeeded; false if failed.
1927 bool BBbReadEmbedded(struct vnt_private
*priv
,
1928 unsigned char byBBAddr
, unsigned char *pbyData
)
1930 void __iomem
*dwIoBase
= priv
->PortOffset
;
1932 unsigned char byValue
;
1935 VNSvOutPortB(dwIoBase
+ MAC_REG_BBREGADR
, byBBAddr
);
1938 MACvRegBitsOn(dwIoBase
, MAC_REG_BBREGCTL
, BBREGCTL_REGR
);
1939 /* W_MAX_TIMEOUT is the timeout period */
1940 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
1941 VNSvInPortB(dwIoBase
+ MAC_REG_BBREGCTL
, &byValue
);
1942 if (byValue
& BBREGCTL_DONE
)
1947 VNSvInPortB(dwIoBase
+ MAC_REG_BBREGDATA
, pbyData
);
1949 if (ww
== W_MAX_TIMEOUT
) {
1950 pr_debug(" DBG_PORT80(0x30)\n");
1957 * Description: Write a Byte to BASEBAND, by embedded programming
1961 * dwIoBase - I/O base address
1962 * byBBAddr - address of register in Baseband
1963 * byData - data to write
1967 * Return Value: true if succeeded; false if failed.
1970 bool BBbWriteEmbedded(struct vnt_private
*priv
,
1971 unsigned char byBBAddr
, unsigned char byData
)
1973 void __iomem
*dwIoBase
= priv
->PortOffset
;
1975 unsigned char byValue
;
1978 VNSvOutPortB(dwIoBase
+ MAC_REG_BBREGADR
, byBBAddr
);
1980 VNSvOutPortB(dwIoBase
+ MAC_REG_BBREGDATA
, byData
);
1982 /* turn on BBREGCTL_REGW */
1983 MACvRegBitsOn(dwIoBase
, MAC_REG_BBREGCTL
, BBREGCTL_REGW
);
1984 /* W_MAX_TIMEOUT is the timeout period */
1985 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
1986 VNSvInPortB(dwIoBase
+ MAC_REG_BBREGCTL
, &byValue
);
1987 if (byValue
& BBREGCTL_DONE
)
1991 if (ww
== W_MAX_TIMEOUT
) {
1992 pr_debug(" DBG_PORT80(0x31)\n");
1999 * Description: VIA VT3253 Baseband chip init function
2003 * dwIoBase - I/O base address
2004 * byRevId - Revision ID
2005 * byRFType - RF type
2009 * Return Value: true if succeeded; false if failed.
2013 bool BBbVT3253Init(struct vnt_private
*priv
)
2015 bool bResult
= true;
2017 void __iomem
*dwIoBase
= priv
->PortOffset
;
2018 unsigned char byRFType
= priv
->byRFType
;
2019 unsigned char byLocalID
= priv
->byLocalID
;
2021 if (byRFType
== RF_RFMD2959
) {
2022 if (byLocalID
<= REV_ID_VT3253_A1
) {
2023 for (ii
= 0; ii
< CB_VT3253_INIT_FOR_RFMD
; ii
++)
2024 bResult
&= BBbWriteEmbedded(priv
,
2025 byVT3253InitTab_RFMD
[ii
][0],
2026 byVT3253InitTab_RFMD
[ii
][1]);
2029 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_RFMD
; ii
++)
2030 bResult
&= BBbWriteEmbedded(priv
,
2031 byVT3253B0_RFMD
[ii
][0],
2032 byVT3253B0_RFMD
[ii
][1]);
2034 for (ii
= 0; ii
< CB_VT3253B0_AGC_FOR_RFMD2959
; ii
++)
2035 bResult
&= BBbWriteEmbedded(priv
,
2036 byVT3253B0_AGC4_RFMD2959
[ii
][0],
2037 byVT3253B0_AGC4_RFMD2959
[ii
][1]);
2039 VNSvOutPortD(dwIoBase
+ MAC_REG_ITRTMSET
, 0x23);
2040 MACvRegBitsOn(dwIoBase
, MAC_REG_PAPEDELAY
, BIT(0));
2042 priv
->abyBBVGA
[0] = 0x18;
2043 priv
->abyBBVGA
[1] = 0x0A;
2044 priv
->abyBBVGA
[2] = 0x0;
2045 priv
->abyBBVGA
[3] = 0x0;
2046 priv
->ldBmThreshold
[0] = -70;
2047 priv
->ldBmThreshold
[1] = -50;
2048 priv
->ldBmThreshold
[2] = 0;
2049 priv
->ldBmThreshold
[3] = 0;
2050 } else if ((byRFType
== RF_AIROHA
) || (byRFType
== RF_AL2230S
)) {
2051 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_AIROHA2230
; ii
++)
2052 bResult
&= BBbWriteEmbedded(priv
,
2053 byVT3253B0_AIROHA2230
[ii
][0],
2054 byVT3253B0_AIROHA2230
[ii
][1]);
2056 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2057 bResult
&= BBbWriteEmbedded(priv
,
2058 byVT3253B0_AGC
[ii
][0], byVT3253B0_AGC
[ii
][1]);
2060 priv
->abyBBVGA
[0] = 0x1C;
2061 priv
->abyBBVGA
[1] = 0x10;
2062 priv
->abyBBVGA
[2] = 0x0;
2063 priv
->abyBBVGA
[3] = 0x0;
2064 priv
->ldBmThreshold
[0] = -70;
2065 priv
->ldBmThreshold
[1] = -48;
2066 priv
->ldBmThreshold
[2] = 0;
2067 priv
->ldBmThreshold
[3] = 0;
2068 } else if (byRFType
== RF_UW2451
) {
2069 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_UW2451
; ii
++)
2070 bResult
&= BBbWriteEmbedded(priv
,
2071 byVT3253B0_UW2451
[ii
][0],
2072 byVT3253B0_UW2451
[ii
][1]);
2074 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2075 bResult
&= BBbWriteEmbedded(priv
,
2076 byVT3253B0_AGC
[ii
][0],
2077 byVT3253B0_AGC
[ii
][1]);
2079 VNSvOutPortB(dwIoBase
+ MAC_REG_ITRTMSET
, 0x23);
2080 MACvRegBitsOn(dwIoBase
, MAC_REG_PAPEDELAY
, BIT(0));
2082 priv
->abyBBVGA
[0] = 0x14;
2083 priv
->abyBBVGA
[1] = 0x0A;
2084 priv
->abyBBVGA
[2] = 0x0;
2085 priv
->abyBBVGA
[3] = 0x0;
2086 priv
->ldBmThreshold
[0] = -60;
2087 priv
->ldBmThreshold
[1] = -50;
2088 priv
->ldBmThreshold
[2] = 0;
2089 priv
->ldBmThreshold
[3] = 0;
2090 } else if (byRFType
== RF_UW2452
) {
2091 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_UW2451
; ii
++)
2092 bResult
&= BBbWriteEmbedded(priv
,
2093 byVT3253B0_UW2451
[ii
][0],
2094 byVT3253B0_UW2451
[ii
][1]);
2096 /* Init ANT B select,
2097 * TX Config CR09 = 0x61->0x45,
2098 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2101 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
2103 /* Init ANT B select,
2104 * RX Config CR10 = 0x28->0x2A,
2105 * 0x2A->0x28(VC1/VC2 define,
2106 * make the ANT_A, ANT_B inverted)
2109 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
2110 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2111 bResult
&= BBbWriteEmbedded(priv
, 0xd7, 0x06);
2113 /* {{RobertYu:20050125, request by Jack */
2114 bResult
&= BBbWriteEmbedded(priv
, 0x90, 0x20);
2115 bResult
&= BBbWriteEmbedded(priv
, 0x97, 0xeb);
2118 /* {{RobertYu:20050221, request by Jack */
2119 bResult
&= BBbWriteEmbedded(priv
, 0xa6, 0x00);
2120 bResult
&= BBbWriteEmbedded(priv
, 0xa8, 0x30);
2122 bResult
&= BBbWriteEmbedded(priv
, 0xb0, 0x58);
2124 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2125 bResult
&= BBbWriteEmbedded(priv
,
2126 byVT3253B0_AGC
[ii
][0], byVT3253B0_AGC
[ii
][1]);
2128 priv
->abyBBVGA
[0] = 0x14;
2129 priv
->abyBBVGA
[1] = 0x0A;
2130 priv
->abyBBVGA
[2] = 0x0;
2131 priv
->abyBBVGA
[3] = 0x0;
2132 priv
->ldBmThreshold
[0] = -60;
2133 priv
->ldBmThreshold
[1] = -50;
2134 priv
->ldBmThreshold
[2] = 0;
2135 priv
->ldBmThreshold
[3] = 0;
2138 } else if (byRFType
== RF_VT3226
) {
2139 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_AIROHA2230
; ii
++)
2140 bResult
&= BBbWriteEmbedded(priv
,
2141 byVT3253B0_AIROHA2230
[ii
][0],
2142 byVT3253B0_AIROHA2230
[ii
][1]);
2144 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2145 bResult
&= BBbWriteEmbedded(priv
,
2146 byVT3253B0_AGC
[ii
][0], byVT3253B0_AGC
[ii
][1]);
2148 priv
->abyBBVGA
[0] = 0x1C;
2149 priv
->abyBBVGA
[1] = 0x10;
2150 priv
->abyBBVGA
[2] = 0x0;
2151 priv
->abyBBVGA
[3] = 0x0;
2152 priv
->ldBmThreshold
[0] = -70;
2153 priv
->ldBmThreshold
[1] = -48;
2154 priv
->ldBmThreshold
[2] = 0;
2155 priv
->ldBmThreshold
[3] = 0;
2156 /* Fix VT3226 DFC system timing issue */
2157 MACvSetRFLE_LatchBase(dwIoBase
);
2158 /* {{ RobertYu: 20050104 */
2159 } else if (byRFType
== RF_AIROHA7230
) {
2160 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_AIROHA2230
; ii
++)
2161 bResult
&= BBbWriteEmbedded(priv
,
2162 byVT3253B0_AIROHA2230
[ii
][0],
2163 byVT3253B0_AIROHA2230
[ii
][1]);
2166 /* {{ RobertYu:20050223, request by JerryChung */
2167 /* Init ANT B select,TX Config CR09 = 0x61->0x45,
2168 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2170 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
2171 /* Init ANT B select,RX Config CR10 = 0x28->0x2A,
2172 * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2174 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
2175 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2176 bResult
&= BBbWriteEmbedded(priv
, 0xd7, 0x06);
2179 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2180 bResult
&= BBbWriteEmbedded(priv
,
2181 byVT3253B0_AGC
[ii
][0], byVT3253B0_AGC
[ii
][1]);
2183 priv
->abyBBVGA
[0] = 0x1C;
2184 priv
->abyBBVGA
[1] = 0x10;
2185 priv
->abyBBVGA
[2] = 0x0;
2186 priv
->abyBBVGA
[3] = 0x0;
2187 priv
->ldBmThreshold
[0] = -70;
2188 priv
->ldBmThreshold
[1] = -48;
2189 priv
->ldBmThreshold
[2] = 0;
2190 priv
->ldBmThreshold
[3] = 0;
2193 /* No VGA Table now */
2194 priv
->bUpdateBBVGA
= false;
2195 priv
->abyBBVGA
[0] = 0x1C;
2198 if (byLocalID
> REV_ID_VT3253_A1
) {
2199 BBbWriteEmbedded(priv
, 0x04, 0x7F);
2200 BBbWriteEmbedded(priv
, 0x0D, 0x01);
2207 * Description: Set ShortSlotTime mode
2211 * priv - Device Structure
2215 * Return Value: none
2219 BBvSetShortSlotTime(struct vnt_private
*priv
)
2221 unsigned char byBBRxConf
= 0;
2222 unsigned char byBBVGA
= 0;
2224 BBbReadEmbedded(priv
, 0x0A, &byBBRxConf
); /* CR10 */
2226 if (priv
->bShortSlotTime
)
2227 byBBRxConf
&= 0xDF; /* 1101 1111 */
2229 byBBRxConf
|= 0x20; /* 0010 0000 */
2231 /* patch for 3253B0 Baseband with Cardbus module */
2232 BBbReadEmbedded(priv
, 0xE7, &byBBVGA
);
2233 if (byBBVGA
== priv
->abyBBVGA
[0])
2234 byBBRxConf
|= 0x20; /* 0010 0000 */
2236 BBbWriteEmbedded(priv
, 0x0A, byBBRxConf
); /* CR10 */
2239 void BBvSetVGAGainOffset(struct vnt_private
*priv
, unsigned char byData
)
2241 unsigned char byBBRxConf
= 0;
2243 BBbWriteEmbedded(priv
, 0xE7, byData
);
2245 BBbReadEmbedded(priv
, 0x0A, &byBBRxConf
); /* CR10 */
2246 /* patch for 3253B0 Baseband with Cardbus module */
2247 if (byData
== priv
->abyBBVGA
[0])
2248 byBBRxConf
|= 0x20; /* 0010 0000 */
2249 else if (priv
->bShortSlotTime
)
2250 byBBRxConf
&= 0xDF; /* 1101 1111 */
2252 byBBRxConf
|= 0x20; /* 0010 0000 */
2253 priv
->byBBVGACurrent
= byData
;
2254 BBbWriteEmbedded(priv
, 0x0A, byBBRxConf
); /* CR10 */
2258 * Description: Baseband SoftwareReset
2262 * dwIoBase - I/O base address
2266 * Return Value: none
2270 BBvSoftwareReset(struct vnt_private
*priv
)
2272 BBbWriteEmbedded(priv
, 0x50, 0x40);
2273 BBbWriteEmbedded(priv
, 0x50, 0);
2274 BBbWriteEmbedded(priv
, 0x9C, 0x01);
2275 BBbWriteEmbedded(priv
, 0x9C, 0);
2279 * Description: Baseband Power Save Mode ON
2283 * dwIoBase - I/O base address
2287 * Return Value: none
2291 BBvPowerSaveModeON(struct vnt_private
*priv
)
2293 unsigned char byOrgData
;
2295 BBbReadEmbedded(priv
, 0x0D, &byOrgData
);
2296 byOrgData
|= BIT(0);
2297 BBbWriteEmbedded(priv
, 0x0D, byOrgData
);
2301 * Description: Baseband Power Save Mode OFF
2305 * dwIoBase - I/O base address
2309 * Return Value: none
2313 BBvPowerSaveModeOFF(struct vnt_private
*priv
)
2315 unsigned char byOrgData
;
2317 BBbReadEmbedded(priv
, 0x0D, &byOrgData
);
2318 byOrgData
&= ~(BIT(0));
2319 BBbWriteEmbedded(priv
, 0x0D, byOrgData
);
2323 * Description: Set Tx Antenna mode
2327 * priv - Device Structure
2328 * byAntennaMode - Antenna Mode
2332 * Return Value: none
2337 BBvSetTxAntennaMode(struct vnt_private
*priv
, unsigned char byAntennaMode
)
2339 unsigned char byBBTxConf
;
2341 BBbReadEmbedded(priv
, 0x09, &byBBTxConf
); /* CR09 */
2342 if (byAntennaMode
== ANT_DIVERSITY
) {
2343 /* bit 1 is diversity */
2345 } else if (byAntennaMode
== ANT_A
) {
2346 /* bit 2 is ANTSEL */
2347 byBBTxConf
&= 0xF9; /* 1111 1001 */
2348 } else if (byAntennaMode
== ANT_B
) {
2349 byBBTxConf
&= 0xFD; /* 1111 1101 */
2352 BBbWriteEmbedded(priv
, 0x09, byBBTxConf
); /* CR09 */
2356 * Description: Set Rx Antenna mode
2360 * priv - Device Structure
2361 * byAntennaMode - Antenna Mode
2365 * Return Value: none
2370 BBvSetRxAntennaMode(struct vnt_private
*priv
, unsigned char byAntennaMode
)
2372 unsigned char byBBRxConf
;
2374 BBbReadEmbedded(priv
, 0x0A, &byBBRxConf
); /* CR10 */
2375 if (byAntennaMode
== ANT_DIVERSITY
) {
2378 } else if (byAntennaMode
== ANT_A
) {
2379 byBBRxConf
&= 0xFC; /* 1111 1100 */
2380 } else if (byAntennaMode
== ANT_B
) {
2381 byBBRxConf
&= 0xFE; /* 1111 1110 */
2384 BBbWriteEmbedded(priv
, 0x0A, byBBRxConf
); /* CR10 */
2388 * Description: BBvSetDeepSleep
2392 * priv - Device Structure
2396 * Return Value: none
2400 BBvSetDeepSleep(struct vnt_private
*priv
, unsigned char byLocalID
)
2402 BBbWriteEmbedded(priv
, 0x0C, 0x17); /* CR12 */
2403 BBbWriteEmbedded(priv
, 0x0D, 0xB9); /* CR13 */
2407 BBvExitDeepSleep(struct vnt_private
*priv
, unsigned char byLocalID
)
2409 BBbWriteEmbedded(priv
, 0x0C, 0x00); /* CR12 */
2410 BBbWriteEmbedded(priv
, 0x0D, 0x01); /* CR13 */