drivers/staging/vt6655/mac.c

   1 /*
   2  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  *
  20  * File: mac.c
  21  *
  22  * Purpose:  MAC routines
  23  *
  24  * Author: Tevin Chen
  25  *
  26  * Date: May 21, 1996
  27  *
  28  * Functions:
  29  *      MACbIsRegBitsOn - Test if All test Bits On
  30  *      MACbIsRegBitsOff - Test if All test Bits Off
  31  *      MACbIsIntDisable - Test if MAC interrupt disable
  32  *      MACvSetShortRetryLimit - Set 802.11 Short Retry limit
  33  *      MACvSetLongRetryLimit - Set 802.11 Long Retry limit
  34  *      MACvSetLoopbackMode - Set MAC Loopback Mode
  35  *      MACvSaveContext - Save Context of MAC Registers
  36  *      MACvRestoreContext - Restore Context of MAC Registers
  37  *      MACbSoftwareReset - Software Reset MAC
  38  *      MACbSafeRxOff - Turn Off MAC Rx
  39  *      MACbSafeTxOff - Turn Off MAC Tx
  40  *      MACbSafeStop - Stop MAC function
  41  *      MACbShutdown - Shut down MAC
  42  *      MACvInitialize - Initialize MAC
  43  *      MACvSetCurrRxDescAddr - Set Rx Descriptors Address
  44  *      MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
  45  *      MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
  46  *      MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
  47  *
  48  * Revision History:
  49  *      08-22-2003 Kyle Hsu     :  Porting MAC functions from sim53
  50  *      09-03-2003 Bryan YC Fan :  Add MACvClearBusSusInd()&
  51  *                                 MACvEnableBusSusEn()
  52  *      09-18-2003 Jerry Chen   :  Add MACvSetKeyEntry & MACvDisableKeyEntry
  53  *
  54  */
  55
  56 #include "tmacro.h"
  57 #include "mac.h"
  58
  59 /*
  60  * Description:
  61  *      Test if all test bits on
  62  *
  63  * Parameters:
  64  *  In:
  65  *      io_base    - Base Address for MAC
  66  *      byRegOfs    - Offset of MAC Register
  67  *      byTestBits  - Test bits
  68  *  Out:
  69  *      none
  70  *
  71  * Return Value: true if all test bits On; otherwise false
  72  *
  73  */
  74 bool MACbIsRegBitsOn(struct vnt_private *priv, unsigned char byRegOfs,
  75                      unsigned char byTestBits)
  76 {
  77         void __iomem *io_base = priv->PortOffset;
  78
  79         return (ioread8(io_base + byRegOfs) & byTestBits) == byTestBits;
  80 }
  81
  82 /*
  83  * Description:
  84  *      Test if all test bits off
  85  *
  86  * Parameters:
  87  *  In:
  88  *      io_base    - Base Address for MAC
  89  *      byRegOfs    - Offset of MAC Register
  90  *      byTestBits  - Test bits
  91  *  Out:
  92  *      none
  93  *
  94  * Return Value: true if all test bits Off; otherwise false
  95  *
  96  */
  97 bool MACbIsRegBitsOff(struct vnt_private *priv, unsigned char byRegOfs,
  98                       unsigned char byTestBits)
  99 {
 100         void __iomem *io_base = priv->PortOffset;
 101
 102         return !(ioread8(io_base + byRegOfs) & byTestBits);
 103 }
 104
 105 /*
 106  * Description:
 107  *      Test if MAC interrupt disable
 108  *
 109  * Parameters:
 110  *  In:
 111  *      io_base    - Base Address for MAC
 112  *  Out:
 113  *      none
 114  *
 115  * Return Value: true if interrupt is disable; otherwise false
 116  *
 117  */
 118 bool MACbIsIntDisable(struct vnt_private *priv)
 119 {
 120         void __iomem *io_base = priv->PortOffset;
 121
 122         if (ioread32(io_base + MAC_REG_IMR))
 123                 return false;
 124
 125         return true;
 126 }
 127
 128 /*
 129  * Description:
 130  *      Set 802.11 Short Retry Limit
 131  *
 132  * Parameters:
 133  *  In:
 134  *      io_base    - Base Address for MAC
 135  *      byRetryLimit- Retry Limit
 136  *  Out:
 137  *      none
 138  *
 139  * Return Value: none
 140  *
 141  */
 142 void MACvSetShortRetryLimit(struct vnt_private *priv,
 143                             unsigned char byRetryLimit)
 144 {
 145         void __iomem *io_base = priv->PortOffset;
 146         /* set SRT */
 147         iowrite8(byRetryLimit, io_base + MAC_REG_SRT);
 148 }
 149
 150
 151 /*
 152  * Description:
 153  *      Set 802.11 Long Retry Limit
 154  *
 155  * Parameters:
 156  *  In:
 157  *      io_base    - Base Address for MAC
 158  *      byRetryLimit- Retry Limit
 159  *  Out:
 160  *      none
 161  *
 162  * Return Value: none
 163  *
 164  */
 165 void MACvSetLongRetryLimit(struct vnt_private *priv,
 166                            unsigned char byRetryLimit)
 167 {
 168         void __iomem *io_base = priv->PortOffset;
 169         /* set LRT */
 170         iowrite8(byRetryLimit, io_base + MAC_REG_LRT);
 171 }
 172
 173 /*
 174  * Description:
 175  *      Set MAC Loopback mode
 176  *
 177  * Parameters:
 178  *  In:
 179  *      io_base        - Base Address for MAC
 180  *      byLoopbackMode  - Loopback Mode
 181  *  Out:
 182  *      none
 183  *
 184  * Return Value: none
 185  *
 186  */
 187 void MACvSetLoopbackMode(struct vnt_private *priv, unsigned char byLoopbackMode)
 188 {
 189         void __iomem *io_base = priv->PortOffset;
 190
 191         byLoopbackMode <<= 6;
 192         /* set TCR */
 193         iowrite8((ioread8(io_base + MAC_REG_TEST) & 0x3f) | byLoopbackMode,
 194                  io_base + MAC_REG_TEST);
 195 }
 196
 197 /*
 198  * Description:
 199  *      Save MAC registers to context buffer
 200  *
 201  * Parameters:
 202  *  In:
 203  *      io_base    - Base Address for MAC
 204  *  Out:
 205  *      cxt_buf   - Context buffer
 206  *
 207  * Return Value: none
 208  *
 209  */
 210 void MACvSaveContext(struct vnt_private *priv, unsigned char *cxt_buf)
 211 {
 212         void __iomem *io_base = priv->PortOffset;
 213
 214         /* read page0 register */
 215         memcpy_fromio(cxt_buf, io_base, MAC_MAX_CONTEXT_SIZE_PAGE0);
 216
 217         MACvSelectPage1(io_base);
 218
 219         /* read page1 register */
 220         memcpy_fromio(cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0, io_base,
 221                       MAC_MAX_CONTEXT_SIZE_PAGE1);
 222
 223         MACvSelectPage0(io_base);
 224 }
 225
 226 /*
 227  * Description:
 228  *      Restore MAC registers from context buffer
 229  *
 230  * Parameters:
 231  *  In:
 232  *      io_base    - Base Address for MAC
 233  *      cxt_buf   - Context buffer
 234  *  Out:
 235  *      none
 236  *
 237  * Return Value: none
 238  *
 239  */
 240 void MACvRestoreContext(struct vnt_private *priv, unsigned char *cxt_buf)
 241 {
 242         void __iomem *io_base = priv->PortOffset;
 243
 244         MACvSelectPage1(io_base);
 245         /* restore page1 */
 246         memcpy_toio(io_base, cxt_buf + MAC_MAX_CONTEXT_SIZE_PAGE0,
 247                     MAC_MAX_CONTEXT_SIZE_PAGE1);
 248
 249         MACvSelectPage0(io_base);
 250
 251         /* restore RCR,TCR,IMR... */
 252         memcpy_toio(io_base + MAC_REG_RCR, cxt_buf + MAC_REG_RCR,
 253                     MAC_REG_ISR - MAC_REG_RCR);
 254
 255         /* restore MAC Config. */
 256         memcpy_toio(io_base + MAC_REG_LRT, cxt_buf + MAC_REG_LRT,
 257                     MAC_REG_PAGE1SEL - MAC_REG_LRT);
 258
 259         iowrite8(*(cxt_buf + MAC_REG_CFG), io_base + MAC_REG_CFG);
 260
 261         /* restore PS Config. */
 262         memcpy_toio(io_base + MAC_REG_PSCFG, cxt_buf + MAC_REG_PSCFG,
 263                     MAC_REG_BBREGCTL - MAC_REG_PSCFG);
 264
 265         /* restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR */
 266         iowrite32(*(u32 *)(cxt_buf + MAC_REG_TXDMAPTR0),
 267                   io_base + MAC_REG_TXDMAPTR0);
 268         iowrite32(*(u32 *)(cxt_buf + MAC_REG_AC0DMAPTR),
 269                   io_base + MAC_REG_AC0DMAPTR);
 270         iowrite32(*(u32 *)(cxt_buf + MAC_REG_BCNDMAPTR),
 271                   io_base + MAC_REG_BCNDMAPTR);
 272         iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR0),
 273                   io_base + MAC_REG_RXDMAPTR0);
 274         iowrite32(*(u32 *)(cxt_buf + MAC_REG_RXDMAPTR1),
 275                   io_base + MAC_REG_RXDMAPTR1);
 276 }
 277
 278 /*
 279  * Description:
 280  *      Software Reset MAC
 281  *
 282  * Parameters:
 283  *  In:
 284  *      io_base    - Base Address for MAC
 285  *  Out:
 286  *      none
 287  *
 288  * Return Value: true if Reset Success; otherwise false
 289  *
 290  */
 291 bool MACbSoftwareReset(struct vnt_private *priv)
 292 {
 293         void __iomem *io_base = priv->PortOffset;
 294         unsigned short ww;
 295
 296         /* turn on HOSTCR_SOFTRST, just write 0x01 to reset */
 297         iowrite8(0x01, io_base + MAC_REG_HOSTCR);
 298
 299         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 300                 if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_SOFTRST))
 301                         break;
 302         }
 303         if (ww == W_MAX_TIMEOUT)
 304                 return false;
 305         return true;
 306 }
 307
 308 /*
 309  * Description:
 310  *      save some important register's value, then do reset, then restore
 311  *      register's value
 312  *
 313  * Parameters:
 314  *  In:
 315  *      io_base    - Base Address for MAC
 316  *  Out:
 317  *      none
 318  *
 319  * Return Value: true if success; otherwise false
 320  *
 321  */
 322 bool MACbSafeSoftwareReset(struct vnt_private *priv)
 323 {
 324         unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
 325         bool bRetVal;
 326
 327         /* PATCH....
 328          * save some important register's value, then do
 329          * reset, then restore register's value
 330          */
 331         /* save MAC context */
 332         MACvSaveContext(priv, abyTmpRegData);
 333         /* do reset */
 334         bRetVal = MACbSoftwareReset(priv);
 335         /* restore MAC context, except CR0 */
 336         MACvRestoreContext(priv, abyTmpRegData);
 337
 338         return bRetVal;
 339 }
 340
 341 /*
 342  * Description:
 343  *      Turn Off MAC Rx
 344  *
 345  * Parameters:
 346  *  In:
 347  *      io_base    - Base Address for MAC
 348  *  Out:
 349  *      none
 350  *
 351  * Return Value: true if success; otherwise false
 352  *
 353  */
 354 bool MACbSafeRxOff(struct vnt_private *priv)
 355 {
 356         void __iomem *io_base = priv->PortOffset;
 357         unsigned short ww;
 358
 359         /* turn off wow temp for turn off Rx safely */
 360
 361         /* Clear RX DMA0,1 */
 362         iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL0);
 363         iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_RXDMACTL1);
 364         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 365                 if (!(ioread32(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
 366                         break;
 367         }
 368         if (ww == W_MAX_TIMEOUT) {
 369                 pr_debug(" DBG_PORT80(0x10)\n");
 370                 return false;
 371         }
 372         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 373                 if (!(ioread32(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
 374                         break;
 375         }
 376         if (ww == W_MAX_TIMEOUT) {
 377                 pr_debug(" DBG_PORT80(0x11)\n");
 378                 return false;
 379         }
 380
 381         /* try to safe shutdown RX */
 382         MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON);
 383         /* W_MAX_TIMEOUT is the timeout period */
 384         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 385                 if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST))
 386                         break;
 387         }
 388         if (ww == W_MAX_TIMEOUT) {
 389                 pr_debug(" DBG_PORT80(0x12)\n");
 390                 return false;
 391         }
 392         return true;
 393 }
 394
 395 /*
 396  * Description:
 397  *      Turn Off MAC Tx
 398  *
 399  * Parameters:
 400  *  In:
 401  *      io_base    - Base Address for MAC
 402  *  Out:
 403  *      none
 404  *
 405  * Return Value: true if success; otherwise false
 406  *
 407  */
 408 bool MACbSafeTxOff(struct vnt_private *priv)
 409 {
 410         void __iomem *io_base = priv->PortOffset;
 411         unsigned short ww;
 412
 413         /* Clear TX DMA */
 414         /* Tx0 */
 415         iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_TXDMACTL0);
 416         /* AC0 */
 417         iowrite32(DMACTL_CLRRUN, io_base + MAC_REG_AC0DMACTL);
 418
 419         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 420                 if (!(ioread32(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
 421                         break;
 422         }
 423         if (ww == W_MAX_TIMEOUT) {
 424                 pr_debug(" DBG_PORT80(0x20)\n");
 425                 return false;
 426         }
 427         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 428                 if (!(ioread32(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
 429                         break;
 430         }
 431         if (ww == W_MAX_TIMEOUT) {
 432                 pr_debug(" DBG_PORT80(0x21)\n");
 433                 return false;
 434         }
 435
 436         /* try to safe shutdown TX */
 437         MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON);
 438
 439         /* W_MAX_TIMEOUT is the timeout period */
 440         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 441                 if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_TXONST))
 442                         break;
 443         }
 444         if (ww == W_MAX_TIMEOUT) {
 445                 pr_debug(" DBG_PORT80(0x24)\n");
 446                 return false;
 447         }
 448         return true;
 449 }
 450
 451 /*
 452  * Description:
 453  *      Stop MAC function
 454  *
 455  * Parameters:
 456  *  In:
 457  *      io_base    - Base Address for MAC
 458  *  Out:
 459  *      none
 460  *
 461  * Return Value: true if success; otherwise false
 462  *
 463  */
 464 bool MACbSafeStop(struct vnt_private *priv)
 465 {
 466         void __iomem *io_base = priv->PortOffset;
 467
 468         MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX);
 469
 470         if (!MACbSafeRxOff(priv)) {
 471                 pr_debug(" MACbSafeRxOff == false)\n");
 472                 MACbSafeSoftwareReset(priv);
 473                 return false;
 474         }
 475         if (!MACbSafeTxOff(priv)) {
 476                 pr_debug(" MACbSafeTxOff == false)\n");
 477                 MACbSafeSoftwareReset(priv);
 478                 return false;
 479         }
 480
 481         MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN);
 482
 483         return true;
 484 }
 485
 486 /*
 487  * Description:
 488  *      Shut Down MAC
 489  *
 490  * Parameters:
 491  *  In:
 492  *      io_base    - Base Address for MAC
 493  *  Out:
 494  *      none
 495  *
 496  * Return Value: true if success; otherwise false
 497  *
 498  */
 499 bool MACbShutdown(struct vnt_private *priv)
 500 {
 501         void __iomem *io_base = priv->PortOffset;
 502         /* disable MAC IMR */
 503         MACvIntDisable(io_base);
 504         MACvSetLoopbackMode(priv, MAC_LB_INTERNAL);
 505         /* stop the adapter */
 506         if (!MACbSafeStop(priv)) {
 507                 MACvSetLoopbackMode(priv, MAC_LB_NONE);
 508                 return false;
 509         }
 510         MACvSetLoopbackMode(priv, MAC_LB_NONE);
 511         return true;
 512 }
 513
 514 /*
 515  * Description:
 516  *      Initialize MAC
 517  *
 518  * Parameters:
 519  *  In:
 520  *      io_base    - Base Address for MAC
 521  *  Out:
 522  *      none
 523  *
 524  * Return Value: none
 525  *
 526  */
 527 void MACvInitialize(struct vnt_private *priv)
 528 {
 529         void __iomem *io_base = priv->PortOffset;
 530         /* clear sticky bits */
 531         MACvClearStckDS(io_base);
 532         /* disable force PME-enable */
 533         iowrite8(PME_OVR, io_base + MAC_REG_PMC1);
 534         /* only 3253 A */
 535
 536         /* do reset */
 537         MACbSoftwareReset(priv);
 538
 539         /* reset TSF counter */
 540         iowrite8(TFTCTL_TSFCNTRST, io_base + MAC_REG_TFTCTL);
 541         /* enable TSF counter */
 542         iowrite8(TFTCTL_TSFCNTREN, io_base + MAC_REG_TFTCTL);
 543 }
 544
 545 /*
 546  * Description:
 547  *      Set the chip with current rx descriptor address
 548  *
 549  * Parameters:
 550  *  In:
 551  *      io_base        - Base Address for MAC
 552  *      curr_desc_addr  - Descriptor Address
 553  *  Out:
 554  *      none
 555  *
 556  * Return Value: none
 557  *
 558  */
 559 void MACvSetCurrRx0DescAddr(struct vnt_private *priv, u32 curr_desc_addr)
 560 {
 561         void __iomem *io_base = priv->PortOffset;
 562         unsigned short ww;
 563         unsigned char org_dma_ctl;
 564
 565         org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL0);
 566         if (org_dma_ctl & DMACTL_RUN)
 567                 iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0 + 2);
 568
 569         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 570                 if (!(ioread8(io_base + MAC_REG_RXDMACTL0) & DMACTL_RUN))
 571                         break;
 572         }
 573
 574         iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR0);
 575         if (org_dma_ctl & DMACTL_RUN)
 576                 iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL0);
 577 }
 578
 579 /*
 580  * Description:
 581  *      Set the chip with current rx descriptor address
 582  *
 583  * Parameters:
 584  *  In:
 585  *      io_base        - Base Address for MAC
 586  *      curr_desc_addr  - Descriptor Address
 587  *  Out:
 588  *      none
 589  *
 590  * Return Value: none
 591  *
 592  */
 593 void MACvSetCurrRx1DescAddr(struct vnt_private *priv, u32 curr_desc_addr)
 594 {
 595         void __iomem *io_base = priv->PortOffset;
 596         unsigned short ww;
 597         unsigned char org_dma_ctl;
 598
 599         org_dma_ctl = ioread8(io_base + MAC_REG_RXDMACTL1);
 600         if (org_dma_ctl & DMACTL_RUN)
 601                 iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1 + 2);
 602
 603         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 604                 if (!(ioread8(io_base + MAC_REG_RXDMACTL1) & DMACTL_RUN))
 605                         break;
 606         }
 607
 608         iowrite32(curr_desc_addr, io_base + MAC_REG_RXDMAPTR1);
 609         if (org_dma_ctl & DMACTL_RUN)
 610                 iowrite8(DMACTL_RUN, io_base + MAC_REG_RXDMACTL1);
 611
 612 }
 613
 614 /*
 615  * Description:
 616  *      Set the chip with current tx0 descriptor address
 617  *
 618  * Parameters:
 619  *  In:
 620  *      io_base        - Base Address for MAC
 621  *      curr_desc_addr  - Descriptor Address
 622  *  Out:
 623  *      none
 624  *
 625  * Return Value: none
 626  *
 627  */
 628 void MACvSetCurrTx0DescAddrEx(struct vnt_private *priv,
 629                               u32 curr_desc_addr)
 630 {
 631         void __iomem *io_base = priv->PortOffset;
 632         unsigned short ww;
 633         unsigned char org_dma_ctl;
 634
 635         org_dma_ctl = ioread8(io_base + MAC_REG_TXDMACTL0);
 636         if (org_dma_ctl & DMACTL_RUN)
 637                 iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0 + 2);
 638
 639         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 640                 if (!(ioread8(io_base + MAC_REG_TXDMACTL0) & DMACTL_RUN))
 641                         break;
 642         }
 643
 644         iowrite32(curr_desc_addr, io_base + MAC_REG_TXDMAPTR0);
 645         if (org_dma_ctl & DMACTL_RUN)
 646                 iowrite8(DMACTL_RUN, io_base + MAC_REG_TXDMACTL0);
 647 }
 648
 649 /*
 650  * Description:
 651  *      Set the chip with current AC0 descriptor address
 652  *
 653  * Parameters:
 654  *  In:
 655  *      io_base        - Base Address for MAC
 656  *      curr_desc_addr  - Descriptor Address
 657  *  Out:
 658  *      none
 659  *
 660  * Return Value: none
 661  *
 662  */
 663 /* TxDMA1 = AC0DMA */
 664 void MACvSetCurrAC0DescAddrEx(struct vnt_private *priv,
 665                               u32 curr_desc_addr)
 666 {
 667         void __iomem *io_base = priv->PortOffset;
 668         unsigned short ww;
 669         unsigned char org_dma_ctl;
 670
 671         org_dma_ctl = ioread8(io_base + MAC_REG_AC0DMACTL);
 672         if (org_dma_ctl & DMACTL_RUN)
 673                 iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL + 2);
 674
 675         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 676                 if (!(ioread8(io_base + MAC_REG_AC0DMACTL) & DMACTL_RUN))
 677                         break;
 678         }
 679         if (ww == W_MAX_TIMEOUT)
 680                 pr_debug(" DBG_PORT80(0x26)\n");
 681         iowrite32(curr_desc_addr, io_base + MAC_REG_AC0DMAPTR);
 682         if (org_dma_ctl & DMACTL_RUN)
 683                 iowrite8(DMACTL_RUN, io_base + MAC_REG_AC0DMACTL);
 684 }
 685
 686 void MACvSetCurrTXDescAddr(int iTxType, struct vnt_private *priv,
 687                            u32 curr_desc_addr)
 688 {
 689         if (iTxType == TYPE_AC0DMA)
 690                 MACvSetCurrAC0DescAddrEx(priv, curr_desc_addr);
 691         else if (iTxType == TYPE_TXDMA0)
 692                 MACvSetCurrTx0DescAddrEx(priv, curr_desc_addr);
 693 }
 694
 695 /*
 696  * Description:
 697  *      Micro Second Delay via MAC
 698  *
 699  * Parameters:
 700  *  In:
 701  *      io_base    - Base Address for MAC
 702  *      uDelay      - Delay time (timer resolution is 4 us)
 703  *  Out:
 704  *      none
 705  *
 706  * Return Value: none
 707  *
 708  */
 709 void MACvTimer0MicroSDelay(struct vnt_private *priv, unsigned int uDelay)
 710 {
 711         void __iomem *io_base = priv->PortOffset;
 712         unsigned char byValue;
 713         unsigned int uu, ii;
 714
 715         iowrite8(0, io_base + MAC_REG_TMCTL0);
 716         iowrite32(uDelay, io_base + MAC_REG_TMDATA0);
 717         iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL0);
 718         for (ii = 0; ii < 66; ii++) {  /* assume max PCI clock is 66Mhz */
 719                 for (uu = 0; uu < uDelay; uu++) {
 720                         byValue = ioread8(io_base + MAC_REG_TMCTL0);
 721                         if ((byValue == 0) ||
 722                             (byValue & TMCTL_TSUSP)) {
 723                                 iowrite8(0, io_base + MAC_REG_TMCTL0);
 724                                 return;
 725                         }
 726                 }
 727         }
 728         iowrite8(0, io_base + MAC_REG_TMCTL0);
 729 }
 730
 731 /*
 732  * Description:
 733  *      Micro Second One shot timer via MAC
 734  *
 735  * Parameters:
 736  *  In:
 737  *      io_base    - Base Address for MAC
 738  *      uDelay      - Delay time
 739  *  Out:
 740  *      none
 741  *
 742  * Return Value: none
 743  *
 744  */
 745 void MACvOneShotTimer1MicroSec(struct vnt_private *priv,
 746                                unsigned int uDelayTime)
 747 {
 748         void __iomem *io_base = priv->PortOffset;
 749
 750         iowrite8(0, io_base + MAC_REG_TMCTL1);
 751         iowrite32(uDelayTime, io_base + MAC_REG_TMDATA1);
 752         iowrite8((TMCTL_TMD | TMCTL_TE), io_base + MAC_REG_TMCTL1);
 753 }
 754
 755 void MACvSetMISCFifo(struct vnt_private *priv, unsigned short offset,
 756                      u32 data)
 757 {
 758         void __iomem *io_base = priv->PortOffset;
 759
 760         if (offset > 273)
 761                 return;
 762         iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
 763         iowrite32(data, io_base + MAC_REG_MISCFFDATA);
 764         iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 765 }
 766
 767 bool MACbPSWakeup(struct vnt_private *priv)
 768 {
 769         void __iomem *io_base = priv->PortOffset;
 770         unsigned int ww;
 771         /* Read PSCTL */
 772         if (MACbIsRegBitsOff(priv, MAC_REG_PSCTL, PSCTL_PS))
 773                 return true;
 774
 775         /* Disable PS */
 776         MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN);
 777
 778         /* Check if SyncFlushOK */
 779         for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
 780                 if (ioread8(io_base + MAC_REG_PSCTL) & PSCTL_WAKEDONE)
 781                         break;
 782         }
 783         if (ww == W_MAX_TIMEOUT) {
 784                 pr_debug(" DBG_PORT80(0x33)\n");
 785                 return false;
 786         }
 787         return true;
 788 }
 789
 790 /*
 791  * Description:
 792  *      Set the Key by MISCFIFO
 793  *
 794  * Parameters:
 795  *  In:
 796  *      io_base        - Base Address for MAC
 797  *
 798  *  Out:
 799  *      none
 800  *
 801  * Return Value: none
 802  *
 803  */
 804
 805 void MACvSetKeyEntry(struct vnt_private *priv, unsigned short wKeyCtl,
 806                      unsigned int uEntryIdx, unsigned int uKeyIdx,
 807                      unsigned char *pbyAddr, u32 *pdwKey,
 808                      unsigned char byLocalID)
 809 {
 810         void __iomem *io_base = priv->PortOffset;
 811         unsigned short offset;
 812         u32 data;
 813         int     ii;
 814
 815         if (byLocalID <= 1)
 816                 return;
 817
 818         pr_debug("MACvSetKeyEntry\n");
 819         offset = MISCFIFO_KEYETRY0;
 820         offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
 821
 822         data = 0;
 823         data |= wKeyCtl;
 824         data <<= 16;
 825         data |= MAKEWORD(*(pbyAddr + 4), *(pbyAddr + 5));
 826         pr_debug("1. offset: %d, Data: %X, KeyCtl:%X\n",
 827                  offset, data, wKeyCtl);
 828
 829         iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
 830         iowrite32(data, io_base + MAC_REG_MISCFFDATA);
 831         iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 832         offset++;
 833
 834         data = 0;
 835         data |= *(pbyAddr + 3);
 836         data <<= 8;
 837         data |= *(pbyAddr + 2);
 838         data <<= 8;
 839         data |= *(pbyAddr + 1);
 840         data <<= 8;
 841         data |= *pbyAddr;
 842         pr_debug("2. offset: %d, Data: %X\n", offset, data);
 843
 844         iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
 845         iowrite32(data, io_base + MAC_REG_MISCFFDATA);
 846         iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 847         offset++;
 848
 849         offset += (uKeyIdx * 4);
 850         for (ii = 0; ii < 4; ii++) {
 851                 /* always push 128 bits */
 852                 pr_debug("3.(%d) offset: %d, Data: %X\n",
 853                          ii, offset + ii, *pdwKey);
 854                 iowrite16(offset + ii, io_base + MAC_REG_MISCFFNDEX);
 855                 iowrite32(*pdwKey++, io_base + MAC_REG_MISCFFDATA);
 856                 iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 857         }
 858 }
 859
 860 /*
 861  * Description:
 862  *      Disable the Key Entry by MISCFIFO
 863  *
 864  * Parameters:
 865  *  In:
 866  *      io_base        - Base Address for MAC
 867  *
 868  *  Out:
 869  *      none
 870  *
 871  * Return Value: none
 872  *
 873  */
 874 void MACvDisableKeyEntry(struct vnt_private *priv, unsigned int uEntryIdx)
 875 {
 876         void __iomem *io_base = priv->PortOffset;
 877         unsigned short offset;
 878
 879         offset = MISCFIFO_KEYETRY0;
 880         offset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
 881
 882         iowrite16(offset, io_base + MAC_REG_MISCFFNDEX);
 883         iowrite32(0, io_base + MAC_REG_MISCFFDATA);
 884         iowrite16(MISCFFCTL_WRITE, io_base + MAC_REG_MISCFFCTL);
 885 }