1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-gpucc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller Binding for SDM845
10 - Taniya Das <tdas@codeaurora.org>
13 Qualcomm graphics clock control module which supports the clocks, resets and
14 power domains on SDM845.
16 See also dt-bindings/clock/qcom,gpucc-sdm845.h.
20 const: qcom,sdm845-gpucc
24 - description: Board XO source
25 - description: GPLL0 main branch source
26 - description: GPLL0 div branch source
31 - const: gcc_gpu_gpll0_clk_src
32 - const: gcc_gpu_gpll0_div_clk_src
40 '#power-domain-cells':
53 - '#power-domain-cells'
55 additionalProperties: false
59 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
60 #include <dt-bindings/clock/qcom,rpmh.h>
61 clock-controller@5090000 {
62 compatible = "qcom,sdm845-gpucc";
63 reg = <0 0x05090000 0 0x9000>;
64 clocks = <&rpmhcc RPMH_CXO_CLK>,
65 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
66 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
67 clock-names = "bi_tcxo",
68 "gcc_gpu_gpll0_clk_src",
69 "gcc_gpu_gpll0_div_clk_src";
72 #power-domain-cells = <1>;