Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-drc.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A31 Dynamic Range Controller Device Tree Bindings
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 description: |
  14   The DRC (Dynamic Range Controller) allows to dynamically adjust
  15   pixel brightness/contrast based on histogram measurements for LCD
  16   content adaptive backlight control.
  17
  18 properties:
  19   compatible:
  20     enum:
  21       - allwinner,sun6i-a31-drc
  22       - allwinner,sun6i-a31s-drc
  23       - allwinner,sun8i-a23-drc
  24       - allwinner,sun8i-a33-drc
  25       - allwinner,sun9i-a80-drc
  26
  27   reg:
  28     maxItems: 1
  29
  30   interrupts:
  31     maxItems: 1
  32
  33   clocks:
  34     items:
  35       - description: The DRC interface clock
  36       - description: The DRC module clock
  37       - description: The DRC DRAM clock
  38
  39   clock-names:
  40     items:
  41       - const: ahb
  42       - const: mod
  43       - const: ram
  44
  45   resets:
  46     maxItems: 1
  47
  48   ports:
  49     type: object
  50     description: |
  51       A ports node with endpoint definitions as defined in
  52       Documentation/devicetree/bindings/media/video-interfaces.txt.
  53
  54     properties:
  55       "#address-cells":
  56         const: 1
  57
  58       "#size-cells":
  59         const: 0
  60
  61       port@0:
  62         type: object
  63         description: |
  64           Input endpoints of the controller.
  65
  66       port@1:
  67         type: object
  68         description: |
  69           Output endpoints of the controller.
  70
  71     required:
  72       - "#address-cells"
  73       - "#size-cells"
  74       - port@0
  75       - port@1
  76
  77     additionalProperties: false
  78
  79 required:
  80   - compatible
  81   - reg
  82   - interrupts
  83   - clocks
  84   - clock-names
  85   - resets
  86   - ports
  87
  88 additionalProperties: false
  89
  90 examples:
  91   - |
  92     #include <dt-bindings/interrupt-controller/arm-gic.h>
  93
  94     #include <dt-bindings/clock/sun6i-a31-ccu.h>
  95     #include <dt-bindings/reset/sun6i-a31-ccu.h>
  96
  97     drc0: drc@1e70000 {
  98         compatible = "allwinner,sun6i-a31-drc";
  99         reg = <0x01e70000 0x10000>;
 100         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 101         clocks = <&ccu CLK_AHB1_DRC0>, <&ccu CLK_IEP_DRC0>,
 102                  <&ccu CLK_DRAM_DRC0>;
 103         clock-names = "ahb", "mod",
 104                       "ram";
 105         resets = <&ccu RST_AHB1_DRC0>;
 106
 107         ports {
 108             #address-cells = <1>;
 109             #size-cells = <0>;
 110
 111             drc0_in: port@0 {
 112                 reg = <0>;
 113
 114                 drc0_in_be0: endpoint {
 115                     remote-endpoint = <&be0_out_drc0>;
 116                 };
 117             };
 118
 119             drc0_out: port@1 {
 120                 #address-cells = <1>;
 121                 #size-cells = <0>;
 122                 reg = <1>;
 123
 124                 drc0_out_tcon0: endpoint@0 {
 125                     reg = <0>;
 126                     remote-endpoint = <&tcon0_in_drc0>;
 127                 };
 128
 129                 drc0_out_tcon1: endpoint@1 {
 130                     reg = <1>;
 131                     remote-endpoint = <&tcon1_in_drc0>;
 132                 };
 133             };
 134         };
 135     };
 136
 137
 138 ...