Documentation/devicetree/bindings/display/panel/panel-timing.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: panel timing bindings
   8
   9 maintainers:
  10   - Thierry Reding <thierry.reding@gmail.com>
  11   - Sam Ravnborg <sam@ravnborg.org>
  12
  13 description: |
  14   There are different ways of describing the timing data of a panel. The
  15   devicetree representation corresponds to the one commonly found in datasheets
  16   for panels.
  17
  18   The parameters are defined as seen in the following illustration.
  19
  20   +----------+-------------------------------------+----------+-------+
  21   |          |        ^                            |          |       |
  22   |          |        |vback_porch                 |          |       |
  23   |          |        v                            |          |       |
  24   +----------#######################################----------+-------+
  25   |          #        ^                            #          |       |
  26   |          #        |                            #          |       |
  27   |  hback   #        |                            #  hfront  | hsync |
  28   |   porch  #        |       hactive              #  porch   |  len  |
  29   |<-------->#<-------+--------------------------->#<-------->|<----->|
  30   |          #        |                            #          |       |
  31   |          #        |vactive                     #          |       |
  32   |          #        |                            #          |       |
  33   |          #        v                            #          |       |
  34   +----------#######################################----------+-------+
  35   |          |        ^                            |          |       |
  36   |          |        |vfront_porch                |          |       |
  37   |          |        v                            |          |       |
  38   +----------+-------------------------------------+----------+-------+
  39   |          |        ^                            |          |       |
  40   |          |        |vsync_len                   |          |       |
  41   |          |        v                            |          |       |
  42   +----------+-------------------------------------+----------+-------+
  43
  44
  45   The following is the panel timings shown with time on the x-axis.
  46   This matches the timing diagrams often found in data sheets.
  47
  48               Active                 Front           Sync           Back
  49               Region                 Porch                          Porch
  50   <-----------------------><----------------><-------------><-------------->
  51     //////////////////////|
  52    ////////////////////// |
  53   //////////////////////  |..................               ................
  54                                              _______________
  55
  56   Timing can be specified either as a typical value or as a tuple
  57   of min, typ, max values.
  58
  59 properties:
  60
  61   clock-frequency:
  62    description: Panel clock in Hz
  63
  64   hactive:
  65     $ref: /schemas/types.yaml#/definitions/uint32
  66     description: Horizontal panel resolution in pixels
  67
  68   vactive:
  69     $ref: /schemas/types.yaml#/definitions/uint32
  70     description: Vertical panel resolution in pixels
  71
  72   hfront-porch:
  73     description: Horizontal front porch panel timing
  74     oneOf:
  75       - allOf:
  76         - $ref: /schemas/types.yaml#/definitions/uint32
  77         - maxItems: 1
  78           items:
  79             description: typical number of pixels
  80       - allOf:
  81         - $ref: /schemas/types.yaml#/definitions/uint32-array
  82         - minItems: 3
  83           maxItems: 3
  84           items:
  85             description: min, typ, max number of pixels
  86
  87   hback-porch:
  88     description: Horizontal back porch timing
  89     oneOf:
  90       - allOf:
  91         - $ref: /schemas/types.yaml#/definitions/uint32
  92         - maxItems: 1
  93           items:
  94             description: typical number of pixels
  95       - allOf:
  96         - $ref: /schemas/types.yaml#/definitions/uint32-array
  97         - minItems: 3
  98           maxItems: 3
  99           items:
 100             description: min, typ, max number of pixels
 101
 102   hsync-len:
 103     description: Horizontal sync length panel timing
 104     oneOf:
 105       - allOf:
 106         - $ref: /schemas/types.yaml#/definitions/uint32
 107         - maxItems: 1
 108           items:
 109             description: typical number of pixels
 110       - allOf:
 111         - $ref: /schemas/types.yaml#/definitions/uint32-array
 112         - minItems: 3
 113           maxItems: 3
 114           items:
 115             description: min, typ, max number of pixels
 116
 117   vfront-porch:
 118     description: Vertical front porch panel timing
 119     oneOf:
 120       - allOf:
 121         - $ref: /schemas/types.yaml#/definitions/uint32
 122         - maxItems: 1
 123           items:
 124             description: typical number of lines
 125       - allOf:
 126         - $ref: /schemas/types.yaml#/definitions/uint32-array
 127         - minItems: 3
 128           maxItems: 3
 129           items:
 130             description: min, typ, max number of lines
 131
 132   vback-porch:
 133     description: Vertical back porch panel timing
 134     oneOf:
 135       - allOf:
 136         - $ref: /schemas/types.yaml#/definitions/uint32
 137         - maxItems: 1
 138           items:
 139             description: typical number of lines
 140       - allOf:
 141         - $ref: /schemas/types.yaml#/definitions/uint32-array
 142         - minItems: 3
 143           maxItems: 3
 144           items:
 145             description: min, typ, max number of lines
 146
 147   vsync-len:
 148     description: Vertical sync length panel timing
 149     oneOf:
 150       - allOf:
 151         - $ref: /schemas/types.yaml#/definitions/uint32
 152         - maxItems: 1
 153           items:
 154             description: typical number of lines
 155       - allOf:
 156         - $ref: /schemas/types.yaml#/definitions/uint32-array
 157         - minItems: 3
 158           maxItems: 3
 159           items:
 160             description: min, typ, max number of lines
 161
 162   hsync-active:
 163     description: |
 164       Horizontal sync pulse.
 165       0 selects active low, 1 selects active high.
 166       If omitted then it is not used by the hardware
 167     enum: [0, 1]
 168
 169   vsync-active:
 170     description: |
 171       Vertical sync pulse.
 172       0 selects active low, 1 selects active high.
 173       If omitted then it is not used by the hardware
 174     enum: [0, 1]
 175
 176   de-active:
 177     description: |
 178       Data enable.
 179       0 selects active low, 1 selects active high.
 180       If omitted then it is not used by the hardware
 181     enum: [0, 1]
 182
 183   pixelclk-active:
 184     description: |
 185       Data driving on rising or falling edge.
 186       Use 0 to drive pixel data on falling edge and
 187       sample data on rising edge.
 188       Use 1 to drive pixel data on rising edge and
 189       sample data on falling edge
 190     enum: [0, 1]
 191
 192   syncclk-active:
 193     description: |
 194       Drive sync on rising or sample sync on falling edge.
 195       If not specified then the setup is as specified by pixelclk-active.
 196       Use 0 to drive sync on falling edge and
 197       sample sync on rising edge of pixel clock.
 198       Use 1 to drive sync on rising edge and
 199       sample sync on falling edge of pixel clock
 200     enum: [0, 1]
 201
 202   interlaced:
 203     type: boolean
 204     description: Enable interlaced mode
 205
 206   doublescan:
 207     type: boolean
 208     description: Enable double scan mode
 209
 210   doubleclk:
 211     type: boolean
 212     description: Enable double clock mode
 213
 214 required:
 215  - clock-frequency
 216  - hactive
 217  - vactive
 218  - hfront-porch
 219  - hback-porch
 220  - hsync-len
 221  - vfront-porch
 222  - vback-porch
 223  - vsync-len
 224
 225 additionalProperties: false
 226
 227 ...