Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-v3s-usb-phy.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner V3s USB PHY Device Tree Bindings
   8
   9 maintainers:
  10   - Chen-Yu Tsai <wens@csie.org>
  11   - Maxime Ripard <mripard@kernel.org>
  12
  13 properties:
  14   "#phy-cells":
  15     const: 1
  16
  17   compatible:
  18     const: allwinner,sun8i-v3s-usb-phy
  19
  20   reg:
  21     items:
  22       - description: PHY Control registers
  23       - description: PHY PMU0 registers
  24
  25   reg-names:
  26     items:
  27       - const: phy_ctrl
  28       - const: pmu0
  29
  30   clocks:
  31     maxItems: 1
  32     description: USB OTG PHY bus clock
  33
  34   clock-names:
  35     const: usb0_phy
  36
  37   resets:
  38     maxItems: 1
  39     description: USB OTG reset
  40
  41   reset-names:
  42     const: usb0_reset
  43
  44   usb0_id_det-gpios:
  45     description: GPIO to the USB OTG ID pin
  46
  47   usb0_vbus_det-gpios:
  48     description: GPIO to the USB OTG VBUS detect pin
  49
  50   usb0_vbus_power-supply:
  51     description: Power supply to detect the USB OTG VBUS
  52
  53   usb0_vbus-supply:
  54     description: Regulator controlling USB OTG VBUS
  55
  56 required:
  57   - "#phy-cells"
  58   - compatible
  59   - clocks
  60   - clock-names
  61   - reg
  62   - reg-names
  63   - resets
  64   - reset-names
  65
  66 additionalProperties: false
  67
  68 examples:
  69   - |
  70     #include <dt-bindings/gpio/gpio.h>
  71     #include <dt-bindings/clock/sun8i-v3s-ccu.h>
  72     #include <dt-bindings/reset/sun8i-v3s-ccu.h>
  73
  74     phy@1c19400 {
  75         #phy-cells = <1>;
  76         compatible = "allwinner,sun8i-v3s-usb-phy";
  77         reg = <0x01c19400 0x2c>,
  78               <0x01c1a800 0x4>;
  79         reg-names = "phy_ctrl",
  80                     "pmu0";
  81         clocks = <&ccu CLK_USB_PHY0>;
  82         clock-names = "usb0_phy";
  83         resets = <&ccu RST_USB_PHY0>;
  84         reset-names = "usb0_reset";
  85         usb0_id_det-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
  86     };