1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip I2S controller
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
11 audio data transfer between devices in the system.
14 - Heiko Stuebner <heiko@sntech.de>
19 - const: rockchip,rk3066-i2s
31 - const: rockchip,rk3066-i2s
41 - description: clock for I2S controller
42 - description: clock for I2S BUS
51 - description: TX DMA Channel
52 - description: RX DMA Channel
59 rockchip,capture-channels:
61 - $ref: /schemas/types.yaml#/definitions/uint32
64 Max capture channels, if not set, 2 channels default.
66 rockchip,playback-channels:
68 - $ref: /schemas/types.yaml#/definitions/uint32
71 Max playback channels, if not set, 8 channels default.
74 $ref: /schemas/types.yaml#/definitions/phandle
76 The phandle of the syscon node for the GRF register.
77 Required property for controllers which support multi channel
93 additionalProperties: false
97 #include <dt-bindings/clock/rk3288-cru.h>
98 #include <dt-bindings/interrupt-controller/arm-gic.h>
99 #include <dt-bindings/interrupt-controller/irq.h>
101 compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
102 reg = <0xff890000 0x10000>;
103 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
104 clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
105 clock-names = "i2s_clk", "i2s_hclk";
106 dmas = <&pdma1 0>, <&pdma1 1>;
107 dma-names = "tx", "rx";
108 rockchip,capture-channels = <2>;
109 rockchip,playback-channels = <8>;
110 #sound-dai-cells = <0>;