1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Atheros AR231x/AR531x SoC specific CPU feature overrides
5 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
7 * This file was derived from: include/asm-mips/cpu-features.h
8 * Copyright (C) 2003, 2004 Ralf Baechle
9 * Copyright (C) 2004 Maciej W. Rozycki
11 #ifndef __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H
12 #define __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H
15 * The Atheros AR531x/AR231x SoCs have MIPS 4Kc/4KEc core.
18 #define cpu_has_4kex 1
19 #define cpu_has_3k_cache 0
20 #define cpu_has_4k_cache 1
21 #define cpu_has_tx39_cache 0
22 #define cpu_has_sb1_cache 0
24 #define cpu_has_32fpr 0
25 #define cpu_has_counter 1
26 #define cpu_has_ejtag 1
28 #if !defined(CONFIG_SOC_AR5312)
29 # define cpu_has_llsc 1
32 * The MIPS 4Kc V0.9 core in the AR5312/AR2312 have problems with the
35 # define cpu_has_llsc 0
38 #define cpu_has_mips16 0
39 #define cpu_has_mips16e2 0
40 #define cpu_has_mdmx 0
41 #define cpu_has_mips3d 0
42 #define cpu_has_smartmips 0
44 #define cpu_has_mips32r1 1
46 #if !defined(CONFIG_SOC_AR5312)
47 # define cpu_has_mips32r2 1
50 #define cpu_has_mips64r1 0
51 #define cpu_has_mips64r2 0
54 #define cpu_has_mipsmt 0
56 #define cpu_has_64bits 0
57 #define cpu_has_64bit_zero_reg 0
58 #define cpu_has_64bit_gp_regs 0
59 #define cpu_has_64bit_addresses 0
61 #endif /* __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H */