1 # SPDX-License-Identifier: GPL-2.0
7 config HAVE_CLK_PREPARE
12 select HAVE_CLK_PREPARE
17 The common clock framework is a single definition of struct
18 clk, useful across many platforms, as well as an
19 implementation of the clock API in include/linux/clk.h.
20 Architectures utilizing the common struct clk should select
23 menu "Common Clock Framework"
26 config COMMON_CLK_WM831X
27 tristate "Clock driver for WM831x/2x PMICs"
30 Supports the clocking subsystem of the WM831x/2x series of
31 PMICs from Wolfson Microelectronics.
33 source "drivers/clk/versatile/Kconfig"
36 bool "PLL Driver for HSDK platform"
37 depends on OF || COMPILE_TEST
39 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
42 config COMMON_CLK_MAX77686
43 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
44 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
46 This driver supports Maxim 77620/77686/77802 crystal oscillator
49 config COMMON_CLK_MAX9485
50 tristate "Maxim 9485 Programmable Clock Generator"
53 This driver supports Maxim 9485 Programmable Audio Clock Generator
55 config COMMON_CLK_RK808
56 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
59 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
60 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
61 Clkout1 is always on, Clkout2 can off by control register.
63 config COMMON_CLK_HI655X
64 tristate "Clock driver for Hi655x" if EXPERT
65 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
67 default MFD_HI655X_PMIC
69 This driver supports the hi655x PMIC clock. This
70 multi-function device has one fixed-rate oscillator, clocked
73 config COMMON_CLK_SCMI
74 tristate "Clock driver controlled via SCMI interface"
75 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
77 This driver provides support for clocks that are controlled
78 by firmware that implements the SCMI interface.
80 This driver uses SCMI Message Protocol to interact with the
81 firmware providing all the clock controls.
83 config COMMON_CLK_SCPI
84 tristate "Clock driver controlled via SCPI interface"
85 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
87 This driver provides support for clocks that are controlled
88 by firmware that implements the SCPI interface.
90 This driver uses SCPI Message Protocol to interact with the
91 firmware providing all the clock controls.
93 config COMMON_CLK_SI5341
94 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
98 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
99 generators. Not all features of these chips are currently supported
100 by the driver, in particular it only supports XTAL input. The chip can
101 be pre-programmed to support other configurations and features not yet
102 implemented in the driver.
104 config COMMON_CLK_SI5351
105 tristate "Clock driver for SiLabs 5351A/B/C"
110 This driver supports Silicon Labs 5351A/B/C programmable clock
113 config COMMON_CLK_SI514
114 tristate "Clock driver for SiLabs 514 devices"
119 This driver supports the Silicon Labs 514 programmable clock
122 config COMMON_CLK_SI544
123 tristate "Clock driver for SiLabs 544 devices"
127 This driver supports the Silicon Labs 544 programmable clock
130 config COMMON_CLK_SI570
131 tristate "Clock driver for SiLabs 570 and compatible devices"
136 This driver supports Silicon Labs 570/571/598/599 programmable
139 config COMMON_CLK_BM1880
140 bool "Clock driver for Bitmain BM1880 SoC"
141 depends on ARCH_BITMAIN || COMPILE_TEST
144 This driver supports the clocks on Bitmain BM1880 SoC.
146 config COMMON_CLK_CDCE706
147 tristate "Clock driver for TI CDCE706 clock synthesizer"
152 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
154 config COMMON_CLK_CDCE925
155 tristate "Clock driver for TI CDCE913/925/937/949 devices"
160 This driver supports the TI CDCE913/925/937/949 programmable clock
161 synthesizer. Each chip has different number of PLLs and outputs.
162 For example, the CDCE925 contains two PLLs with spread-spectrum
163 clocking support and five output dividers. The driver only supports
164 the following setup, and uses a fixed setting for the output muxes.
165 Y1 is derived from the input clock
166 Y2 and Y3 derive from PLL1
167 Y4 and Y5 derive from PLL2
168 Given a target output frequency, the driver will set the PLL and
169 divider to best approximate the desired output.
171 config COMMON_CLK_CS2000_CP
172 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
175 If you say yes here you get support for the CS2000 clock multiplier.
177 config COMMON_CLK_FSL_SAI
178 bool "Clock driver for BCLK of Freescale SAI cores"
179 depends on ARCH_LAYERSCAPE || COMPILE_TEST
181 This driver supports the Freescale SAI (Synchronous Audio Interface)
182 to be used as a generic clock output. Some SoCs have restrictions
183 regarding the possible pin multiplexer settings. Eg. on some SoCs
184 two SAI interfaces can only be enabled together. If just one is
185 needed, the BCLK pin of the second one can be used as general
186 purpose clock output. Ideally, it can be used to drive an audio
187 codec (sometimes known as MCLK).
189 config COMMON_CLK_GEMINI
190 bool "Clock driver for Cortina Systems Gemini SoC"
191 depends on ARCH_GEMINI || COMPILE_TEST
193 select RESET_CONTROLLER
195 This driver supports the SoC clocks on the Cortina Systems Gemini
196 platform, also known as SL3516 or CS3516.
198 config COMMON_CLK_ASPEED
199 bool "Clock driver for Aspeed BMC SoCs"
200 depends on ARCH_ASPEED || COMPILE_TEST
203 select RESET_CONTROLLER
205 This driver supports the SoC clocks on the Aspeed BMC platforms.
207 The G4 and G5 series, including the ast2400 and ast2500, are supported
210 config COMMON_CLK_S2MPS11
211 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
212 depends on MFD_SEC_CORE || COMPILE_TEST
214 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
215 clock. These multi-function devices have two (S2MPS14) or three
216 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
219 tristate "External McPDM functional clock from twl6040"
220 depends on TWL6040_CORE
222 Enable the external functional clock support on OMAP4+ platforms for
223 McPDM. McPDM module is using the external bit clock on the McPDM bus
226 config COMMON_CLK_AXI_CLKGEN
227 tristate "AXI clkgen driver"
228 depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
230 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
231 FPGAs. It is commonly used in Analog Devices' reference designs.
234 bool "Clock driver for Freescale QorIQ platforms"
235 depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
237 This adds the clock driver support for Freescale QorIQ platforms
238 using common clock framework.
240 config CLK_LS1028A_PLLDIG
241 tristate "Clock driver for LS1028A Display output"
242 depends on ARCH_LAYERSCAPE || COMPILE_TEST
243 default ARCH_LAYERSCAPE
245 This driver support the Display output interfaces(LCD, DPHY) pixel clocks
246 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
247 features of the PLL are currently supported by the driver. By default,
248 configured bypass mode with this PLL.
250 config COMMON_CLK_XGENE
251 bool "Clock driver for APM XGene SoC"
253 depends on ARM64 || COMPILE_TEST
255 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
257 config COMMON_CLK_LOCHNAGAR
258 tristate "Cirrus Logic Lochnagar clock driver"
259 depends on MFD_LOCHNAGAR
261 This driver supports the clocking features of the Cirrus Logic
262 Lochnagar audio development board.
264 config COMMON_CLK_NXP
265 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
266 select REGMAP_MMIO if ARCH_LPC32XX
267 select MFD_SYSCON if ARCH_LPC18XX
269 Support for clock providers on NXP platforms.
271 config COMMON_CLK_PALMAS
272 tristate "Clock driver for TI Palmas devices"
273 depends on MFD_PALMAS
275 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
276 using common clock framework.
278 config COMMON_CLK_PWM
279 tristate "Clock driver for PWMs used as clock outputs"
282 Adapter driver so that any PWM output can be (mis)used as clock signal
285 config COMMON_CLK_PXA
286 def_bool COMMON_CLK && ARCH_PXA
288 Support for the Marvell PXA SoC.
290 config COMMON_CLK_PIC32
291 def_bool COMMON_CLK && MACH_PIC32
293 config COMMON_CLK_OXNAS
294 bool "Clock driver for the OXNAS SoC Family"
295 depends on ARCH_OXNAS || COMPILE_TEST
298 Support for the OXNAS SoC Family clocks.
300 config COMMON_CLK_VC5
301 tristate "Clock driver for IDT VersaClock 5,6 devices"
306 This driver supports the IDT VersaClock 5 and VersaClock 6
307 programmable clock generators.
309 config COMMON_CLK_STM32MP157
310 def_bool COMMON_CLK && MACH_STM32MP157
312 Support for stm32mp157 SoC family clocks
314 config COMMON_CLK_STM32F
315 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
317 Support for stm32f4 and stm32f7 SoC families clocks
319 config COMMON_CLK_STM32H7
320 def_bool COMMON_CLK && MACH_STM32H743
322 Support for stm32h7 SoC family clocks
324 config COMMON_CLK_MMP2
325 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
327 Support for Marvell MMP2 and MMP3 SoC clocks
329 config COMMON_CLK_BD718XX
330 tristate "Clock driver for 32K clk gates on ROHM PMICs"
331 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 || MFD_ROHM_BD71828
333 This driver supports ROHM BD71837, ROHM BD71847, ROHM BD71828 and
334 ROHM BD70528 PMICs clock gates.
336 config COMMON_CLK_FIXED_MMIO
337 bool "Clock driver for Memory Mapped Fixed values"
338 depends on COMMON_CLK && OF
340 Support for Memory Mapped IO Fixed clocks
342 source "drivers/clk/actions/Kconfig"
343 source "drivers/clk/analogbits/Kconfig"
344 source "drivers/clk/bcm/Kconfig"
345 source "drivers/clk/hisilicon/Kconfig"
346 source "drivers/clk/imgtec/Kconfig"
347 source "drivers/clk/imx/Kconfig"
348 source "drivers/clk/ingenic/Kconfig"
349 source "drivers/clk/keystone/Kconfig"
350 source "drivers/clk/mediatek/Kconfig"
351 source "drivers/clk/meson/Kconfig"
352 source "drivers/clk/mvebu/Kconfig"
353 source "drivers/clk/qcom/Kconfig"
354 source "drivers/clk/renesas/Kconfig"
355 source "drivers/clk/samsung/Kconfig"
356 source "drivers/clk/sifive/Kconfig"
357 source "drivers/clk/sprd/Kconfig"
358 source "drivers/clk/sunxi/Kconfig"
359 source "drivers/clk/sunxi-ng/Kconfig"
360 source "drivers/clk/tegra/Kconfig"
361 source "drivers/clk/ti/Kconfig"
362 source "drivers/clk/uniphier/Kconfig"
363 source "drivers/clk/zynqmp/Kconfig"