drivers/devfreq/event/exynos-nocp.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * exynos-nocp.h - Exynos NoC (Network on Chip) Probe header file
   4  *
   5  * Copyright (c) 2016 Samsung Electronics Co., Ltd.
   6  * Author : Chanwoo Choi <cw00.choi@samsung.com>
   7  */
   8
   9 #ifndef __EXYNOS_NOCP_H__
  10 #define __EXYNOS_NOCP_H__
  11
  12 enum nocp_reg {
  13         NOCP_ID_REVISION_ID             = 0x04,
  14         NOCP_MAIN_CTL                   = 0x08,
  15         NOCP_CFG_CTL                    = 0x0C,
  16
  17         NOCP_STAT_PERIOD                = 0x24,
  18         NOCP_STAT_GO                    = 0x28,
  19         NOCP_STAT_ALARM_MIN             = 0x2C,
  20         NOCP_STAT_ALARM_MAX             = 0x30,
  21         NOCP_STAT_ALARM_STATUS          = 0x34,
  22         NOCP_STAT_ALARM_CLR             = 0x38,
  23
  24         NOCP_COUNTERS_0_SRC             = 0x138,
  25         NOCP_COUNTERS_0_ALARM_MODE      = 0x13C,
  26         NOCP_COUNTERS_0_VAL             = 0x140,
  27
  28         NOCP_COUNTERS_1_SRC             = 0x14C,
  29         NOCP_COUNTERS_1_ALARM_MODE      = 0x150,
  30         NOCP_COUNTERS_1_VAL             = 0x154,
  31
  32         NOCP_COUNTERS_2_SRC             = 0x160,
  33         NOCP_COUNTERS_2_ALARM_MODE      = 0x164,
  34         NOCP_COUNTERS_2_VAL             = 0x168,
  35
  36         NOCP_COUNTERS_3_SRC             = 0x174,
  37         NOCP_COUNTERS_3_ALARM_MODE      = 0x178,
  38         NOCP_COUNTERS_3_VAL             = 0x17C,
  39 };
  40
  41 /* NOCP_MAIN_CTL register */
  42 #define NOCP_MAIN_CTL_ERREN_MASK                BIT(0)
  43 #define NOCP_MAIN_CTL_TRACEEN_MASK              BIT(1)
  44 #define NOCP_MAIN_CTL_PAYLOADEN_MASK            BIT(2)
  45 #define NOCP_MAIN_CTL_STATEN_MASK               BIT(3)
  46 #define NOCP_MAIN_CTL_ALARMEN_MASK              BIT(4)
  47 #define NOCP_MAIN_CTL_STATCONDDUMP_MASK BIT(5)
  48 #define NOCP_MAIN_CTL_INTRUSIVEMODE_MASK        BIT(6)
  49
  50 /* NOCP_CFG_CTL register */
  51 #define NOCP_CFG_CTL_GLOBALEN_MASK              BIT(0)
  52 #define NOCP_CFG_CTL_ACTIVE_MASK                BIT(1)
  53
  54 /* NOCP_COUNTERS_x_SRC register */
  55 #define NOCP_CNT_SRC_INTEVENT_SHIFT             0
  56 #define NOCP_CNT_SRC_INTEVENT_MASK              (0x1F << NOCP_CNT_SRC_INTEVENT_SHIFT)
  57 #define NOCP_CNT_SRC_INTEVENT_OFF_MASK          (0x0 << NOCP_CNT_SRC_INTEVENT_SHIFT)
  58 #define NOCP_CNT_SRC_INTEVENT_CYCLE_MASK        (0x1 << NOCP_CNT_SRC_INTEVENT_SHIFT)
  59 #define NOCP_CNT_SRC_INTEVENT_IDLE_MASK         (0x2 << NOCP_CNT_SRC_INTEVENT_SHIFT)
  60 #define NOCP_CNT_SRC_INTEVENT_XFER_MASK         (0x3 << NOCP_CNT_SRC_INTEVENT_SHIFT)
  61 #define NOCP_CNT_SRC_INTEVENT_BUSY_MASK         (0x4 << NOCP_CNT_SRC_INTEVENT_SHIFT)
  62 #define NOCP_CNT_SRC_INTEVENT_WAIT_MASK         (0x5 << NOCP_CNT_SRC_INTEVENT_SHIFT)
  63 #define NOCP_CNT_SRC_INTEVENT_PKT_MASK          (0x6 << NOCP_CNT_SRC_INTEVENT_SHIFT)
  64 #define NOCP_CNT_SRC_INTEVENT_BYTE_MASK         (0x8 << NOCP_CNT_SRC_INTEVENT_SHIFT)
  65 #define NOCP_CNT_SRC_INTEVENT_CHAIN_MASK        (0x10 << NOCP_CNT_SRC_INTEVENT_SHIFT)
  66
  67 /* NOCP_COUNTERS_x_ALARM_MODE register */
  68 #define NOCP_CNT_ALARM_MODE_SHIFT               0
  69 #define NOCP_CNT_ALARM_MODE_MASK                (0x3 << NOCP_CNT_ALARM_MODE_SHIFT)
  70 #define NOCP_CNT_ALARM_MODE_OFF_MASK            (0x0 << NOCP_CNT_ALARM_MODE_SHIFT)
  71 #define NOCP_CNT_ALARM_MODE_MIN_MASK            (0x1 << NOCP_CNT_ALARM_MODE_SHIFT)
  72 #define NOCP_CNT_ALARM_MODE_MAX_MASK            (0x2 << NOCP_CNT_ALARM_MODE_SHIFT)
  73 #define NOCP_CNT_ALARM_MODE_MIN_MAX_MASK        (0x3 << NOCP_CNT_ALARM_MODE_SHIFT)
  74
  75 #endif /* __EXYNOS_NOCP_H__ */