1 // SPDX-License-Identifier: GPL-2.0
3 * System Control and Management Interface (SCMI) Clock Protocol
5 * Copyright (C) 2018 ARM Ltd.
10 enum scmi_clock_protocol_cmd
{
11 CLOCK_ATTRIBUTES
= 0x3,
12 CLOCK_DESCRIBE_RATES
= 0x4,
15 CLOCK_CONFIG_SET
= 0x7,
18 struct scmi_msg_resp_clock_protocol_attributes
{
24 struct scmi_msg_resp_clock_attributes
{
26 #define CLOCK_ENABLE BIT(0)
27 u8 name
[SCMI_MAX_STR_SIZE
];
30 struct scmi_clock_set_config
{
35 struct scmi_msg_clock_describe_rates
{
40 struct scmi_msg_resp_clock_describe_rates
{
41 __le32 num_rates_flags
;
42 #define NUM_RETURNED(x) ((x) & 0xfff)
43 #define RATE_DISCRETE(x) !((x) & BIT(12))
44 #define NUM_REMAINING(x) ((x) >> 16)
49 #define RATE_TO_U64(X) \
52 le32_to_cpu((x).value_low) | (u64)le32_to_cpu((x).value_high) << 32; \
56 struct scmi_clock_set_rate
{
58 #define CLOCK_SET_ASYNC BIT(0)
59 #define CLOCK_SET_IGNORE_RESP BIT(1)
60 #define CLOCK_SET_ROUND_UP BIT(2)
61 #define CLOCK_SET_ROUND_AUTO BIT(3)
71 atomic_t cur_async_req
;
72 struct scmi_clock_info
*clk
;
75 static int scmi_clock_protocol_attributes_get(const struct scmi_handle
*handle
,
76 struct clock_info
*ci
)
80 struct scmi_msg_resp_clock_protocol_attributes
*attr
;
82 ret
= scmi_xfer_get_init(handle
, PROTOCOL_ATTRIBUTES
,
83 SCMI_PROTOCOL_CLOCK
, 0, sizeof(*attr
), &t
);
89 ret
= scmi_do_xfer(handle
, t
);
91 ci
->num_clocks
= le16_to_cpu(attr
->num_clocks
);
92 ci
->max_async_req
= attr
->max_async_req
;
95 scmi_xfer_put(handle
, t
);
99 static int scmi_clock_attributes_get(const struct scmi_handle
*handle
,
100 u32 clk_id
, struct scmi_clock_info
*clk
)
104 struct scmi_msg_resp_clock_attributes
*attr
;
106 ret
= scmi_xfer_get_init(handle
, CLOCK_ATTRIBUTES
, SCMI_PROTOCOL_CLOCK
,
107 sizeof(clk_id
), sizeof(*attr
), &t
);
111 put_unaligned_le32(clk_id
, t
->tx
.buf
);
114 ret
= scmi_do_xfer(handle
, t
);
116 strlcpy(clk
->name
, attr
->name
, SCMI_MAX_STR_SIZE
);
120 scmi_xfer_put(handle
, t
);
125 scmi_clock_describe_rates_get(const struct scmi_handle
*handle
, u32 clk_id
,
126 struct scmi_clock_info
*clk
)
130 bool rate_discrete
= false;
131 u32 tot_rate_cnt
= 0, rates_flag
;
132 u16 num_returned
, num_remaining
;
134 struct scmi_msg_clock_describe_rates
*clk_desc
;
135 struct scmi_msg_resp_clock_describe_rates
*rlist
;
137 ret
= scmi_xfer_get_init(handle
, CLOCK_DESCRIBE_RATES
,
138 SCMI_PROTOCOL_CLOCK
, sizeof(*clk_desc
), 0, &t
);
142 clk_desc
= t
->tx
.buf
;
146 clk_desc
->id
= cpu_to_le32(clk_id
);
147 /* Set the number of rates to be skipped/already read */
148 clk_desc
->rate_index
= cpu_to_le32(tot_rate_cnt
);
150 ret
= scmi_do_xfer(handle
, t
);
154 rates_flag
= le32_to_cpu(rlist
->num_rates_flags
);
155 num_remaining
= NUM_REMAINING(rates_flag
);
156 rate_discrete
= RATE_DISCRETE(rates_flag
);
157 num_returned
= NUM_RETURNED(rates_flag
);
159 if (tot_rate_cnt
+ num_returned
> SCMI_MAX_NUM_RATES
) {
160 dev_err(handle
->dev
, "No. of rates > MAX_NUM_RATES");
164 if (!rate_discrete
) {
165 clk
->range
.min_rate
= RATE_TO_U64(rlist
->rate
[0]);
166 clk
->range
.max_rate
= RATE_TO_U64(rlist
->rate
[1]);
167 clk
->range
.step_size
= RATE_TO_U64(rlist
->rate
[2]);
168 dev_dbg(handle
->dev
, "Min %llu Max %llu Step %llu Hz\n",
169 clk
->range
.min_rate
, clk
->range
.max_rate
,
170 clk
->range
.step_size
);
174 rate
= &clk
->list
.rates
[tot_rate_cnt
];
175 for (cnt
= 0; cnt
< num_returned
; cnt
++, rate
++) {
176 *rate
= RATE_TO_U64(rlist
->rate
[cnt
]);
177 dev_dbg(handle
->dev
, "Rate %llu Hz\n", *rate
);
180 tot_rate_cnt
+= num_returned
;
182 * check for both returned and remaining to avoid infinite
183 * loop due to buggy firmware
185 } while (num_returned
&& num_remaining
);
188 clk
->list
.num_rates
= tot_rate_cnt
;
190 clk
->rate_discrete
= rate_discrete
;
193 scmi_xfer_put(handle
, t
);
198 scmi_clock_rate_get(const struct scmi_handle
*handle
, u32 clk_id
, u64
*value
)
203 ret
= scmi_xfer_get_init(handle
, CLOCK_RATE_GET
, SCMI_PROTOCOL_CLOCK
,
204 sizeof(__le32
), sizeof(u64
), &t
);
208 put_unaligned_le32(clk_id
, t
->tx
.buf
);
210 ret
= scmi_do_xfer(handle
, t
);
212 *value
= get_unaligned_le64(t
->rx
.buf
);
214 scmi_xfer_put(handle
, t
);
218 static int scmi_clock_rate_set(const struct scmi_handle
*handle
, u32 clk_id
,
224 struct scmi_clock_set_rate
*cfg
;
225 struct clock_info
*ci
= handle
->clk_priv
;
227 ret
= scmi_xfer_get_init(handle
, CLOCK_RATE_SET
, SCMI_PROTOCOL_CLOCK
,
228 sizeof(*cfg
), 0, &t
);
232 if (ci
->max_async_req
&&
233 atomic_inc_return(&ci
->cur_async_req
) < ci
->max_async_req
)
234 flags
|= CLOCK_SET_ASYNC
;
237 cfg
->flags
= cpu_to_le32(flags
);
238 cfg
->id
= cpu_to_le32(clk_id
);
239 cfg
->value_low
= cpu_to_le32(rate
& 0xffffffff);
240 cfg
->value_high
= cpu_to_le32(rate
>> 32);
242 if (flags
& CLOCK_SET_ASYNC
)
243 ret
= scmi_do_xfer_with_response(handle
, t
);
245 ret
= scmi_do_xfer(handle
, t
);
247 if (ci
->max_async_req
)
248 atomic_dec(&ci
->cur_async_req
);
250 scmi_xfer_put(handle
, t
);
255 scmi_clock_config_set(const struct scmi_handle
*handle
, u32 clk_id
, u32 config
)
259 struct scmi_clock_set_config
*cfg
;
261 ret
= scmi_xfer_get_init(handle
, CLOCK_CONFIG_SET
, SCMI_PROTOCOL_CLOCK
,
262 sizeof(*cfg
), 0, &t
);
267 cfg
->id
= cpu_to_le32(clk_id
);
268 cfg
->attributes
= cpu_to_le32(config
);
270 ret
= scmi_do_xfer(handle
, t
);
272 scmi_xfer_put(handle
, t
);
276 static int scmi_clock_enable(const struct scmi_handle
*handle
, u32 clk_id
)
278 return scmi_clock_config_set(handle
, clk_id
, CLOCK_ENABLE
);
281 static int scmi_clock_disable(const struct scmi_handle
*handle
, u32 clk_id
)
283 return scmi_clock_config_set(handle
, clk_id
, 0);
286 static int scmi_clock_count_get(const struct scmi_handle
*handle
)
288 struct clock_info
*ci
= handle
->clk_priv
;
290 return ci
->num_clocks
;
293 static const struct scmi_clock_info
*
294 scmi_clock_info_get(const struct scmi_handle
*handle
, u32 clk_id
)
296 struct clock_info
*ci
= handle
->clk_priv
;
297 struct scmi_clock_info
*clk
= ci
->clk
+ clk_id
;
305 static struct scmi_clk_ops clk_ops
= {
306 .count_get
= scmi_clock_count_get
,
307 .info_get
= scmi_clock_info_get
,
308 .rate_get
= scmi_clock_rate_get
,
309 .rate_set
= scmi_clock_rate_set
,
310 .enable
= scmi_clock_enable
,
311 .disable
= scmi_clock_disable
,
314 static int scmi_clock_protocol_init(struct scmi_handle
*handle
)
318 struct clock_info
*cinfo
;
320 scmi_version_get(handle
, SCMI_PROTOCOL_CLOCK
, &version
);
322 dev_dbg(handle
->dev
, "Clock Version %d.%d\n",
323 PROTOCOL_REV_MAJOR(version
), PROTOCOL_REV_MINOR(version
));
325 cinfo
= devm_kzalloc(handle
->dev
, sizeof(*cinfo
), GFP_KERNEL
);
329 scmi_clock_protocol_attributes_get(handle
, cinfo
);
331 cinfo
->clk
= devm_kcalloc(handle
->dev
, cinfo
->num_clocks
,
332 sizeof(*cinfo
->clk
), GFP_KERNEL
);
336 for (clkid
= 0; clkid
< cinfo
->num_clocks
; clkid
++) {
337 struct scmi_clock_info
*clk
= cinfo
->clk
+ clkid
;
339 ret
= scmi_clock_attributes_get(handle
, clkid
, clk
);
341 scmi_clock_describe_rates_get(handle
, clkid
, clk
);
344 cinfo
->version
= version
;
345 handle
->clk_ops
= &clk_ops
;
346 handle
->clk_priv
= cinfo
;
351 static int __init
scmi_clock_init(void)
353 return scmi_protocol_register(SCMI_PROTOCOL_CLOCK
,
354 &scmi_clock_protocol_init
);
356 subsys_initcall(scmi_clock_init
);