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gpio: rcar: Fix runtime PM imbalance on error
[linux/fpc-iii.git] / drivers / hwmon / w83781d.c
blob015f1ea319669eff7932daf49456a6638b9a7add
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
5 * Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
6 * Philip Edelbrock <phil@netroedge.com>,
7 * and Mark Studebaker <mdsxyz123@yahoo.com>
8 * Copyright (c) 2007 - 2008 Jean Delvare <jdelvare@suse.de>
9 */
10
11 /*
12 * Supports following chips:
13 *
14 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
15 * as99127f 7 3 0 3 0x31 0x12c3 yes no
16 * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
17 * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
18 * w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
19 * w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
20 *
21 */
22
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/i2c.h>
30 #include <linux/hwmon.h>
31 #include <linux/hwmon-vid.h>
32 #include <linux/hwmon-sysfs.h>
33 #include <linux/sysfs.h>
34 #include <linux/err.h>
35 #include <linux/mutex.h>
36
37 #ifdef CONFIG_ISA
38 #include <linux/platform_device.h>
39 #include <linux/ioport.h>
40 #include <linux/io.h>
41 #endif
42
43 #include "lm75.h"
44
45 /* Addresses to scan */
46 static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
47 0x2e, 0x2f, I2C_CLIENT_END };
48
49 enum chips { w83781d, w83782d, w83783s, as99127f };
50
51 /* Insmod parameters */
52 static unsigned short force_subclients[4];
53 module_param_array(force_subclients, short, NULL, 0);
54 MODULE_PARM_DESC(force_subclients,
55 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
56
57 static bool reset;
58 module_param(reset, bool, 0);
59 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
60
61 static bool init = 1;
62 module_param(init, bool, 0);
63 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
64
65 /* Constants specified below */
66
67 /* Length of ISA address segment */
68 #define W83781D_EXTENT 8
69
70 /* Where are the ISA address/data registers relative to the base address */
71 #define W83781D_ADDR_REG_OFFSET 5
72 #define W83781D_DATA_REG_OFFSET 6
73
74 /* The device registers */
75 /* in nr from 0 to 8 */
76 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
77 (0x554 + (((nr) - 7) * 2)))
78 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
79 (0x555 + (((nr) - 7) * 2)))
80 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
81 (0x550 + (nr) - 7))
82
83 /* fan nr from 0 to 2 */
84 #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
85 #define W83781D_REG_FAN(nr) (0x28 + (nr))
86
87 #define W83781D_REG_BANK 0x4E
88 #define W83781D_REG_TEMP2_CONFIG 0x152
89 #define W83781D_REG_TEMP3_CONFIG 0x252
90 /* temp nr from 1 to 3 */
91 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
92 ((nr == 2) ? (0x0150) : \
93 (0x27)))
94 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
95 ((nr == 2) ? (0x153) : \
96 (0x3A)))
97 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
98 ((nr == 2) ? (0x155) : \
99 (0x39)))
100
101 #define W83781D_REG_CONFIG 0x40
102
103 /* Interrupt status (W83781D, AS99127F) */
104 #define W83781D_REG_ALARM1 0x41
105 #define W83781D_REG_ALARM2 0x42
106
107 /* Real-time status (W83782D, W83783S) */
108 #define W83782D_REG_ALARM1 0x459
109 #define W83782D_REG_ALARM2 0x45A
110 #define W83782D_REG_ALARM3 0x45B
111
112 #define W83781D_REG_BEEP_CONFIG 0x4D
113 #define W83781D_REG_BEEP_INTS1 0x56
114 #define W83781D_REG_BEEP_INTS2 0x57
115 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
116
117 #define W83781D_REG_VID_FANDIV 0x47
118
119 #define W83781D_REG_CHIPID 0x49
120 #define W83781D_REG_WCHIPID 0x58
121 #define W83781D_REG_CHIPMAN 0x4F
122 #define W83781D_REG_PIN 0x4B
123
124 /* 782D/783S only */
125 #define W83781D_REG_VBAT 0x5D
126
127 /* PWM 782D (1-4) and 783S (1-2) only */
128 static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
129 #define W83781D_REG_PWMCLK12 0x5C
130 #define W83781D_REG_PWMCLK34 0x45C
131
132 #define W83781D_REG_I2C_ADDR 0x48
133 #define W83781D_REG_I2C_SUBADDR 0x4A
134
135 /*
136 * The following are undocumented in the data sheets however we
137 * received the information in an email from Winbond tech support
138 */
139 /* Sensor selection - not on 781d */
140 #define W83781D_REG_SCFG1 0x5D
141 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
142
143 #define W83781D_REG_SCFG2 0x59
144 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
145
146 #define W83781D_DEFAULT_BETA 3435
147
148 /* Conversions */
149 #define IN_TO_REG(val) clamp_val(((val) + 8) / 16, 0, 255)
150 #define IN_FROM_REG(val) ((val) * 16)
151
152 static inline u8
153 FAN_TO_REG(long rpm, int div)
154 {
155 if (rpm == 0)
156 return 255;
157 rpm = clamp_val(rpm, 1, 1000000);
158 return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
159 }
160
161 static inline long
162 FAN_FROM_REG(u8 val, int div)
163 {
164 if (val == 0)
165 return -1;
166 if (val == 255)
167 return 0;
168 return 1350000 / (val * div);
169 }
170
171 #define TEMP_TO_REG(val) clamp_val((val) / 1000, -127, 128)
172 #define TEMP_FROM_REG(val) ((val) * 1000)
173
174 #define BEEP_MASK_FROM_REG(val, type) ((type) == as99127f ? \
175 (~(val)) & 0x7fff : (val) & 0xff7fff)
176 #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
177 (~(val)) & 0x7fff : (val) & 0xff7fff)
178
179 #define DIV_FROM_REG(val) (1 << (val))
180
181 static inline u8
182 DIV_TO_REG(long val, enum chips type)
183 {
184 int i;
185 val = clamp_val(val, 1,
186 ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;
187 for (i = 0; i < 7; i++) {
188 if (val == 0)
189 break;
190 val >>= 1;
191 }
192 return i;
193 }
194
195 struct w83781d_data {
196 struct i2c_client *client;
197 struct device *hwmon_dev;
198 struct mutex lock;
199 enum chips type;
200
201 /* For ISA device only */
202 const char *name;
203 int isa_addr;
204
205 struct mutex update_lock;
206 char valid; /* !=0 if following fields are valid */
207 unsigned long last_updated; /* In jiffies */
208
209 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
210 /* array of 2 pointers to subclients */
211
212 u8 in[9]; /* Register value - 8 & 9 for 782D only */
213 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
214 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
215 u8 fan[3]; /* Register value */
216 u8 fan_min[3]; /* Register value */
217 s8 temp; /* Register value */
218 s8 temp_max; /* Register value */
219 s8 temp_max_hyst; /* Register value */
220 u16 temp_add[2]; /* Register value */
221 u16 temp_max_add[2]; /* Register value */
222 u16 temp_max_hyst_add[2]; /* Register value */
223 u8 fan_div[3]; /* Register encoding, shifted right */
224 u8 vid; /* Register encoding, combined */
225 u32 alarms; /* Register encoding, combined */
226 u32 beep_mask; /* Register encoding, combined */
227 u8 pwm[4]; /* Register value */
228 u8 pwm2_enable; /* Boolean */
229 u16 sens[3]; /*
230 * 782D/783S only.
231 * 1 = pentium diode; 2 = 3904 diode;
232 * 4 = thermistor
233 */
234 u8 vrm;
235 };
236
237 static struct w83781d_data *w83781d_data_if_isa(void);
238 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
239
240 static int w83781d_read_value(struct w83781d_data *data, u16 reg);
241 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
242 static struct w83781d_data *w83781d_update_device(struct device *dev);
243 static void w83781d_init_device(struct device *dev);
244
245 /* following are the sysfs callback functions */
246 #define show_in_reg(reg) \
247 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
248 char *buf) \
249 { \
250 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
251 struct w83781d_data *data = w83781d_update_device(dev); \
252 return sprintf(buf, "%ld\n", \
253 (long)IN_FROM_REG(data->reg[attr->index])); \
254 }
255 show_in_reg(in);
256 show_in_reg(in_min);
257 show_in_reg(in_max);
258
259 #define store_in_reg(REG, reg) \
260 static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
261 *da, const char *buf, size_t count) \
262 { \
263 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
264 struct w83781d_data *data = dev_get_drvdata(dev); \
265 int nr = attr->index; \
266 unsigned long val; \
267 int err = kstrtoul(buf, 10, &val); \
268 if (err) \
269 return err; \
270 mutex_lock(&data->update_lock); \
271 data->in_##reg[nr] = IN_TO_REG(val); \
272 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
273 data->in_##reg[nr]); \
274 \
275 mutex_unlock(&data->update_lock); \
276 return count; \
277 }
278 store_in_reg(MIN, min);
279 store_in_reg(MAX, max);
280
281 #define sysfs_in_offsets(offset) \
282 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
283 show_in, NULL, offset); \
284 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
285 show_in_min, store_in_min, offset); \
286 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
287 show_in_max, store_in_max, offset)
288
289 sysfs_in_offsets(0);
290 sysfs_in_offsets(1);
291 sysfs_in_offsets(2);
292 sysfs_in_offsets(3);
293 sysfs_in_offsets(4);
294 sysfs_in_offsets(5);
295 sysfs_in_offsets(6);
296 sysfs_in_offsets(7);
297 sysfs_in_offsets(8);
298
299 #define show_fan_reg(reg) \
300 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
301 char *buf) \
302 { \
303 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
304 struct w83781d_data *data = w83781d_update_device(dev); \
305 return sprintf(buf, "%ld\n", \
306 FAN_FROM_REG(data->reg[attr->index], \
307 DIV_FROM_REG(data->fan_div[attr->index]))); \
308 }
309 show_fan_reg(fan);
310 show_fan_reg(fan_min);
311
312 static ssize_t
313 store_fan_min(struct device *dev, struct device_attribute *da,
314 const char *buf, size_t count)
315 {
316 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
317 struct w83781d_data *data = dev_get_drvdata(dev);
318 int nr = attr->index;
319 unsigned long val;
320 int err;
321
322 err = kstrtoul(buf, 10, &val);
323 if (err)
324 return err;
325
326 mutex_lock(&data->update_lock);
327 data->fan_min[nr] =
328 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
329 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
330 data->fan_min[nr]);
331
332 mutex_unlock(&data->update_lock);
333 return count;
334 }
335
336 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
337 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
338 show_fan_min, store_fan_min, 0);
339 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
340 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
341 show_fan_min, store_fan_min, 1);
342 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
343 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
344 show_fan_min, store_fan_min, 2);
345
346 #define show_temp_reg(reg) \
347 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
348 char *buf) \
349 { \
350 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
351 struct w83781d_data *data = w83781d_update_device(dev); \
352 int nr = attr->index; \
353 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
354 return sprintf(buf, "%d\n", \
355 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
356 } else { /* TEMP1 */ \
357 return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
358 } \
359 }
360 show_temp_reg(temp);
361 show_temp_reg(temp_max);
362 show_temp_reg(temp_max_hyst);
363
364 #define store_temp_reg(REG, reg) \
365 static ssize_t store_temp_##reg(struct device *dev, \
366 struct device_attribute *da, const char *buf, size_t count) \
367 { \
368 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
369 struct w83781d_data *data = dev_get_drvdata(dev); \
370 int nr = attr->index; \
371 long val; \
372 int err = kstrtol(buf, 10, &val); \
373 if (err) \
374 return err; \
375 mutex_lock(&data->update_lock); \
376 \
377 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
378 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
379 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
380 data->temp_##reg##_add[nr-2]); \
381 } else { /* TEMP1 */ \
382 data->temp_##reg = TEMP_TO_REG(val); \
383 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
384 data->temp_##reg); \
385 } \
386 \
387 mutex_unlock(&data->update_lock); \
388 return count; \
389 }
390 store_temp_reg(OVER, max);
391 store_temp_reg(HYST, max_hyst);
392
393 #define sysfs_temp_offsets(offset) \
394 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
395 show_temp, NULL, offset); \
396 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
397 show_temp_max, store_temp_max, offset); \
398 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
399 show_temp_max_hyst, store_temp_max_hyst, offset);
400
401 sysfs_temp_offsets(1);
402 sysfs_temp_offsets(2);
403 sysfs_temp_offsets(3);
404
405 static ssize_t
406 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
407 {
408 struct w83781d_data *data = w83781d_update_device(dev);
409 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
410 }
411
412 static DEVICE_ATTR_RO(cpu0_vid);
413
414 static ssize_t
415 vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
416 {
417 struct w83781d_data *data = dev_get_drvdata(dev);
418 return sprintf(buf, "%ld\n", (long) data->vrm);
419 }
420
421 static ssize_t
422 vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
423 size_t count)
424 {
425 struct w83781d_data *data = dev_get_drvdata(dev);
426 unsigned long val;
427 int err;
428
429 err = kstrtoul(buf, 10, &val);
430 if (err)
431 return err;
432 data->vrm = clamp_val(val, 0, 255);
433
434 return count;
435 }
436
437 static DEVICE_ATTR_RW(vrm);
438
439 static ssize_t
440 alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
441 {
442 struct w83781d_data *data = w83781d_update_device(dev);
443 return sprintf(buf, "%u\n", data->alarms);
444 }
445
446 static DEVICE_ATTR_RO(alarms);
447
448 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
449 char *buf)
450 {
451 struct w83781d_data *data = w83781d_update_device(dev);
452 int bitnr = to_sensor_dev_attr(attr)->index;
453 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
454 }
455
456 /* The W83781D has a single alarm bit for temp2 and temp3 */
457 static ssize_t show_temp3_alarm(struct device *dev,
458 struct device_attribute *attr, char *buf)
459 {
460 struct w83781d_data *data = w83781d_update_device(dev);
461 int bitnr = (data->type == w83781d) ? 5 : 13;
462 return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
463 }
464
465 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
466 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
467 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
468 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
469 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
470 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
471 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
472 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
473 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
474 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
475 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
476 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
477 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
478 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
479 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
480
481 static ssize_t beep_mask_show(struct device *dev,
482 struct device_attribute *attr, char *buf)
483 {
484 struct w83781d_data *data = w83781d_update_device(dev);
485 return sprintf(buf, "%ld\n",
486 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
487 }
488
489 static ssize_t
490 beep_mask_store(struct device *dev, struct device_attribute *attr,
491 const char *buf, size_t count)
492 {
493 struct w83781d_data *data = dev_get_drvdata(dev);
494 unsigned long val;
495 int err;
496
497 err = kstrtoul(buf, 10, &val);
498 if (err)
499 return err;
500
501 mutex_lock(&data->update_lock);
502 data->beep_mask &= 0x8000; /* preserve beep enable */
503 data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
504 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
505 data->beep_mask & 0xff);
506 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
507 (data->beep_mask >> 8) & 0xff);
508 if (data->type != w83781d && data->type != as99127f) {
509 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
510 ((data->beep_mask) >> 16) & 0xff);
511 }
512 mutex_unlock(&data->update_lock);
513
514 return count;
515 }
516
517 static DEVICE_ATTR_RW(beep_mask);
518
519 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
520 char *buf)
521 {
522 struct w83781d_data *data = w83781d_update_device(dev);
523 int bitnr = to_sensor_dev_attr(attr)->index;
524 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
525 }
526
527 static ssize_t
528 store_beep(struct device *dev, struct device_attribute *attr,
529 const char *buf, size_t count)
530 {
531 struct w83781d_data *data = dev_get_drvdata(dev);
532 int bitnr = to_sensor_dev_attr(attr)->index;
533 u8 reg;
534 unsigned long bit;
535 int err;
536
537 err = kstrtoul(buf, 10, &bit);
538 if (err)
539 return err;
540
541 if (bit & ~1)
542 return -EINVAL;
543
544 mutex_lock(&data->update_lock);
545 if (bit)
546 data->beep_mask |= (1 << bitnr);
547 else
548 data->beep_mask &= ~(1 << bitnr);
549
550 if (bitnr < 8) {
551 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
552 if (bit)
553 reg |= (1 << bitnr);
554 else
555 reg &= ~(1 << bitnr);
556 w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
557 } else if (bitnr < 16) {
558 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
559 if (bit)
560 reg |= (1 << (bitnr - 8));
561 else
562 reg &= ~(1 << (bitnr - 8));
563 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
564 } else {
565 reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
566 if (bit)
567 reg |= (1 << (bitnr - 16));
568 else
569 reg &= ~(1 << (bitnr - 16));
570 w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
571 }
572 mutex_unlock(&data->update_lock);
573
574 return count;
575 }
576
577 /* The W83781D has a single beep bit for temp2 and temp3 */
578 static ssize_t show_temp3_beep(struct device *dev,
579 struct device_attribute *attr, char *buf)
580 {
581 struct w83781d_data *data = w83781d_update_device(dev);
582 int bitnr = (data->type == w83781d) ? 5 : 13;
583 return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
584 }
585
586 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
587 show_beep, store_beep, 0);
588 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
589 show_beep, store_beep, 1);
590 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
591 show_beep, store_beep, 2);
592 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
593 show_beep, store_beep, 3);
594 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
595 show_beep, store_beep, 8);
596 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
597 show_beep, store_beep, 9);
598 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
599 show_beep, store_beep, 10);
600 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
601 show_beep, store_beep, 16);
602 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
603 show_beep, store_beep, 17);
604 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
605 show_beep, store_beep, 6);
606 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
607 show_beep, store_beep, 7);
608 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
609 show_beep, store_beep, 11);
610 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
611 show_beep, store_beep, 4);
612 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
613 show_beep, store_beep, 5);
614 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
615 show_temp3_beep, store_beep, 13);
616 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
617 show_beep, store_beep, 15);
618
619 static ssize_t
620 show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
621 {
622 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
623 struct w83781d_data *data = w83781d_update_device(dev);
624 return sprintf(buf, "%ld\n",
625 (long) DIV_FROM_REG(data->fan_div[attr->index]));
626 }
627
628 /*
629 * Note: we save and restore the fan minimum here, because its value is
630 * determined in part by the fan divisor. This follows the principle of
631 * least surprise; the user doesn't expect the fan minimum to change just
632 * because the divisor changed.
633 */
634 static ssize_t
635 store_fan_div(struct device *dev, struct device_attribute *da,
636 const char *buf, size_t count)
637 {
638 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
639 struct w83781d_data *data = dev_get_drvdata(dev);
640 unsigned long min;
641 int nr = attr->index;
642 u8 reg;
643 unsigned long val;
644 int err;
645
646 err = kstrtoul(buf, 10, &val);
647 if (err)
648 return err;
649
650 mutex_lock(&data->update_lock);
651
652 /* Save fan_min */
653 min = FAN_FROM_REG(data->fan_min[nr],
654 DIV_FROM_REG(data->fan_div[nr]));
655
656 data->fan_div[nr] = DIV_TO_REG(val, data->type);
657
658 reg = (w83781d_read_value(data, nr == 2 ?
659 W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
660 & (nr == 0 ? 0xcf : 0x3f))
661 | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
662 w83781d_write_value(data, nr == 2 ?
663 W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
664
665 /* w83781d and as99127f don't have extended divisor bits */
666 if (data->type != w83781d && data->type != as99127f) {
667 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
668 & ~(1 << (5 + nr)))
669 | ((data->fan_div[nr] & 0x04) << (3 + nr));
670 w83781d_write_value(data, W83781D_REG_VBAT, reg);
671 }
672
673 /* Restore fan_min */
674 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
675 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
676
677 mutex_unlock(&data->update_lock);
678 return count;
679 }
680
681 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
682 show_fan_div, store_fan_div, 0);
683 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
684 show_fan_div, store_fan_div, 1);
685 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
686 show_fan_div, store_fan_div, 2);
687
688 static ssize_t
689 show_pwm(struct device *dev, struct device_attribute *da, char *buf)
690 {
691 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
692 struct w83781d_data *data = w83781d_update_device(dev);
693 return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
694 }
695
696 static ssize_t
697 pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf)
698 {
699 struct w83781d_data *data = w83781d_update_device(dev);
700 return sprintf(buf, "%d\n", (int)data->pwm2_enable);
701 }
702
703 static ssize_t
704 store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
705 size_t count)
706 {
707 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
708 struct w83781d_data *data = dev_get_drvdata(dev);
709 int nr = attr->index;
710 unsigned long val;
711 int err;
712
713 err = kstrtoul(buf, 10, &val);
714 if (err)
715 return err;
716
717 mutex_lock(&data->update_lock);
718 data->pwm[nr] = clamp_val(val, 0, 255);
719 w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
720 mutex_unlock(&data->update_lock);
721 return count;
722 }
723
724 static ssize_t
725 pwm2_enable_store(struct device *dev, struct device_attribute *da,
726 const char *buf, size_t count)
727 {
728 struct w83781d_data *data = dev_get_drvdata(dev);
729 unsigned long val;
730 u32 reg;
731 int err;
732
733 err = kstrtoul(buf, 10, &val);
734 if (err)
735 return err;
736
737 mutex_lock(&data->update_lock);
738
739 switch (val) {
740 case 0:
741 case 1:
742 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
743 w83781d_write_value(data, W83781D_REG_PWMCLK12,
744 (reg & 0xf7) | (val << 3));
745
746 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
747 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
748 (reg & 0xef) | (!val << 4));
749
750 data->pwm2_enable = val;
751 break;
752
753 default:
754 mutex_unlock(&data->update_lock);
755 return -EINVAL;
756 }
757
758 mutex_unlock(&data->update_lock);
759 return count;
760 }
761
762 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
763 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
764 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
765 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
766 /* only PWM2 can be enabled/disabled */
767 static DEVICE_ATTR_RW(pwm2_enable);
768
769 static ssize_t
770 show_sensor(struct device *dev, struct device_attribute *da, char *buf)
771 {
772 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
773 struct w83781d_data *data = w83781d_update_device(dev);
774 return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
775 }
776
777 static ssize_t
778 store_sensor(struct device *dev, struct device_attribute *da,
779 const char *buf, size_t count)
780 {
781 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
782 struct w83781d_data *data = dev_get_drvdata(dev);
783 int nr = attr->index;
784 unsigned long val;
785 u32 tmp;
786 int err;
787
788 err = kstrtoul(buf, 10, &val);
789 if (err)
790 return err;
791
792 mutex_lock(&data->update_lock);
793
794 switch (val) {
795 case 1: /* PII/Celeron diode */
796 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
797 w83781d_write_value(data, W83781D_REG_SCFG1,
798 tmp | BIT_SCFG1[nr]);
799 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
800 w83781d_write_value(data, W83781D_REG_SCFG2,
801 tmp | BIT_SCFG2[nr]);
802 data->sens[nr] = val;
803 break;
804 case 2: /* 3904 */
805 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
806 w83781d_write_value(data, W83781D_REG_SCFG1,
807 tmp | BIT_SCFG1[nr]);
808 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
809 w83781d_write_value(data, W83781D_REG_SCFG2,
810 tmp & ~BIT_SCFG2[nr]);
811 data->sens[nr] = val;
812 break;
813 case W83781D_DEFAULT_BETA:
814 dev_warn(dev,
815 "Sensor type %d is deprecated, please use 4 instead\n",
816 W83781D_DEFAULT_BETA);
817 /* fall through */
818 case 4: /* thermistor */
819 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
820 w83781d_write_value(data, W83781D_REG_SCFG1,
821 tmp & ~BIT_SCFG1[nr]);
822 data->sens[nr] = val;
823 break;
824 default:
825 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
826 (long) val);
827 break;
828 }
829
830 mutex_unlock(&data->update_lock);
831 return count;
832 }
833
834 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
835 show_sensor, store_sensor, 0);
836 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
837 show_sensor, store_sensor, 1);
838 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
839 show_sensor, store_sensor, 2);
840
841 /*
842 * Assumes that adapter is of I2C, not ISA variety.
843 * OTHERWISE DON'T CALL THIS
844 */
845 static int
846 w83781d_detect_subclients(struct i2c_client *new_client)
847 {
848 int i, val1 = 0, id;
849 int err;
850 int address = new_client->addr;
851 unsigned short sc_addr[2];
852 struct i2c_adapter *adapter = new_client->adapter;
853 struct w83781d_data *data = i2c_get_clientdata(new_client);
854 enum chips kind = data->type;
855 int num_sc = 1;
856
857 id = i2c_adapter_id(adapter);
858
859 if (force_subclients[0] == id && force_subclients[1] == address) {
860 for (i = 2; i <= 3; i++) {
861 if (force_subclients[i] < 0x48 ||
862 force_subclients[i] > 0x4f) {
863 dev_err(&new_client->dev,
864 "Invalid subclient address %d; must be 0x48-0x4f\n",
865 force_subclients[i]);
866 err = -EINVAL;
867 goto ERROR_SC_1;
868 }
869 }
870 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
871 (force_subclients[2] & 0x07) |
872 ((force_subclients[3] & 0x07) << 4));
873 sc_addr[0] = force_subclients[2];
874 } else {
875 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
876 sc_addr[0] = 0x48 + (val1 & 0x07);
877 }
878
879 if (kind != w83783s) {
880 num_sc = 2;
881 if (force_subclients[0] == id &&
882 force_subclients[1] == address) {
883 sc_addr[1] = force_subclients[3];
884 } else {
885 sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
886 }
887 if (sc_addr[0] == sc_addr[1]) {
888 dev_err(&new_client->dev,
889 "Duplicate addresses 0x%x for subclients.\n",
890 sc_addr[0]);
891 err = -EBUSY;
892 goto ERROR_SC_2;
893 }
894 }
895
896 for (i = 0; i < num_sc; i++) {
897 data->lm75[i] = i2c_new_dummy_device(adapter, sc_addr[i]);
898 if (IS_ERR(data->lm75[i])) {
899 dev_err(&new_client->dev,
900 "Subclient %d registration at address 0x%x failed.\n",
901 i, sc_addr[i]);
902 err = PTR_ERR(data->lm75[i]);
903 if (i == 1)
904 goto ERROR_SC_3;
905 goto ERROR_SC_2;
906 }
907 }
908
909 return 0;
910
911 /* Undo inits in case of errors */
912 ERROR_SC_3:
913 i2c_unregister_device(data->lm75[0]);
914 ERROR_SC_2:
915 ERROR_SC_1:
916 return err;
917 }
918
919 #define IN_UNIT_ATTRS(X) \
920 &sensor_dev_attr_in##X##_input.dev_attr.attr, \
921 &sensor_dev_attr_in##X##_min.dev_attr.attr, \
922 &sensor_dev_attr_in##X##_max.dev_attr.attr, \
923 &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
924 &sensor_dev_attr_in##X##_beep.dev_attr.attr
925
926 #define FAN_UNIT_ATTRS(X) \
927 &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
928 &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
929 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
930 &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
931 &sensor_dev_attr_fan##X##_beep.dev_attr.attr
932
933 #define TEMP_UNIT_ATTRS(X) \
934 &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
935 &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
936 &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
937 &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
938 &sensor_dev_attr_temp##X##_beep.dev_attr.attr
939
940 static struct attribute *w83781d_attributes[] = {
941 IN_UNIT_ATTRS(0),
942 IN_UNIT_ATTRS(2),
943 IN_UNIT_ATTRS(3),
944 IN_UNIT_ATTRS(4),
945 IN_UNIT_ATTRS(5),
946 IN_UNIT_ATTRS(6),
947 FAN_UNIT_ATTRS(1),
948 FAN_UNIT_ATTRS(2),
949 FAN_UNIT_ATTRS(3),
950 TEMP_UNIT_ATTRS(1),
951 TEMP_UNIT_ATTRS(2),
952 &dev_attr_cpu0_vid.attr,
953 &dev_attr_vrm.attr,
954 &dev_attr_alarms.attr,
955 &dev_attr_beep_mask.attr,
956 &sensor_dev_attr_beep_enable.dev_attr.attr,
957 NULL
958 };
959 static const struct attribute_group w83781d_group = {
960 .attrs = w83781d_attributes,
961 };
962
963 static struct attribute *w83781d_attributes_in1[] = {
964 IN_UNIT_ATTRS(1),
965 NULL
966 };
967 static const struct attribute_group w83781d_group_in1 = {
968 .attrs = w83781d_attributes_in1,
969 };
970
971 static struct attribute *w83781d_attributes_in78[] = {
972 IN_UNIT_ATTRS(7),
973 IN_UNIT_ATTRS(8),
974 NULL
975 };
976 static const struct attribute_group w83781d_group_in78 = {
977 .attrs = w83781d_attributes_in78,
978 };
979
980 static struct attribute *w83781d_attributes_temp3[] = {
981 TEMP_UNIT_ATTRS(3),
982 NULL
983 };
984 static const struct attribute_group w83781d_group_temp3 = {
985 .attrs = w83781d_attributes_temp3,
986 };
987
988 static struct attribute *w83781d_attributes_pwm12[] = {
989 &sensor_dev_attr_pwm1.dev_attr.attr,
990 &sensor_dev_attr_pwm2.dev_attr.attr,
991 &dev_attr_pwm2_enable.attr,
992 NULL
993 };
994 static const struct attribute_group w83781d_group_pwm12 = {
995 .attrs = w83781d_attributes_pwm12,
996 };
997
998 static struct attribute *w83781d_attributes_pwm34[] = {
999 &sensor_dev_attr_pwm3.dev_attr.attr,
1000 &sensor_dev_attr_pwm4.dev_attr.attr,
1001 NULL
1002 };
1003 static const struct attribute_group w83781d_group_pwm34 = {
1004 .attrs = w83781d_attributes_pwm34,
1005 };
1006
1007 static struct attribute *w83781d_attributes_other[] = {
1008 &sensor_dev_attr_temp1_type.dev_attr.attr,
1009 &sensor_dev_attr_temp2_type.dev_attr.attr,
1010 &sensor_dev_attr_temp3_type.dev_attr.attr,
1011 NULL
1012 };
1013 static const struct attribute_group w83781d_group_other = {
1014 .attrs = w83781d_attributes_other,
1015 };
1016
1017 /* No clean up is done on error, it's up to the caller */
1018 static int
1019 w83781d_create_files(struct device *dev, int kind, int is_isa)
1020 {
1021 int err;
1022
1023 err = sysfs_create_group(&dev->kobj, &w83781d_group);
1024 if (err)
1025 return err;
1026
1027 if (kind != w83783s) {
1028 err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
1029 if (err)
1030 return err;
1031 }
1032 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1033 err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
1034 if (err)
1035 return err;
1036 }
1037 if (kind != w83783s) {
1038 err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
1039 if (err)
1040 return err;
1041
1042 if (kind != w83781d) {
1043 err = sysfs_chmod_file(&dev->kobj,
1044 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1045 S_IRUGO | S_IWUSR);
1046 if (err)
1047 return err;
1048 }
1049 }
1050
1051 if (kind != w83781d && kind != as99127f) {
1052 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
1053 if (err)
1054 return err;
1055 }
1056 if (kind == w83782d && !is_isa) {
1057 err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
1058 if (err)
1059 return err;
1060 }
1061
1062 if (kind != as99127f && kind != w83781d) {
1063 err = device_create_file(dev,
1064 &sensor_dev_attr_temp1_type.dev_attr);
1065 if (err)
1066 return err;
1067 err = device_create_file(dev,
1068 &sensor_dev_attr_temp2_type.dev_attr);
1069 if (err)
1070 return err;
1071 if (kind != w83783s) {
1072 err = device_create_file(dev,
1073 &sensor_dev_attr_temp3_type.dev_attr);
1074 if (err)
1075 return err;
1076 }
1077 }
1078
1079 return 0;
1080 }
1081
1082 /* Return 0 if detection is successful, -ENODEV otherwise */
1083 static int
1084 w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
1085 {
1086 int val1, val2;
1087 struct w83781d_data *isa = w83781d_data_if_isa();
1088 struct i2c_adapter *adapter = client->adapter;
1089 int address = client->addr;
1090 const char *client_name;
1091 enum vendor { winbond, asus } vendid;
1092
1093 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1094 return -ENODEV;
1095
1096 /*
1097 * We block updates of the ISA device to minimize the risk of
1098 * concurrent access to the same W83781D chip through different
1099 * interfaces.
1100 */
1101 if (isa)
1102 mutex_lock(&isa->update_lock);
1103
1104 if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
1105 dev_dbg(&adapter->dev,
1106 "Detection of w83781d chip failed at step 3\n");
1107 goto err_nodev;
1108 }
1109
1110 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1111 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1112 /* Check for Winbond or Asus ID if in bank 0 */
1113 if (!(val1 & 0x07) &&
1114 ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
1115 ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
1116 dev_dbg(&adapter->dev,
1117 "Detection of w83781d chip failed at step 4\n");
1118 goto err_nodev;
1119 }
1120 /*
1121 * If Winbond SMBus, check address at 0x48.
1122 * Asus doesn't support, except for as99127f rev.2
1123 */
1124 if ((!(val1 & 0x80) && val2 == 0xa3) ||
1125 ((val1 & 0x80) && val2 == 0x5c)) {
1126 if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
1127 != address) {
1128 dev_dbg(&adapter->dev,
1129 "Detection of w83781d chip failed at step 5\n");
1130 goto err_nodev;
1131 }
1132 }
1133
1134 /* Put it now into bank 0 and Vendor ID High Byte */
1135 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1136 (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1137 & 0x78) | 0x80);
1138
1139 /* Get the vendor ID */
1140 val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1141 if (val2 == 0x5c)
1142 vendid = winbond;
1143 else if (val2 == 0x12)
1144 vendid = asus;
1145 else {
1146 dev_dbg(&adapter->dev,
1147 "w83781d chip vendor is neither Winbond nor Asus\n");
1148 goto err_nodev;
1149 }
1150
1151 /* Determine the chip type. */
1152 val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1153 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1154 client_name = "w83781d";
1155 else if (val1 == 0x30 && vendid == winbond)
1156 client_name = "w83782d";
1157 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1158 client_name = "w83783s";
1159 else if (val1 == 0x31)
1160 client_name = "as99127f";
1161 else
1162 goto err_nodev;
1163
1164 if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
1165 dev_dbg(&adapter->dev,
1166 "Device at 0x%02x appears to be the same as ISA device\n",
1167 address);
1168 goto err_nodev;
1169 }
1170
1171 if (isa)
1172 mutex_unlock(&isa->update_lock);
1173
1174 strlcpy(info->type, client_name, I2C_NAME_SIZE);
1175
1176 return 0;
1177
1178 err_nodev:
1179 if (isa)
1180 mutex_unlock(&isa->update_lock);
1181 return -ENODEV;
1182 }
1183
1184 static void w83781d_remove_files(struct device *dev)
1185 {
1186 sysfs_remove_group(&dev->kobj, &w83781d_group);
1187 sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
1188 sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
1189 sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
1190 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
1191 sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
1192 sysfs_remove_group(&dev->kobj, &w83781d_group_other);
1193 }
1194
1195 static int
1196 w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
1197 {
1198 struct device *dev = &client->dev;
1199 struct w83781d_data *data;
1200 int err;
1201
1202 data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL);
1203 if (!data)
1204 return -ENOMEM;
1205
1206 i2c_set_clientdata(client, data);
1207 mutex_init(&data->lock);
1208 mutex_init(&data->update_lock);
1209
1210 data->type = id->driver_data;
1211 data->client = client;
1212
1213 /* attach secondary i2c lm75-like clients */
1214 err = w83781d_detect_subclients(client);
1215 if (err)
1216 return err;
1217
1218 /* Initialize the chip */
1219 w83781d_init_device(dev);
1220
1221 /* Register sysfs hooks */
1222 err = w83781d_create_files(dev, data->type, 0);
1223 if (err)
1224 goto exit_remove_files;
1225
1226 data->hwmon_dev = hwmon_device_register(dev);
1227 if (IS_ERR(data->hwmon_dev)) {
1228 err = PTR_ERR(data->hwmon_dev);
1229 goto exit_remove_files;
1230 }
1231
1232 return 0;
1233
1234 exit_remove_files:
1235 w83781d_remove_files(dev);
1236 i2c_unregister_device(data->lm75[0]);
1237 i2c_unregister_device(data->lm75[1]);
1238 return err;
1239 }
1240
1241 static int
1242 w83781d_remove(struct i2c_client *client)
1243 {
1244 struct w83781d_data *data = i2c_get_clientdata(client);
1245 struct device *dev = &client->dev;
1246
1247 hwmon_device_unregister(data->hwmon_dev);
1248 w83781d_remove_files(dev);
1249
1250 i2c_unregister_device(data->lm75[0]);
1251 i2c_unregister_device(data->lm75[1]);
1252
1253 return 0;
1254 }
1255
1256 static int
1257 w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1258 {
1259 struct i2c_client *client = data->client;
1260 int res, bank;
1261 struct i2c_client *cl;
1262
1263 bank = (reg >> 8) & 0x0f;
1264 if (bank > 2)
1265 /* switch banks */
1266 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1267 bank);
1268 if (bank == 0 || bank > 2) {
1269 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1270 } else {
1271 /* switch to subclient */
1272 cl = data->lm75[bank - 1];
1273 /* convert from ISA to LM75 I2C addresses */
1274 switch (reg & 0xff) {
1275 case 0x50: /* TEMP */
1276 res = i2c_smbus_read_word_swapped(cl, 0);
1277 break;
1278 case 0x52: /* CONFIG */
1279 res = i2c_smbus_read_byte_data(cl, 1);
1280 break;
1281 case 0x53: /* HYST */
1282 res = i2c_smbus_read_word_swapped(cl, 2);
1283 break;
1284 case 0x55: /* OVER */
1285 default:
1286 res = i2c_smbus_read_word_swapped(cl, 3);
1287 break;
1288 }
1289 }
1290 if (bank > 2)
1291 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1292
1293 return res;
1294 }
1295
1296 static int
1297 w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1298 {
1299 struct i2c_client *client = data->client;
1300 int bank;
1301 struct i2c_client *cl;
1302
1303 bank = (reg >> 8) & 0x0f;
1304 if (bank > 2)
1305 /* switch banks */
1306 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1307 bank);
1308 if (bank == 0 || bank > 2) {
1309 i2c_smbus_write_byte_data(client, reg & 0xff,
1310 value & 0xff);
1311 } else {
1312 /* switch to subclient */
1313 cl = data->lm75[bank - 1];
1314 /* convert from ISA to LM75 I2C addresses */
1315 switch (reg & 0xff) {
1316 case 0x52: /* CONFIG */
1317 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1318 break;
1319 case 0x53: /* HYST */
1320 i2c_smbus_write_word_swapped(cl, 2, value);
1321 break;
1322 case 0x55: /* OVER */
1323 i2c_smbus_write_word_swapped(cl, 3, value);
1324 break;
1325 }
1326 }
1327 if (bank > 2)
1328 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1329
1330 return 0;
1331 }
1332
1333 static void
1334 w83781d_init_device(struct device *dev)
1335 {
1336 struct w83781d_data *data = dev_get_drvdata(dev);
1337 int i, p;
1338 int type = data->type;
1339 u8 tmp;
1340
1341 if (reset && type != as99127f) { /*
1342 * this resets registers we don't have
1343 * documentation for on the as99127f
1344 */
1345 /*
1346 * Resetting the chip has been the default for a long time,
1347 * but it causes the BIOS initializations (fan clock dividers,
1348 * thermal sensor types...) to be lost, so it is now optional.
1349 * It might even go away if nobody reports it as being useful,
1350 * as I see very little reason why this would be needed at
1351 * all.
1352 */
1353 dev_info(dev,
1354 "If reset=1 solved a problem you were having, please report!\n");
1355
1356 /* save these registers */
1357 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1358 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1359 /*
1360 * Reset all except Watchdog values and last conversion values
1361 * This sets fan-divs to 2, among others
1362 */
1363 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1364 /*
1365 * Restore the registers and disable power-on abnormal beep.
1366 * This saves FAN 1/2/3 input/output values set by BIOS.
1367 */
1368 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1369 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1370 /*
1371 * Disable master beep-enable (reset turns it on).
1372 * Individual beep_mask should be reset to off but for some
1373 * reason disabling this bit helps some people not get beeped
1374 */
1375 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1376 }
1377
1378 /*
1379 * Disable power-on abnormal beep, as advised by the datasheet.
1380 * Already done if reset=1.
1381 */
1382 if (init && !reset && type != as99127f) {
1383 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1384 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1385 }
1386
1387 data->vrm = vid_which_vrm();
1388
1389 if ((type != w83781d) && (type != as99127f)) {
1390 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1391 for (i = 1; i <= 3; i++) {
1392 if (!(tmp & BIT_SCFG1[i - 1])) {
1393 data->sens[i - 1] = 4;
1394 } else {
1395 if (w83781d_read_value
1396 (data,
1397 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1398 data->sens[i - 1] = 1;
1399 else
1400 data->sens[i - 1] = 2;
1401 }
1402 if (type == w83783s && i == 2)
1403 break;
1404 }
1405 }
1406
1407 if (init && type != as99127f) {
1408 /* Enable temp2 */
1409 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1410 if (tmp & 0x01) {
1411 dev_warn(dev,
1412 "Enabling temp2, readings might not make sense\n");
1413 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1414 tmp & 0xfe);
1415 }
1416
1417 /* Enable temp3 */
1418 if (type != w83783s) {
1419 tmp = w83781d_read_value(data,
1420 W83781D_REG_TEMP3_CONFIG);
1421 if (tmp & 0x01) {
1422 dev_warn(dev,
1423 "Enabling temp3, readings might not make sense\n");
1424 w83781d_write_value(data,
1425 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1426 }
1427 }
1428 }
1429
1430 /* Start monitoring */
1431 w83781d_write_value(data, W83781D_REG_CONFIG,
1432 (w83781d_read_value(data,
1433 W83781D_REG_CONFIG) & 0xf7)
1434 | 0x01);
1435
1436 /* A few vars need to be filled upon startup */
1437 for (i = 0; i < 3; i++) {
1438 data->fan_min[i] = w83781d_read_value(data,
1439 W83781D_REG_FAN_MIN(i));
1440 }
1441
1442 mutex_init(&data->update_lock);
1443 }
1444
1445 static struct w83781d_data *w83781d_update_device(struct device *dev)
1446 {
1447 struct w83781d_data *data = dev_get_drvdata(dev);
1448 struct i2c_client *client = data->client;
1449 int i;
1450
1451 mutex_lock(&data->update_lock);
1452
1453 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1454 || !data->valid) {
1455 dev_dbg(dev, "Starting device update\n");
1456
1457 for (i = 0; i <= 8; i++) {
1458 if (data->type == w83783s && i == 1)
1459 continue; /* 783S has no in1 */
1460 data->in[i] =
1461 w83781d_read_value(data, W83781D_REG_IN(i));
1462 data->in_min[i] =
1463 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1464 data->in_max[i] =
1465 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1466 if ((data->type != w83782d) && (i == 6))
1467 break;
1468 }
1469 for (i = 0; i < 3; i++) {
1470 data->fan[i] =
1471 w83781d_read_value(data, W83781D_REG_FAN(i));
1472 data->fan_min[i] =
1473 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1474 }
1475 if (data->type != w83781d && data->type != as99127f) {
1476 for (i = 0; i < 4; i++) {
1477 data->pwm[i] =
1478 w83781d_read_value(data,
1479 W83781D_REG_PWM[i]);
1480 /* Only W83782D on SMBus has PWM3 and PWM4 */
1481 if ((data->type != w83782d || !client)
1482 && i == 1)
1483 break;
1484 }
1485 /* Only PWM2 can be disabled */
1486 data->pwm2_enable = (w83781d_read_value(data,
1487 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1488 }
1489
1490 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1491 data->temp_max =
1492 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1493 data->temp_max_hyst =
1494 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1495 data->temp_add[0] =
1496 w83781d_read_value(data, W83781D_REG_TEMP(2));
1497 data->temp_max_add[0] =
1498 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1499 data->temp_max_hyst_add[0] =
1500 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1501 if (data->type != w83783s) {
1502 data->temp_add[1] =
1503 w83781d_read_value(data, W83781D_REG_TEMP(3));
1504 data->temp_max_add[1] =
1505 w83781d_read_value(data,
1506 W83781D_REG_TEMP_OVER(3));
1507 data->temp_max_hyst_add[1] =
1508 w83781d_read_value(data,
1509 W83781D_REG_TEMP_HYST(3));
1510 }
1511 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1512 data->vid = i & 0x0f;
1513 data->vid |= (w83781d_read_value(data,
1514 W83781D_REG_CHIPID) & 0x01) << 4;
1515 data->fan_div[0] = (i >> 4) & 0x03;
1516 data->fan_div[1] = (i >> 6) & 0x03;
1517 data->fan_div[2] = (w83781d_read_value(data,
1518 W83781D_REG_PIN) >> 6) & 0x03;
1519 if ((data->type != w83781d) && (data->type != as99127f)) {
1520 i = w83781d_read_value(data, W83781D_REG_VBAT);
1521 data->fan_div[0] |= (i >> 3) & 0x04;
1522 data->fan_div[1] |= (i >> 4) & 0x04;
1523 data->fan_div[2] |= (i >> 5) & 0x04;
1524 }
1525 if (data->type == w83782d) {
1526 data->alarms = w83781d_read_value(data,
1527 W83782D_REG_ALARM1)
1528 | (w83781d_read_value(data,
1529 W83782D_REG_ALARM2) << 8)
1530 | (w83781d_read_value(data,
1531 W83782D_REG_ALARM3) << 16);
1532 } else if (data->type == w83783s) {
1533 data->alarms = w83781d_read_value(data,
1534 W83782D_REG_ALARM1)
1535 | (w83781d_read_value(data,
1536 W83782D_REG_ALARM2) << 8);
1537 } else {
1538 /*
1539 * No real-time status registers, fall back to
1540 * interrupt status registers
1541 */
1542 data->alarms = w83781d_read_value(data,
1543 W83781D_REG_ALARM1)
1544 | (w83781d_read_value(data,
1545 W83781D_REG_ALARM2) << 8);
1546 }
1547 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1548 data->beep_mask = (i << 8) +
1549 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1550 if ((data->type != w83781d) && (data->type != as99127f)) {
1551 data->beep_mask |=
1552 w83781d_read_value(data,
1553 W83781D_REG_BEEP_INTS3) << 16;
1554 }
1555 data->last_updated = jiffies;
1556 data->valid = 1;
1557 }
1558
1559 mutex_unlock(&data->update_lock);
1560
1561 return data;
1562 }
1563
1564 static const struct i2c_device_id w83781d_ids[] = {
1565 { "w83781d", w83781d, },
1566 { "w83782d", w83782d, },
1567 { "w83783s", w83783s, },
1568 { "as99127f", as99127f },
1569 { /* LIST END */ }
1570 };
1571 MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1572
1573 static struct i2c_driver w83781d_driver = {
1574 .class = I2C_CLASS_HWMON,
1575 .driver = {
1576 .name = "w83781d",
1577 },
1578 .probe = w83781d_probe,
1579 .remove = w83781d_remove,
1580 .id_table = w83781d_ids,
1581 .detect = w83781d_detect,
1582 .address_list = normal_i2c,
1583 };
1584
1585 /*
1586 * ISA related code
1587 */
1588 #ifdef CONFIG_ISA
1589
1590 /* ISA device, if found */
1591 static struct platform_device *pdev;
1592
1593 static unsigned short isa_address = 0x290;
1594
1595 /*
1596 * I2C devices get this name attribute automatically, but for ISA devices
1597 * we must create it by ourselves.
1598 */
1599 static ssize_t
1600 name_show(struct device *dev, struct device_attribute *devattr, char *buf)
1601 {
1602 struct w83781d_data *data = dev_get_drvdata(dev);
1603 return sprintf(buf, "%s\n", data->name);
1604 }
1605 static DEVICE_ATTR_RO(name);
1606
1607 static struct w83781d_data *w83781d_data_if_isa(void)
1608 {
1609 return pdev ? platform_get_drvdata(pdev) : NULL;
1610 }
1611
1612 /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1613 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1614 {
1615 struct w83781d_data *isa;
1616 int i;
1617
1618 if (!pdev) /* No ISA chip */
1619 return 0;
1620
1621 isa = platform_get_drvdata(pdev);
1622
1623 if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1624 return 0; /* Address doesn't match */
1625 if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1626 return 0; /* Chip type doesn't match */
1627
1628 /*
1629 * We compare all the limit registers, the config register and the
1630 * interrupt mask registers
1631 */
1632 for (i = 0x2b; i <= 0x3d; i++) {
1633 if (w83781d_read_value(isa, i) !=
1634 i2c_smbus_read_byte_data(client, i))
1635 return 0;
1636 }
1637 if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
1638 i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
1639 return 0;
1640 for (i = 0x43; i <= 0x46; i++) {
1641 if (w83781d_read_value(isa, i) !=
1642 i2c_smbus_read_byte_data(client, i))
1643 return 0;
1644 }
1645
1646 return 1;
1647 }
1648
1649 static int
1650 w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1651 {
1652 int word_sized, res;
1653
1654 word_sized = (((reg & 0xff00) == 0x100)
1655 || ((reg & 0xff00) == 0x200))
1656 && (((reg & 0x00ff) == 0x50)
1657 || ((reg & 0x00ff) == 0x53)
1658 || ((reg & 0x00ff) == 0x55));
1659 if (reg & 0xff00) {
1660 outb_p(W83781D_REG_BANK,
1661 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1662 outb_p(reg >> 8,
1663 data->isa_addr + W83781D_DATA_REG_OFFSET);
1664 }
1665 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1666 res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
1667 if (word_sized) {
1668 outb_p((reg & 0xff) + 1,
1669 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1670 res =
1671 (res << 8) + inb_p(data->isa_addr +
1672 W83781D_DATA_REG_OFFSET);
1673 }
1674 if (reg & 0xff00) {
1675 outb_p(W83781D_REG_BANK,
1676 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1677 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1678 }
1679 return res;
1680 }
1681
1682 static void
1683 w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1684 {
1685 int word_sized;
1686
1687 word_sized = (((reg & 0xff00) == 0x100)
1688 || ((reg & 0xff00) == 0x200))
1689 && (((reg & 0x00ff) == 0x53)
1690 || ((reg & 0x00ff) == 0x55));
1691 if (reg & 0xff00) {
1692 outb_p(W83781D_REG_BANK,
1693 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1694 outb_p(reg >> 8,
1695 data->isa_addr + W83781D_DATA_REG_OFFSET);
1696 }
1697 outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1698 if (word_sized) {
1699 outb_p(value >> 8,
1700 data->isa_addr + W83781D_DATA_REG_OFFSET);
1701 outb_p((reg & 0xff) + 1,
1702 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1703 }
1704 outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
1705 if (reg & 0xff00) {
1706 outb_p(W83781D_REG_BANK,
1707 data->isa_addr + W83781D_ADDR_REG_OFFSET);
1708 outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1709 }
1710 }
1711
1712 /*
1713 * The SMBus locks itself, usually, but nothing may access the Winbond between
1714 * bank switches. ISA access must always be locked explicitly!
1715 * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1716 * would slow down the W83781D access and should not be necessary.
1717 * There are some ugly typecasts here, but the good news is - they should
1718 * nowhere else be necessary!
1719 */
1720 static int
1721 w83781d_read_value(struct w83781d_data *data, u16 reg)
1722 {
1723 struct i2c_client *client = data->client;
1724 int res;
1725
1726 mutex_lock(&data->lock);
1727 if (client)
1728 res = w83781d_read_value_i2c(data, reg);
1729 else
1730 res = w83781d_read_value_isa(data, reg);
1731 mutex_unlock(&data->lock);
1732 return res;
1733 }
1734
1735 static int
1736 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1737 {
1738 struct i2c_client *client = data->client;
1739
1740 mutex_lock(&data->lock);
1741 if (client)
1742 w83781d_write_value_i2c(data, reg, value);
1743 else
1744 w83781d_write_value_isa(data, reg, value);
1745 mutex_unlock(&data->lock);
1746 return 0;
1747 }
1748
1749 static int
1750 w83781d_isa_probe(struct platform_device *pdev)
1751 {
1752 int err, reg;
1753 struct w83781d_data *data;
1754 struct resource *res;
1755
1756 /* Reserve the ISA region */
1757 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1758 if (!devm_request_region(&pdev->dev,
1759 res->start + W83781D_ADDR_REG_OFFSET, 2,
1760 "w83781d"))
1761 return -EBUSY;
1762
1763 data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),
1764 GFP_KERNEL);
1765 if (!data)
1766 return -ENOMEM;
1767
1768 mutex_init(&data->lock);
1769 data->isa_addr = res->start;
1770 platform_set_drvdata(pdev, data);
1771
1772 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1773 switch (reg) {
1774 case 0x30:
1775 data->type = w83782d;
1776 data->name = "w83782d";
1777 break;
1778 default:
1779 data->type = w83781d;
1780 data->name = "w83781d";
1781 }
1782
1783 /* Initialize the W83781D chip */
1784 w83781d_init_device(&pdev->dev);
1785
1786 /* Register sysfs hooks */
1787 err = w83781d_create_files(&pdev->dev, data->type, 1);
1788 if (err)
1789 goto exit_remove_files;
1790
1791 err = device_create_file(&pdev->dev, &dev_attr_name);
1792 if (err)
1793 goto exit_remove_files;
1794
1795 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1796 if (IS_ERR(data->hwmon_dev)) {
1797 err = PTR_ERR(data->hwmon_dev);
1798 goto exit_remove_files;
1799 }
1800
1801 return 0;
1802
1803 exit_remove_files:
1804 w83781d_remove_files(&pdev->dev);
1805 device_remove_file(&pdev->dev, &dev_attr_name);
1806 return err;
1807 }
1808
1809 static int
1810 w83781d_isa_remove(struct platform_device *pdev)
1811 {
1812 struct w83781d_data *data = platform_get_drvdata(pdev);
1813
1814 hwmon_device_unregister(data->hwmon_dev);
1815 w83781d_remove_files(&pdev->dev);
1816 device_remove_file(&pdev->dev, &dev_attr_name);
1817
1818 return 0;
1819 }
1820
1821 static struct platform_driver w83781d_isa_driver = {
1822 .driver = {
1823 .name = "w83781d",
1824 },
1825 .probe = w83781d_isa_probe,
1826 .remove = w83781d_isa_remove,
1827 };
1828
1829 /* return 1 if a supported chip is found, 0 otherwise */
1830 static int __init
1831 w83781d_isa_found(unsigned short address)
1832 {
1833 int val, save, found = 0;
1834 int port;
1835
1836 /*
1837 * Some boards declare base+0 to base+7 as a PNP device, some base+4
1838 * to base+7 and some base+5 to base+6. So we better request each port
1839 * individually for the probing phase.
1840 */
1841 for (port = address; port < address + W83781D_EXTENT; port++) {
1842 if (!request_region(port, 1, "w83781d")) {
1843 pr_debug("Failed to request port 0x%x\n", port);
1844 goto release;
1845 }
1846 }
1847
1848 #define REALLY_SLOW_IO
1849 /*
1850 * We need the timeouts for at least some W83781D-like
1851 * chips. But only if we read 'undefined' registers.
1852 */
1853 val = inb_p(address + 1);
1854 if (inb_p(address + 2) != val
1855 || inb_p(address + 3) != val
1856 || inb_p(address + 7) != val) {
1857 pr_debug("Detection failed at step %d\n", 1);
1858 goto release;
1859 }
1860 #undef REALLY_SLOW_IO
1861
1862 /*
1863 * We should be able to change the 7 LSB of the address port. The
1864 * MSB (busy flag) should be clear initially, set after the write.
1865 */
1866 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1867 if (save & 0x80) {
1868 pr_debug("Detection failed at step %d\n", 2);
1869 goto release;
1870 }
1871 val = ~save & 0x7f;
1872 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1873 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1874 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1875 pr_debug("Detection failed at step %d\n", 3);
1876 goto release;
1877 }
1878
1879 /* We found a device, now see if it could be a W83781D */
1880 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1881 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1882 if (val & 0x80) {
1883 pr_debug("Detection failed at step %d\n", 4);
1884 goto release;
1885 }
1886 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1887 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1888 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1889 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1890 if ((!(save & 0x80) && (val != 0xa3))
1891 || ((save & 0x80) && (val != 0x5c))) {
1892 pr_debug("Detection failed at step %d\n", 5);
1893 goto release;
1894 }
1895 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1896 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1897 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1898 pr_debug("Detection failed at step %d\n", 6);
1899 goto release;
1900 }
1901
1902 /* The busy flag should be clear again */
1903 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1904 pr_debug("Detection failed at step %d\n", 7);
1905 goto release;
1906 }
1907
1908 /* Determine the chip type */
1909 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1910 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1911 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1912 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1913 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1914 if ((val & 0xfe) == 0x10 /* W83781D */
1915 || val == 0x30) /* W83782D */
1916 found = 1;
1917
1918 if (found)
1919 pr_info("Found a %s chip at %#x\n",
1920 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1921
1922 release:
1923 for (port--; port >= address; port--)
1924 release_region(port, 1);
1925 return found;
1926 }
1927
1928 static int __init
1929 w83781d_isa_device_add(unsigned short address)
1930 {
1931 struct resource res = {
1932 .start = address,
1933 .end = address + W83781D_EXTENT - 1,
1934 .name = "w83781d",
1935 .flags = IORESOURCE_IO,
1936 };
1937 int err;
1938
1939 pdev = platform_device_alloc("w83781d", address);
1940 if (!pdev) {
1941 err = -ENOMEM;
1942 pr_err("Device allocation failed\n");
1943 goto exit;
1944 }
1945
1946 err = platform_device_add_resources(pdev, &res, 1);
1947 if (err) {
1948 pr_err("Device resource addition failed (%d)\n", err);
1949 goto exit_device_put;
1950 }
1951
1952 err = platform_device_add(pdev);
1953 if (err) {
1954 pr_err("Device addition failed (%d)\n", err);
1955 goto exit_device_put;
1956 }
1957
1958 return 0;
1959
1960 exit_device_put:
1961 platform_device_put(pdev);
1962 exit:
1963 pdev = NULL;
1964 return err;
1965 }
1966
1967 static int __init
1968 w83781d_isa_register(void)
1969 {
1970 int res;
1971
1972 if (w83781d_isa_found(isa_address)) {
1973 res = platform_driver_register(&w83781d_isa_driver);
1974 if (res)
1975 goto exit;
1976
1977 /* Sets global pdev as a side effect */
1978 res = w83781d_isa_device_add(isa_address);
1979 if (res)
1980 goto exit_unreg_isa_driver;
1981 }
1982
1983 return 0;
1984
1985 exit_unreg_isa_driver:
1986 platform_driver_unregister(&w83781d_isa_driver);
1987 exit:
1988 return res;
1989 }
1990
1991 static void
1992 w83781d_isa_unregister(void)
1993 {
1994 if (pdev) {
1995 platform_device_unregister(pdev);
1996 platform_driver_unregister(&w83781d_isa_driver);
1997 }
1998 }
1999 #else /* !CONFIG_ISA */
2000
2001 static struct w83781d_data *w83781d_data_if_isa(void)
2002 {
2003 return NULL;
2004 }
2005
2006 static int
2007 w83781d_alias_detect(struct i2c_client *client, u8 chipid)
2008 {
2009 return 0;
2010 }
2011
2012 static int
2013 w83781d_read_value(struct w83781d_data *data, u16 reg)
2014 {
2015 int res;
2016
2017 mutex_lock(&data->lock);
2018 res = w83781d_read_value_i2c(data, reg);
2019 mutex_unlock(&data->lock);
2020
2021 return res;
2022 }
2023
2024 static int
2025 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
2026 {
2027 mutex_lock(&data->lock);
2028 w83781d_write_value_i2c(data, reg, value);
2029 mutex_unlock(&data->lock);
2030
2031 return 0;
2032 }
2033
2034 static int __init
2035 w83781d_isa_register(void)
2036 {
2037 return 0;
2038 }
2039
2040 static void
2041 w83781d_isa_unregister(void)
2042 {
2043 }
2044 #endif /* CONFIG_ISA */
2045
2046 static int __init
2047 sensors_w83781d_init(void)
2048 {
2049 int res;
2050
2051 /*
2052 * We register the ISA device first, so that we can skip the
2053 * registration of an I2C interface to the same device.
2054 */
2055 res = w83781d_isa_register();
2056 if (res)
2057 goto exit;
2058
2059 res = i2c_add_driver(&w83781d_driver);
2060 if (res)
2061 goto exit_unreg_isa;
2062
2063 return 0;
2064
2065 exit_unreg_isa:
2066 w83781d_isa_unregister();
2067 exit:
2068 return res;
2069 }
2070
2071 static void __exit
2072 sensors_w83781d_exit(void)
2073 {
2074 w83781d_isa_unregister();
2075 i2c_del_driver(&w83781d_driver);
2076 }
2077
2078 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2079 "Philip Edelbrock <phil@netroedge.com>, "
2080 "and Mark Studebaker <mdsxyz123@yahoo.com>");
2081 MODULE_DESCRIPTION("W83781D driver");
2082 MODULE_LICENSE("GPL");
2083
2084 module_init(sensors_w83781d_init);
2085 module_exit(sensors_w83781d_exit);
Linux with added FPC-III support