1 // SPDX-License-Identifier: GPL-2.0+
3 * si1133.c - Support for Silabs SI1133 combined ambient
4 * light and UV index sensors
6 * Copyright 2018 Maxime Roussin-Belanger <maxime.roussinbelanger@gmail.com>
9 #include <linux/delay.h>
10 #include <linux/i2c.h>
11 #include <linux/interrupt.h>
12 #include <linux/module.h>
13 #include <linux/regmap.h>
15 #include <linux/iio/iio.h>
16 #include <linux/iio/sysfs.h>
18 #include <linux/util_macros.h>
20 #define SI1133_REG_PART_ID 0x00
21 #define SI1133_REG_REV_ID 0x01
22 #define SI1133_REG_MFR_ID 0x02
23 #define SI1133_REG_INFO0 0x03
24 #define SI1133_REG_INFO1 0x04
26 #define SI1133_PART_ID 0x33
28 #define SI1133_REG_HOSTIN0 0x0A
29 #define SI1133_REG_COMMAND 0x0B
30 #define SI1133_REG_IRQ_ENABLE 0x0F
31 #define SI1133_REG_RESPONSE1 0x10
32 #define SI1133_REG_RESPONSE0 0x11
33 #define SI1133_REG_IRQ_STATUS 0x12
34 #define SI1133_REG_MEAS_RATE 0x1A
36 #define SI1133_IRQ_CHANNEL_ENABLE 0xF
38 #define SI1133_CMD_RESET_CTR 0x00
39 #define SI1133_CMD_RESET_SW 0x01
40 #define SI1133_CMD_FORCE 0x11
41 #define SI1133_CMD_START_AUTONOMOUS 0x13
42 #define SI1133_CMD_PARAM_SET 0x80
43 #define SI1133_CMD_PARAM_QUERY 0x40
44 #define SI1133_CMD_PARAM_MASK 0x3F
46 #define SI1133_CMD_ERR_MASK BIT(4)
47 #define SI1133_CMD_SEQ_MASK 0xF
48 #define SI1133_MAX_CMD_CTR 0xF
50 #define SI1133_PARAM_REG_CHAN_LIST 0x01
51 #define SI1133_PARAM_REG_ADCCONFIG(x) ((x) * 4) + 2
52 #define SI1133_PARAM_REG_ADCSENS(x) ((x) * 4) + 3
53 #define SI1133_PARAM_REG_ADCPOST(x) ((x) * 4) + 4
55 #define SI1133_ADCMUX_MASK 0x1F
57 #define SI1133_ADCCONFIG_DECIM_RATE(x) (x) << 5
59 #define SI1133_ADCSENS_SCALE_MASK 0x70
60 #define SI1133_ADCSENS_SCALE_SHIFT 4
61 #define SI1133_ADCSENS_HSIG_MASK BIT(7)
62 #define SI1133_ADCSENS_HSIG_SHIFT 7
63 #define SI1133_ADCSENS_HW_GAIN_MASK 0xF
64 #define SI1133_ADCSENS_NB_MEAS(x) fls(x) << SI1133_ADCSENS_SCALE_SHIFT
66 #define SI1133_ADCPOST_24BIT_EN BIT(6)
67 #define SI1133_ADCPOST_POSTSHIFT_BITQTY(x) (x & GENMASK(2, 0)) << 3
69 #define SI1133_PARAM_ADCMUX_SMALL_IR 0x0
70 #define SI1133_PARAM_ADCMUX_MED_IR 0x1
71 #define SI1133_PARAM_ADCMUX_LARGE_IR 0x2
72 #define SI1133_PARAM_ADCMUX_WHITE 0xB
73 #define SI1133_PARAM_ADCMUX_LARGE_WHITE 0xD
74 #define SI1133_PARAM_ADCMUX_UV 0x18
75 #define SI1133_PARAM_ADCMUX_UV_DEEP 0x19
77 #define SI1133_ERR_INVALID_CMD 0x0
78 #define SI1133_ERR_INVALID_LOCATION_CMD 0x1
79 #define SI1133_ERR_SATURATION_ADC_OR_OVERFLOW_ACCUMULATION 0x2
80 #define SI1133_ERR_OUTPUT_BUFFER_OVERFLOW 0x3
82 #define SI1133_COMPLETION_TIMEOUT_MS 500
84 #define SI1133_CMD_MINSLEEP_US_LOW 5000
85 #define SI1133_CMD_MINSLEEP_US_HIGH 7500
86 #define SI1133_CMD_TIMEOUT_MS 25
87 #define SI1133_CMD_LUX_TIMEOUT_MS 5000
88 #define SI1133_CMD_TIMEOUT_US SI1133_CMD_TIMEOUT_MS * 1000
90 #define SI1133_REG_HOSTOUT(x) (x) + 0x13
92 #define SI1133_MEASUREMENT_FREQUENCY 1250
94 #define SI1133_X_ORDER_MASK 0x0070
95 #define SI1133_Y_ORDER_MASK 0x0007
96 #define si1133_get_x_order(m) ((m) & SI1133_X_ORDER_MASK) >> 4
97 #define si1133_get_y_order(m) ((m) & SI1133_Y_ORDER_MASK)
99 #define SI1133_LUX_ADC_MASK 0xE
100 #define SI1133_ADC_THRESHOLD 16000
101 #define SI1133_INPUT_FRACTION_HIGH 7
102 #define SI1133_INPUT_FRACTION_LOW 15
103 #define SI1133_LUX_OUTPUT_FRACTION 12
104 #define SI1133_LUX_BUFFER_SIZE 9
105 #define SI1133_MEASURE_BUFFER_SIZE 3
107 #define SI1133_SIGN_BIT_INDEX 23
109 static const int si1133_scale_available
[] = {
110 1, 2, 4, 8, 16, 32, 64, 128};
112 static IIO_CONST_ATTR(scale_available
, "1 2 4 8 16 32 64 128");
114 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.0244 0.0488 0.0975 0.195 0.390 0.780 "
115 "1.560 3.120 6.24 12.48 25.0 50.0");
117 /* A.K.A. HW_GAIN in datasheet */
118 enum si1133_int_time
{
133 /* Integration time in milliseconds, nanoseconds */
134 static const int si1133_int_time_table
[][2] = {
135 [_24_4_us
] = {0, 24400},
136 [_48_8_us
] = {0, 48800},
137 [_97_5_us
] = {0, 97500},
138 [_195_0_us
] = {0, 195000},
139 [_390_0_us
] = {0, 390000},
140 [_780_0_us
] = {0, 780000},
141 [_1_560_0_us
] = {1, 560000},
142 [_3_120_0_us
] = {3, 120000},
143 [_6_240_0_us
] = {6, 240000},
144 [_12_480_0_us
] = {12, 480000},
145 [_25_ms
] = {25, 000000},
146 [_50_ms
] = {50, 000000},
149 static const struct regmap_range si1133_reg_ranges
[] = {
150 regmap_reg_range(0x00, 0x02),
151 regmap_reg_range(0x0A, 0x0B),
152 regmap_reg_range(0x0F, 0x0F),
153 regmap_reg_range(0x10, 0x12),
154 regmap_reg_range(0x13, 0x2C),
157 static const struct regmap_range si1133_reg_ro_ranges
[] = {
158 regmap_reg_range(0x00, 0x02),
159 regmap_reg_range(0x10, 0x2C),
162 static const struct regmap_range si1133_precious_ranges
[] = {
163 regmap_reg_range(0x12, 0x12),
166 static const struct regmap_access_table si1133_write_ranges_table
= {
167 .yes_ranges
= si1133_reg_ranges
,
168 .n_yes_ranges
= ARRAY_SIZE(si1133_reg_ranges
),
169 .no_ranges
= si1133_reg_ro_ranges
,
170 .n_no_ranges
= ARRAY_SIZE(si1133_reg_ro_ranges
),
173 static const struct regmap_access_table si1133_read_ranges_table
= {
174 .yes_ranges
= si1133_reg_ranges
,
175 .n_yes_ranges
= ARRAY_SIZE(si1133_reg_ranges
),
178 static const struct regmap_access_table si1133_precious_table
= {
179 .yes_ranges
= si1133_precious_ranges
,
180 .n_yes_ranges
= ARRAY_SIZE(si1133_precious_ranges
),
183 static const struct regmap_config si1133_regmap_config
= {
187 .max_register
= 0x2C,
189 .wr_table
= &si1133_write_ranges_table
,
190 .rd_table
= &si1133_read_ranges_table
,
192 .precious_table
= &si1133_precious_table
,
196 struct regmap
*regmap
;
197 struct i2c_client
*client
;
199 /* Lock protecting one command at a time can be processed */
207 struct completion completion
;
210 struct si1133_coeff
{
215 struct si1133_lux_coeff
{
216 struct si1133_coeff coeff_high
[4];
217 struct si1133_coeff coeff_low
[9];
220 static const struct si1133_lux_coeff lux_coeff
= {
240 static int si1133_calculate_polynomial_inner(s32 input
, u8 fraction
, u16 mag
,
243 return ((input
<< fraction
) / mag
) << shift
;
246 static int si1133_calculate_output(s32 x
, s32 y
, u8 x_order
, u8 y_order
,
247 u8 input_fraction
, s8 sign
,
248 const struct si1133_coeff
*coeffs
)
256 shift
= ((u16
)coeffs
->info
& 0xFF00) >> 8;
262 x1
= si1133_calculate_polynomial_inner(x
, input_fraction
,
269 y1
= si1133_calculate_polynomial_inner(y
, input_fraction
,
275 return sign
* x1
* x2
* y1
* y2
;
279 * The algorithm is from:
280 * https://siliconlabs.github.io/Gecko_SDK_Doc/efm32zg/html/si1133_8c_source.html#l00716
282 static int si1133_calc_polynomial(s32 x
, s32 y
, u8 input_fraction
, u8 num_coeff
,
283 const struct si1133_coeff
*coeffs
)
290 for (counter
= 0; counter
< num_coeff
; counter
++) {
291 if (coeffs
->info
< 0)
296 x_order
= si1133_get_x_order(coeffs
->info
);
297 y_order
= si1133_get_y_order(coeffs
->info
);
299 if ((x_order
== 0) && (y_order
== 0))
301 sign
* coeffs
->mag
<< SI1133_LUX_OUTPUT_FRACTION
;
303 output
+= si1133_calculate_output(x
, y
, x_order
,
305 input_fraction
, sign
,
313 static int si1133_cmd_reset_sw(struct si1133_data
*data
)
315 struct device
*dev
= &data
->client
->dev
;
317 unsigned long timeout
;
320 err
= regmap_write(data
->regmap
, SI1133_REG_COMMAND
,
321 SI1133_CMD_RESET_SW
);
325 timeout
= jiffies
+ msecs_to_jiffies(SI1133_CMD_TIMEOUT_MS
);
327 err
= regmap_read(data
->regmap
, SI1133_REG_RESPONSE0
, &resp
);
329 usleep_range(SI1133_CMD_MINSLEEP_US_LOW
,
330 SI1133_CMD_MINSLEEP_US_HIGH
);
334 if ((resp
& SI1133_MAX_CMD_CTR
) == SI1133_MAX_CMD_CTR
)
337 if (time_after(jiffies
, timeout
)) {
338 dev_warn(dev
, "Timeout on reset ctr resp: %d\n", resp
);
344 data
->rsp_seq
= SI1133_MAX_CMD_CTR
;
349 static int si1133_parse_response_err(struct device
*dev
, u32 resp
, u8 cmd
)
354 case SI1133_ERR_OUTPUT_BUFFER_OVERFLOW
:
355 dev_warn(dev
, "Output buffer overflow: %#02hhx\n", cmd
);
357 case SI1133_ERR_SATURATION_ADC_OR_OVERFLOW_ACCUMULATION
:
358 dev_warn(dev
, "Saturation of the ADC or overflow of accumulation: %#02hhx\n",
361 case SI1133_ERR_INVALID_LOCATION_CMD
:
363 "Parameter access to an invalid location: %#02hhx\n",
366 case SI1133_ERR_INVALID_CMD
:
367 dev_warn(dev
, "Invalid command %#02hhx\n", cmd
);
370 dev_warn(dev
, "Unknown error %#02hhx\n", cmd
);
375 static int si1133_cmd_reset_counter(struct si1133_data
*data
)
377 int err
= regmap_write(data
->regmap
, SI1133_REG_COMMAND
,
378 SI1133_CMD_RESET_CTR
);
387 static int si1133_command(struct si1133_data
*data
, u8 cmd
)
389 struct device
*dev
= &data
->client
->dev
;
394 mutex_lock(&data
->mutex
);
396 expected_seq
= (data
->rsp_seq
+ 1) & SI1133_MAX_CMD_CTR
;
398 if (cmd
== SI1133_CMD_FORCE
)
399 reinit_completion(&data
->completion
);
401 err
= regmap_write(data
->regmap
, SI1133_REG_COMMAND
, cmd
);
403 dev_warn(dev
, "Failed to write command %#02hhx, ret=%d\n", cmd
,
408 if (cmd
== SI1133_CMD_FORCE
) {
410 if (!wait_for_completion_timeout(&data
->completion
,
411 msecs_to_jiffies(SI1133_COMPLETION_TIMEOUT_MS
))) {
415 err
= regmap_read(data
->regmap
, SI1133_REG_RESPONSE0
, &resp
);
419 err
= regmap_read_poll_timeout(data
->regmap
,
420 SI1133_REG_RESPONSE0
, resp
,
421 (resp
& SI1133_CMD_SEQ_MASK
) ==
423 (resp
& SI1133_CMD_ERR_MASK
),
424 SI1133_CMD_MINSLEEP_US_LOW
,
425 SI1133_CMD_TIMEOUT_MS
* 1000);
428 "Failed to read command %#02hhx, ret=%d\n",
434 if (resp
& SI1133_CMD_ERR_MASK
) {
435 err
= si1133_parse_response_err(dev
, resp
, cmd
);
436 si1133_cmd_reset_counter(data
);
438 data
->rsp_seq
= expected_seq
;
442 mutex_unlock(&data
->mutex
);
447 static int si1133_param_set(struct si1133_data
*data
, u8 param
, u32 value
)
449 int err
= regmap_write(data
->regmap
, SI1133_REG_HOSTIN0
, value
);
454 return si1133_command(data
, SI1133_CMD_PARAM_SET
|
455 (param
& SI1133_CMD_PARAM_MASK
));
458 static int si1133_param_query(struct si1133_data
*data
, u8 param
, u32
*result
)
460 int err
= si1133_command(data
, SI1133_CMD_PARAM_QUERY
|
461 (param
& SI1133_CMD_PARAM_MASK
));
465 return regmap_read(data
->regmap
, SI1133_REG_RESPONSE1
, result
);
468 #define SI1133_CHANNEL(_ch, _type) \
471 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
472 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | \
473 BIT(IIO_CHAN_INFO_SCALE) | \
474 BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
476 static const struct iio_chan_spec si1133_channels[] = {
479 .info_mask_separate
= BIT(IIO_CHAN_INFO_PROCESSED
),
483 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_WHITE
, IIO_INTENSITY
)
484 .channel2
= IIO_MOD_LIGHT_BOTH
,
487 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_LARGE_WHITE
, IIO_INTENSITY
)
488 .channel2
= IIO_MOD_LIGHT_BOTH
,
489 .extend_name
= "large",
492 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_SMALL_IR
, IIO_INTENSITY
)
493 .extend_name
= "small",
495 .channel2
= IIO_MOD_LIGHT_IR
,
498 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_MED_IR
, IIO_INTENSITY
)
500 .channel2
= IIO_MOD_LIGHT_IR
,
503 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_LARGE_IR
, IIO_INTENSITY
)
504 .extend_name
= "large",
506 .channel2
= IIO_MOD_LIGHT_IR
,
509 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_UV
, IIO_UVINDEX
)
512 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_UV_DEEP
, IIO_UVINDEX
)
514 .channel2
= IIO_MOD_LIGHT_DUV
,
518 static int si1133_get_int_time_index(int milliseconds
, int nanoseconds
)
522 for (i
= 0; i
< ARRAY_SIZE(si1133_int_time_table
); i
++) {
523 if (milliseconds
== si1133_int_time_table
[i
][0] &&
524 nanoseconds
== si1133_int_time_table
[i
][1])
530 static int si1133_set_integration_time(struct si1133_data
*data
, u8 adc
,
531 int milliseconds
, int nanoseconds
)
535 index
= si1133_get_int_time_index(milliseconds
, nanoseconds
);
539 data
->adc_sens
[adc
] &= 0xF0;
540 data
->adc_sens
[adc
] |= index
;
542 return si1133_param_set(data
, SI1133_PARAM_REG_ADCSENS(0),
543 data
->adc_sens
[adc
]);
546 static int si1133_set_chlist(struct si1133_data
*data
, u8 scan_mask
)
548 /* channel list already set, no need to reprogram */
549 if (data
->scan_mask
== scan_mask
)
552 data
->scan_mask
= scan_mask
;
554 return si1133_param_set(data
, SI1133_PARAM_REG_CHAN_LIST
, scan_mask
);
557 static int si1133_chan_set_adcconfig(struct si1133_data
*data
, u8 adc
,
562 err
= si1133_param_set(data
, SI1133_PARAM_REG_ADCCONFIG(adc
),
567 data
->adc_config
[adc
] = adc_config
;
572 static int si1133_update_adcconfig(struct si1133_data
*data
, uint8_t adc
,
573 u8 mask
, u8 shift
, u8 value
)
578 err
= si1133_param_query(data
, SI1133_PARAM_REG_ADCCONFIG(adc
),
584 adc_config
|= (value
<< shift
);
586 return si1133_chan_set_adcconfig(data
, adc
, adc_config
);
589 static int si1133_set_adcmux(struct si1133_data
*data
, u8 adc
, u8 mux
)
591 if ((mux
& data
->adc_config
[adc
]) == mux
)
592 return 0; /* mux already set to correct value */
594 return si1133_update_adcconfig(data
, adc
, SI1133_ADCMUX_MASK
, 0, mux
);
597 static int si1133_force_measurement(struct si1133_data
*data
)
599 return si1133_command(data
, SI1133_CMD_FORCE
);
602 static int si1133_bulk_read(struct si1133_data
*data
, u8 start_reg
, u8 length
,
607 err
= si1133_force_measurement(data
);
611 return regmap_bulk_read(data
->regmap
, start_reg
, buffer
, length
);
614 static int si1133_measure(struct si1133_data
*data
,
615 struct iio_chan_spec
const *chan
,
620 u8 buffer
[SI1133_MEASURE_BUFFER_SIZE
];
622 err
= si1133_set_adcmux(data
, 0, chan
->channel
);
626 /* Deactivate lux measurements if they were active */
627 err
= si1133_set_chlist(data
, BIT(0));
631 err
= si1133_bulk_read(data
, SI1133_REG_HOSTOUT(0), sizeof(buffer
),
636 *val
= sign_extend32((buffer
[0] << 16) | (buffer
[1] << 8) | buffer
[2],
637 SI1133_SIGN_BIT_INDEX
);
642 static irqreturn_t
si1133_threaded_irq_handler(int irq
, void *private)
644 struct iio_dev
*iio_dev
= private;
645 struct si1133_data
*data
= iio_priv(iio_dev
);
649 err
= regmap_read(data
->regmap
, SI1133_REG_IRQ_STATUS
, &irq_status
);
651 dev_err_ratelimited(&iio_dev
->dev
, "Error reading IRQ\n");
655 if (irq_status
!= data
->scan_mask
)
659 complete(&data
->completion
);
664 static int si1133_scale_to_swgain(int scale_integer
, int scale_fractional
)
666 scale_integer
= find_closest(scale_integer
, si1133_scale_available
,
667 ARRAY_SIZE(si1133_scale_available
));
668 if (scale_integer
< 0 ||
669 scale_integer
> ARRAY_SIZE(si1133_scale_available
) ||
670 scale_fractional
!= 0)
673 return scale_integer
;
676 static int si1133_chan_set_adcsens(struct si1133_data
*data
, u8 adc
,
681 err
= si1133_param_set(data
, SI1133_PARAM_REG_ADCSENS(adc
), adc_sens
);
685 data
->adc_sens
[adc
] = adc_sens
;
690 static int si1133_update_adcsens(struct si1133_data
*data
, u8 mask
,
696 err
= si1133_param_query(data
, SI1133_PARAM_REG_ADCSENS(0),
702 adc_sens
|= (value
<< shift
);
704 return si1133_chan_set_adcsens(data
, 0, adc_sens
);
707 static int si1133_get_lux(struct si1133_data
*data
, int *val
)
714 u8 buffer
[SI1133_LUX_BUFFER_SIZE
];
716 /* Activate lux channels */
717 err
= si1133_set_chlist(data
, SI1133_LUX_ADC_MASK
);
721 err
= si1133_bulk_read(data
, SI1133_REG_HOSTOUT(0),
722 SI1133_LUX_BUFFER_SIZE
, buffer
);
727 sign_extend32((buffer
[0] << 16) | (buffer
[1] << 8) | buffer
[2],
728 SI1133_SIGN_BIT_INDEX
);
731 sign_extend32((buffer
[3] << 16) | (buffer
[4] << 8) | buffer
[5],
732 SI1133_SIGN_BIT_INDEX
);
734 ir
= sign_extend32((buffer
[6] << 16) | (buffer
[7] << 8) | buffer
[8],
735 SI1133_SIGN_BIT_INDEX
);
737 if (high_vis
> SI1133_ADC_THRESHOLD
|| ir
> SI1133_ADC_THRESHOLD
)
738 lux
= si1133_calc_polynomial(high_vis
, ir
,
739 SI1133_INPUT_FRACTION_HIGH
,
740 ARRAY_SIZE(lux_coeff
.coeff_high
),
741 &lux_coeff
.coeff_high
[0]);
743 lux
= si1133_calc_polynomial(low_vis
, ir
,
744 SI1133_INPUT_FRACTION_LOW
,
745 ARRAY_SIZE(lux_coeff
.coeff_low
),
746 &lux_coeff
.coeff_low
[0]);
748 *val
= lux
>> SI1133_LUX_OUTPUT_FRACTION
;
753 static int si1133_read_raw(struct iio_dev
*iio_dev
,
754 struct iio_chan_spec
const *chan
,
755 int *val
, int *val2
, long mask
)
757 struct si1133_data
*data
= iio_priv(iio_dev
);
758 u8 adc_sens
= data
->adc_sens
[0];
762 case IIO_CHAN_INFO_PROCESSED
:
763 switch (chan
->type
) {
765 err
= si1133_get_lux(data
, val
);
773 case IIO_CHAN_INFO_RAW
:
774 switch (chan
->type
) {
777 err
= si1133_measure(data
, chan
, val
);
785 case IIO_CHAN_INFO_INT_TIME
:
786 switch (chan
->type
) {
789 adc_sens
&= SI1133_ADCSENS_HW_GAIN_MASK
;
791 *val
= si1133_int_time_table
[adc_sens
][0];
792 *val2
= si1133_int_time_table
[adc_sens
][1];
793 return IIO_VAL_INT_PLUS_MICRO
;
797 case IIO_CHAN_INFO_SCALE
:
798 switch (chan
->type
) {
801 adc_sens
&= SI1133_ADCSENS_SCALE_MASK
;
802 adc_sens
>>= SI1133_ADCSENS_SCALE_SHIFT
;
804 *val
= BIT(adc_sens
);
810 case IIO_CHAN_INFO_HARDWAREGAIN
:
811 switch (chan
->type
) {
814 adc_sens
>>= SI1133_ADCSENS_HSIG_SHIFT
;
827 static int si1133_write_raw(struct iio_dev
*iio_dev
,
828 struct iio_chan_spec
const *chan
,
829 int val
, int val2
, long mask
)
831 struct si1133_data
*data
= iio_priv(iio_dev
);
834 case IIO_CHAN_INFO_SCALE
:
835 switch (chan
->type
) {
838 val
= si1133_scale_to_swgain(val
, val2
);
842 return si1133_update_adcsens(data
,
843 SI1133_ADCSENS_SCALE_MASK
,
844 SI1133_ADCSENS_SCALE_SHIFT
,
849 case IIO_CHAN_INFO_INT_TIME
:
850 return si1133_set_integration_time(data
, 0, val
, val2
);
851 case IIO_CHAN_INFO_HARDWAREGAIN
:
852 switch (chan
->type
) {
855 if (val
!= 0 && val
!= 1)
858 return si1133_update_adcsens(data
,
859 SI1133_ADCSENS_HSIG_MASK
,
860 SI1133_ADCSENS_HSIG_SHIFT
,
870 static struct attribute
*si1133_attributes
[] = {
871 &iio_const_attr_integration_time_available
.dev_attr
.attr
,
872 &iio_const_attr_scale_available
.dev_attr
.attr
,
876 static const struct attribute_group si1133_attribute_group
= {
877 .attrs
= si1133_attributes
,
880 static const struct iio_info si1133_info
= {
881 .read_raw
= si1133_read_raw
,
882 .write_raw
= si1133_write_raw
,
883 .attrs
= &si1133_attribute_group
,
887 * si1133_init_lux_channels - Configure 3 different channels(adc) (1,2 and 3)
888 * The channel configuration for the lux measurement was taken from :
889 * https://siliconlabs.github.io/Gecko_SDK_Doc/efm32zg/html/si1133_8c_source.html#l00578
891 * Reserved the channel 0 for the other raw measurements
893 static int si1133_init_lux_channels(struct si1133_data
*data
)
897 err
= si1133_chan_set_adcconfig(data
, 1,
898 SI1133_ADCCONFIG_DECIM_RATE(1) |
899 SI1133_PARAM_ADCMUX_LARGE_WHITE
);
903 err
= si1133_param_set(data
, SI1133_PARAM_REG_ADCPOST(1),
904 SI1133_ADCPOST_24BIT_EN
|
905 SI1133_ADCPOST_POSTSHIFT_BITQTY(0));
908 err
= si1133_chan_set_adcsens(data
, 1, SI1133_ADCSENS_HSIG_MASK
|
909 SI1133_ADCSENS_NB_MEAS(64) | _48_8_us
);
913 err
= si1133_chan_set_adcconfig(data
, 2,
914 SI1133_ADCCONFIG_DECIM_RATE(1) |
915 SI1133_PARAM_ADCMUX_LARGE_WHITE
);
919 err
= si1133_param_set(data
, SI1133_PARAM_REG_ADCPOST(2),
920 SI1133_ADCPOST_24BIT_EN
|
921 SI1133_ADCPOST_POSTSHIFT_BITQTY(2));
925 err
= si1133_chan_set_adcsens(data
, 2, SI1133_ADCSENS_HSIG_MASK
|
926 SI1133_ADCSENS_NB_MEAS(1) | _3_120_0_us
);
930 err
= si1133_chan_set_adcconfig(data
, 3,
931 SI1133_ADCCONFIG_DECIM_RATE(1) |
932 SI1133_PARAM_ADCMUX_MED_IR
);
936 err
= si1133_param_set(data
, SI1133_PARAM_REG_ADCPOST(3),
937 SI1133_ADCPOST_24BIT_EN
|
938 SI1133_ADCPOST_POSTSHIFT_BITQTY(2));
942 return si1133_chan_set_adcsens(data
, 3, SI1133_ADCSENS_HSIG_MASK
|
943 SI1133_ADCSENS_NB_MEAS(64) | _48_8_us
);
946 static int si1133_initialize(struct si1133_data
*data
)
950 err
= si1133_cmd_reset_sw(data
);
954 /* Turn off autonomous mode */
955 err
= si1133_param_set(data
, SI1133_REG_MEAS_RATE
, 0);
959 err
= si1133_init_lux_channels(data
);
963 return regmap_write(data
->regmap
, SI1133_REG_IRQ_ENABLE
,
964 SI1133_IRQ_CHANNEL_ENABLE
);
967 static int si1133_validate_ids(struct iio_dev
*iio_dev
)
969 struct si1133_data
*data
= iio_priv(iio_dev
);
971 unsigned int part_id
, rev_id
, mfr_id
;
974 err
= regmap_read(data
->regmap
, SI1133_REG_PART_ID
, &part_id
);
978 err
= regmap_read(data
->regmap
, SI1133_REG_REV_ID
, &rev_id
);
982 err
= regmap_read(data
->regmap
, SI1133_REG_MFR_ID
, &mfr_id
);
986 dev_info(&iio_dev
->dev
,
987 "Device ID part %#02hhx rev %#02hhx mfr %#02hhx\n",
988 part_id
, rev_id
, mfr_id
);
989 if (part_id
!= SI1133_PART_ID
) {
990 dev_err(&iio_dev
->dev
,
991 "Part ID mismatch got %#02hhx, expected %#02x\n",
992 part_id
, SI1133_PART_ID
);
999 static int si1133_probe(struct i2c_client
*client
,
1000 const struct i2c_device_id
*id
)
1002 struct si1133_data
*data
;
1003 struct iio_dev
*iio_dev
;
1006 iio_dev
= devm_iio_device_alloc(&client
->dev
, sizeof(*data
));
1010 data
= iio_priv(iio_dev
);
1012 init_completion(&data
->completion
);
1014 data
->regmap
= devm_regmap_init_i2c(client
, &si1133_regmap_config
);
1015 if (IS_ERR(data
->regmap
)) {
1016 err
= PTR_ERR(data
->regmap
);
1017 dev_err(&client
->dev
, "Failed to initialise regmap: %d\n", err
);
1021 i2c_set_clientdata(client
, iio_dev
);
1022 data
->client
= client
;
1024 iio_dev
->dev
.parent
= &client
->dev
;
1025 iio_dev
->name
= id
->name
;
1026 iio_dev
->channels
= si1133_channels
;
1027 iio_dev
->num_channels
= ARRAY_SIZE(si1133_channels
);
1028 iio_dev
->info
= &si1133_info
;
1029 iio_dev
->modes
= INDIO_DIRECT_MODE
;
1031 mutex_init(&data
->mutex
);
1033 err
= si1133_validate_ids(iio_dev
);
1037 err
= si1133_initialize(data
);
1039 dev_err(&client
->dev
,
1040 "Error when initializing chip: %d\n", err
);
1045 dev_err(&client
->dev
,
1046 "Required interrupt not provided, cannot proceed\n");
1050 err
= devm_request_threaded_irq(&client
->dev
, client
->irq
,
1052 si1133_threaded_irq_handler
,
1053 IRQF_ONESHOT
| IRQF_SHARED
,
1054 client
->name
, iio_dev
);
1056 dev_warn(&client
->dev
, "Request irq %d failed: %i\n",
1061 return devm_iio_device_register(&client
->dev
, iio_dev
);
1064 static const struct i2c_device_id si1133_ids
[] = {
1068 MODULE_DEVICE_TABLE(i2c
, si1133_ids
);
1070 static struct i2c_driver si1133_driver
= {
1074 .probe
= si1133_probe
,
1075 .id_table
= si1133_ids
,
1078 module_i2c_driver(si1133_driver
);
1080 MODULE_AUTHOR("Maxime Roussin-Belanger <maxime.roussinbelanger@gmail.com>");
1081 MODULE_DESCRIPTION("Silabs SI1133, UV index sensor and ambient light sensor driver");
1082 MODULE_LICENSE("GPL");