drivers/media/platform/exynos4-is/fimc-is-command.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Samsung Exynos4x12 FIMC-IS (Imaging Subsystem) driver
   4  *
   5  * FIMC-IS command set definitions
   6  *
   7  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
   8  *
   9  * Authors: Younghwan Joo <yhwan.joo@samsung.com>
  10  *          Sylwester Nawrocki <s.nawrocki@samsung.com>
  11  */
  12
  13 #ifndef FIMC_IS_CMD_H_
  14 #define FIMC_IS_CMD_H_
  15
  16 #define FIMC_IS_COMMAND_VER     110 /* FIMC-IS command set version 1.10 */
  17
  18 /* Enumeration of commands between the FIMC-IS and the host processor. */
  19
  20 /* HOST to FIMC-IS */
  21 #define HIC_PREVIEW_STILL       0x0001
  22 #define HIC_PREVIEW_VIDEO       0x0002
  23 #define HIC_CAPTURE_STILL       0x0003
  24 #define HIC_CAPTURE_VIDEO       0x0004
  25 #define HIC_STREAM_ON           0x0005
  26 #define HIC_STREAM_OFF          0x0006
  27 #define HIC_SET_PARAMETER       0x0007
  28 #define HIC_GET_PARAMETER       0x0008
  29 #define HIC_SET_TUNE            0x0009
  30 #define HIC_GET_STATUS          0x000b
  31 /* Sensor part */
  32 #define HIC_OPEN_SENSOR         0x000c
  33 #define HIC_CLOSE_SENSOR        0x000d
  34 #define HIC_SIMMIAN_INIT        0x000e
  35 #define HIC_SIMMIAN_WRITE       0x000f
  36 #define HIC_SIMMIAN_READ        0x0010
  37 #define HIC_POWER_DOWN          0x0011
  38 #define HIC_GET_SET_FILE_ADDR   0x0012
  39 #define HIC_LOAD_SET_FILE       0x0013
  40 #define HIC_MSG_CONFIG          0x0014
  41 #define HIC_MSG_TEST            0x0015
  42 /* FIMC-IS to HOST */
  43 #define IHC_GET_SENSOR_NUM      0x1000
  44 #define IHC_SET_SHOT_MARK       0x1001
  45 /* parameter1: frame number */
  46 /* parameter2: confidence level (smile 0~100) */
  47 /* parameter3: confidence level (blink 0~100) */
  48 #define IHC_SET_FACE_MARK       0x1002
  49 /* parameter1: coordinate count */
  50 /* parameter2: coordinate buffer address */
  51 #define IHC_FRAME_DONE          0x1003
  52 /* parameter1: frame start number */
  53 /* parameter2: frame count */
  54 #define IHC_AA_DONE             0x1004
  55 #define IHC_NOT_READY           0x1005
  56
  57 #define IH_REPLY_DONE           0x2000
  58 #define IH_REPLY_NOT_DONE       0x2001
  59
  60 enum fimc_is_scenario {
  61         IS_SC_PREVIEW_STILL,
  62         IS_SC_PREVIEW_VIDEO,
  63         IS_SC_CAPTURE_STILL,
  64         IS_SC_CAPTURE_VIDEO,
  65         IS_SC_MAX
  66 };
  67
  68 enum fimc_is_sub_scenario {
  69         IS_SC_SUB_DEFAULT,
  70         IS_SC_SUB_PS_VTCALL,
  71         IS_SC_SUB_CS_VTCALL,
  72         IS_SC_SUB_PV_VTCALL,
  73         IS_SC_SUB_CV_VTCALL,
  74 };
  75
  76 struct is_common_regs {
  77         u32 hicmd;
  78         u32 hic_sensorid;
  79         u32 hic_param[4];
  80         u32 reserved1[4];
  81
  82         u32 ihcmd;
  83         u32 ihc_sensorid;
  84         u32 ihc_param[4];
  85         u32 reserved2[4];
  86
  87         u32 isp_sensor_id;
  88         u32 isp_param[2];
  89         u32 reserved3[1];
  90
  91         u32 scc_sensor_id;
  92         u32 scc_param[2];
  93         u32 reserved4[1];
  94
  95         u32 dnr_sensor_id;
  96         u32 dnr_param[2];
  97         u32 reserved5[1];
  98
  99         u32 scp_sensor_id;
 100         u32 scp_param[2];
 101         u32 reserved6[29];
 102 } __packed;
 103
 104 struct is_mcuctl_reg {
 105         u32 mcuctl;
 106         u32 bboar;
 107
 108         u32 intgr0;
 109         u32 intcr0;
 110         u32 intmr0;
 111         u32 intsr0;
 112         u32 intmsr0;
 113
 114         u32 intgr1;
 115         u32 intcr1;
 116         u32 intmr1;
 117         u32 intsr1;
 118         u32 intmsr1;
 119
 120         u32 intcr2;
 121         u32 intmr2;
 122         u32 intsr2;
 123         u32 intmsr2;
 124
 125         u32 gpoctrl;
 126         u32 cpoenctlr;
 127         u32 gpictlr;
 128
 129         u32 reserved[0xd];
 130
 131         struct is_common_regs common;
 132 } __packed;
 133
 134 #endif /* FIMC_IS_CMD_H_ */