1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Freescale MC44S803 Low Power CMOS Broadband Tuner
5 * Copyright (c) 2009 Jochen Friedrich <jochen@scram.de>
8 #include <linux/module.h>
9 #include <linux/delay.h>
10 #include <linux/dvb/frontend.h>
11 #include <linux/i2c.h>
12 #include <linux/slab.h>
14 #include <media/dvb_frontend.h>
17 #include "mc44s803_priv.h"
19 #define mc_printk(level, format, arg...) \
20 printk(level "mc44s803: " format , ## arg)
22 /* Writes a single register */
23 static int mc44s803_writereg(struct mc44s803_priv
*priv
, u32 val
)
26 struct i2c_msg msg
= {
27 .addr
= priv
->cfg
->i2c_address
, .flags
= 0, .buf
= buf
, .len
= 3
30 buf
[0] = (val
& 0xff0000) >> 16;
31 buf
[1] = (val
& 0xff00) >> 8;
32 buf
[2] = (val
& 0xff);
34 if (i2c_transfer(priv
->i2c
, &msg
, 1) != 1) {
35 mc_printk(KERN_WARNING
, "I2C write failed\n");
41 /* Reads a single register */
42 static int mc44s803_readreg(struct mc44s803_priv
*priv
, u8 reg
, u32
*val
)
47 struct i2c_msg msg
[] = {
48 { .addr
= priv
->cfg
->i2c_address
, .flags
= I2C_M_RD
,
49 .buf
= buf
, .len
= 3 },
52 wval
= MC44S803_REG_SM(MC44S803_REG_DATAREG
, MC44S803_ADDR
) |
53 MC44S803_REG_SM(reg
, MC44S803_D
);
55 ret
= mc44s803_writereg(priv
, wval
);
59 if (i2c_transfer(priv
->i2c
, msg
, 1) != 1) {
60 mc_printk(KERN_WARNING
, "I2C read failed\n");
64 *val
= (buf
[0] << 16) | (buf
[1] << 8) | buf
[2];
69 static void mc44s803_release(struct dvb_frontend
*fe
)
71 struct mc44s803_priv
*priv
= fe
->tuner_priv
;
73 fe
->tuner_priv
= NULL
;
77 static int mc44s803_init(struct dvb_frontend
*fe
)
79 struct mc44s803_priv
*priv
= fe
->tuner_priv
;
83 if (fe
->ops
.i2c_gate_ctrl
)
84 fe
->ops
.i2c_gate_ctrl(fe
, 1);
87 val
= MC44S803_REG_SM(MC44S803_REG_RESET
, MC44S803_ADDR
) |
88 MC44S803_REG_SM(1, MC44S803_RS
);
90 err
= mc44s803_writereg(priv
, val
);
94 val
= MC44S803_REG_SM(MC44S803_REG_RESET
, MC44S803_ADDR
);
96 err
= mc44s803_writereg(priv
, val
);
100 /* Power Up and Start Osc */
102 val
= MC44S803_REG_SM(MC44S803_REG_REFOSC
, MC44S803_ADDR
) |
103 MC44S803_REG_SM(0xC0, MC44S803_REFOSC
) |
104 MC44S803_REG_SM(1, MC44S803_OSCSEL
);
106 err
= mc44s803_writereg(priv
, val
);
110 val
= MC44S803_REG_SM(MC44S803_REG_POWER
, MC44S803_ADDR
) |
111 MC44S803_REG_SM(0x200, MC44S803_POWER
);
113 err
= mc44s803_writereg(priv
, val
);
119 val
= MC44S803_REG_SM(MC44S803_REG_REFOSC
, MC44S803_ADDR
) |
120 MC44S803_REG_SM(0x40, MC44S803_REFOSC
) |
121 MC44S803_REG_SM(1, MC44S803_OSCSEL
);
123 err
= mc44s803_writereg(priv
, val
);
131 val
= MC44S803_REG_SM(MC44S803_REG_MIXER
, MC44S803_ADDR
) |
132 MC44S803_REG_SM(1, MC44S803_TRI_STATE
) |
133 MC44S803_REG_SM(0x7F, MC44S803_MIXER_RES
);
135 err
= mc44s803_writereg(priv
, val
);
139 /* Setup Cirquit Adjust */
141 val
= MC44S803_REG_SM(MC44S803_REG_CIRCADJ
, MC44S803_ADDR
) |
142 MC44S803_REG_SM(1, MC44S803_G1
) |
143 MC44S803_REG_SM(1, MC44S803_G3
) |
144 MC44S803_REG_SM(0x3, MC44S803_CIRCADJ_RES
) |
145 MC44S803_REG_SM(1, MC44S803_G6
) |
146 MC44S803_REG_SM(priv
->cfg
->dig_out
, MC44S803_S1
) |
147 MC44S803_REG_SM(0x3, MC44S803_LP
) |
148 MC44S803_REG_SM(1, MC44S803_CLRF
) |
149 MC44S803_REG_SM(1, MC44S803_CLIF
);
151 err
= mc44s803_writereg(priv
, val
);
155 val
= MC44S803_REG_SM(MC44S803_REG_CIRCADJ
, MC44S803_ADDR
) |
156 MC44S803_REG_SM(1, MC44S803_G1
) |
157 MC44S803_REG_SM(1, MC44S803_G3
) |
158 MC44S803_REG_SM(0x3, MC44S803_CIRCADJ_RES
) |
159 MC44S803_REG_SM(1, MC44S803_G6
) |
160 MC44S803_REG_SM(priv
->cfg
->dig_out
, MC44S803_S1
) |
161 MC44S803_REG_SM(0x3, MC44S803_LP
);
163 err
= mc44s803_writereg(priv
, val
);
169 val
= MC44S803_REG_SM(MC44S803_REG_DIGTUNE
, MC44S803_ADDR
) |
170 MC44S803_REG_SM(3, MC44S803_XOD
);
172 err
= mc44s803_writereg(priv
, val
);
178 val
= MC44S803_REG_SM(MC44S803_REG_LNAAGC
, MC44S803_ADDR
) |
179 MC44S803_REG_SM(1, MC44S803_AT1
) |
180 MC44S803_REG_SM(1, MC44S803_AT2
) |
181 MC44S803_REG_SM(1, MC44S803_AGC_AN_DIG
) |
182 MC44S803_REG_SM(1, MC44S803_AGC_READ_EN
) |
183 MC44S803_REG_SM(1, MC44S803_LNA0
);
185 err
= mc44s803_writereg(priv
, val
);
189 if (fe
->ops
.i2c_gate_ctrl
)
190 fe
->ops
.i2c_gate_ctrl(fe
, 0);
194 if (fe
->ops
.i2c_gate_ctrl
)
195 fe
->ops
.i2c_gate_ctrl(fe
, 0);
197 mc_printk(KERN_WARNING
, "I/O Error\n");
201 static int mc44s803_set_params(struct dvb_frontend
*fe
)
203 struct mc44s803_priv
*priv
= fe
->tuner_priv
;
204 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
205 u32 r1
, r2
, n1
, n2
, lo1
, lo2
, freq
, val
;
208 priv
->frequency
= c
->frequency
;
210 r1
= MC44S803_OSC
/ 1000000;
211 r2
= MC44S803_OSC
/ 100000;
213 n1
= (c
->frequency
+ MC44S803_IF1
+ 500000) / 1000000;
214 freq
= MC44S803_OSC
/ r1
* n1
;
215 lo1
= ((60 * n1
) + (r1
/ 2)) / r1
;
216 freq
= freq
- c
->frequency
;
218 n2
= (freq
- MC44S803_IF2
+ 50000) / 100000;
219 lo2
= ((60 * n2
) + (r2
/ 2)) / r2
;
221 if (fe
->ops
.i2c_gate_ctrl
)
222 fe
->ops
.i2c_gate_ctrl(fe
, 1);
224 val
= MC44S803_REG_SM(MC44S803_REG_REFDIV
, MC44S803_ADDR
) |
225 MC44S803_REG_SM(r1
-1, MC44S803_R1
) |
226 MC44S803_REG_SM(r2
-1, MC44S803_R2
) |
227 MC44S803_REG_SM(1, MC44S803_REFBUF_EN
);
229 err
= mc44s803_writereg(priv
, val
);
233 val
= MC44S803_REG_SM(MC44S803_REG_LO1
, MC44S803_ADDR
) |
234 MC44S803_REG_SM(n1
-2, MC44S803_LO1
);
236 err
= mc44s803_writereg(priv
, val
);
240 val
= MC44S803_REG_SM(MC44S803_REG_LO2
, MC44S803_ADDR
) |
241 MC44S803_REG_SM(n2
-2, MC44S803_LO2
);
243 err
= mc44s803_writereg(priv
, val
);
247 val
= MC44S803_REG_SM(MC44S803_REG_DIGTUNE
, MC44S803_ADDR
) |
248 MC44S803_REG_SM(1, MC44S803_DA
) |
249 MC44S803_REG_SM(lo1
, MC44S803_LO_REF
) |
250 MC44S803_REG_SM(1, MC44S803_AT
);
252 err
= mc44s803_writereg(priv
, val
);
256 val
= MC44S803_REG_SM(MC44S803_REG_DIGTUNE
, MC44S803_ADDR
) |
257 MC44S803_REG_SM(2, MC44S803_DA
) |
258 MC44S803_REG_SM(lo2
, MC44S803_LO_REF
) |
259 MC44S803_REG_SM(1, MC44S803_AT
);
261 err
= mc44s803_writereg(priv
, val
);
265 if (fe
->ops
.i2c_gate_ctrl
)
266 fe
->ops
.i2c_gate_ctrl(fe
, 0);
271 if (fe
->ops
.i2c_gate_ctrl
)
272 fe
->ops
.i2c_gate_ctrl(fe
, 0);
274 mc_printk(KERN_WARNING
, "I/O Error\n");
278 static int mc44s803_get_frequency(struct dvb_frontend
*fe
, u32
*frequency
)
280 struct mc44s803_priv
*priv
= fe
->tuner_priv
;
281 *frequency
= priv
->frequency
;
285 static int mc44s803_get_if_frequency(struct dvb_frontend
*fe
, u32
*frequency
)
287 *frequency
= MC44S803_IF2
; /* 36.125 MHz */
291 static const struct dvb_tuner_ops mc44s803_tuner_ops
= {
293 .name
= "Freescale MC44S803",
294 .frequency_min_hz
= 48 * MHz
,
295 .frequency_max_hz
= 1000 * MHz
,
296 .frequency_step_hz
= 100 * kHz
,
299 .release
= mc44s803_release
,
300 .init
= mc44s803_init
,
301 .set_params
= mc44s803_set_params
,
302 .get_frequency
= mc44s803_get_frequency
,
303 .get_if_frequency
= mc44s803_get_if_frequency
,
306 /* This functions tries to identify a MC44S803 tuner by reading the ID
307 register. This is hasty. */
308 struct dvb_frontend
*mc44s803_attach(struct dvb_frontend
*fe
,
309 struct i2c_adapter
*i2c
, struct mc44s803_config
*cfg
)
311 struct mc44s803_priv
*priv
;
318 priv
= kzalloc(sizeof(struct mc44s803_priv
), GFP_KERNEL
);
326 if (fe
->ops
.i2c_gate_ctrl
)
327 fe
->ops
.i2c_gate_ctrl(fe
, 1); /* open i2c_gate */
329 ret
= mc44s803_readreg(priv
, MC44S803_REG_ID
, ®
);
333 id
= MC44S803_REG_MS(reg
, MC44S803_ID
);
336 mc_printk(KERN_ERR
, "unsupported ID (%x should be 0x14)\n",
341 mc_printk(KERN_INFO
, "successfully identified (ID = %x)\n", id
);
342 memcpy(&fe
->ops
.tuner_ops
, &mc44s803_tuner_ops
,
343 sizeof(struct dvb_tuner_ops
));
345 fe
->tuner_priv
= priv
;
347 if (fe
->ops
.i2c_gate_ctrl
)
348 fe
->ops
.i2c_gate_ctrl(fe
, 0); /* close i2c_gate */
353 if (fe
->ops
.i2c_gate_ctrl
)
354 fe
->ops
.i2c_gate_ctrl(fe
, 0); /* close i2c_gate */
359 EXPORT_SYMBOL(mc44s803_attach
);
361 MODULE_AUTHOR("Jochen Friedrich");
362 MODULE_DESCRIPTION("Freescale MC44S803 silicon tuner driver");
363 MODULE_LICENSE("GPL");