gpio: rcar: Fix runtime PM imbalance on error
[linux/fpc-iii.git] / drivers / net / ethernet / aquantia / atlantic / aq_vec.c
blobf40a427970dcee2234dc5bfbdfe912ebf81ab023
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * aQuantia Corporation Network Driver
4 * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
5 */
7 /* File aq_vec.c: Definition of common structure for vector of Rx and Tx rings.
8 * Definition of functions for Rx and Tx rings. Friendly module for aq_nic.
9 */
11 #include "aq_vec.h"
12 #include "aq_nic.h"
13 #include "aq_ring.h"
14 #include "aq_hw.h"
16 #include <linux/netdevice.h>
18 struct aq_vec_s {
19 const struct aq_hw_ops *aq_hw_ops;
20 struct aq_hw_s *aq_hw;
21 struct aq_nic_s *aq_nic;
22 unsigned int tx_rings;
23 unsigned int rx_rings;
24 struct aq_ring_param_s aq_ring_param;
25 struct napi_struct napi;
26 struct aq_ring_s ring[AQ_CFG_TCS_MAX][2];
29 #define AQ_VEC_TX_ID 0
30 #define AQ_VEC_RX_ID 1
32 static int aq_vec_poll(struct napi_struct *napi, int budget)
34 struct aq_vec_s *self = container_of(napi, struct aq_vec_s, napi);
35 unsigned int sw_tail_old = 0U;
36 struct aq_ring_s *ring = NULL;
37 bool was_tx_cleaned = true;
38 unsigned int i = 0U;
39 int work_done = 0;
40 int err = 0;
42 if (!self) {
43 err = -EINVAL;
44 } else {
45 for (i = 0U, ring = self->ring[0];
46 self->tx_rings > i; ++i, ring = self->ring[i]) {
47 if (self->aq_hw_ops->hw_ring_tx_head_update) {
48 err = self->aq_hw_ops->hw_ring_tx_head_update(
49 self->aq_hw,
50 &ring[AQ_VEC_TX_ID]);
51 if (err < 0)
52 goto err_exit;
55 if (ring[AQ_VEC_TX_ID].sw_head !=
56 ring[AQ_VEC_TX_ID].hw_head) {
57 was_tx_cleaned = aq_ring_tx_clean(&ring[AQ_VEC_TX_ID]);
58 aq_ring_update_queue_state(&ring[AQ_VEC_TX_ID]);
61 err = self->aq_hw_ops->hw_ring_rx_receive(self->aq_hw,
62 &ring[AQ_VEC_RX_ID]);
63 if (err < 0)
64 goto err_exit;
66 if (ring[AQ_VEC_RX_ID].sw_head !=
67 ring[AQ_VEC_RX_ID].hw_head) {
68 err = aq_ring_rx_clean(&ring[AQ_VEC_RX_ID],
69 napi,
70 &work_done,
71 budget - work_done);
72 if (err < 0)
73 goto err_exit;
75 sw_tail_old = ring[AQ_VEC_RX_ID].sw_tail;
77 err = aq_ring_rx_fill(&ring[AQ_VEC_RX_ID]);
78 if (err < 0)
79 goto err_exit;
81 err = self->aq_hw_ops->hw_ring_rx_fill(
82 self->aq_hw,
83 &ring[AQ_VEC_RX_ID], sw_tail_old);
84 if (err < 0)
85 goto err_exit;
89 err_exit:
90 if (!was_tx_cleaned)
91 work_done = budget;
93 if (work_done < budget) {
94 napi_complete_done(napi, work_done);
95 self->aq_hw_ops->hw_irq_enable(self->aq_hw,
96 1U << self->aq_ring_param.vec_idx);
100 return work_done;
103 struct aq_vec_s *aq_vec_alloc(struct aq_nic_s *aq_nic, unsigned int idx,
104 struct aq_nic_cfg_s *aq_nic_cfg)
106 struct aq_ring_s *ring = NULL;
107 struct aq_vec_s *self = NULL;
108 unsigned int i = 0U;
109 int err = 0;
111 self = kzalloc(sizeof(*self), GFP_KERNEL);
112 if (!self) {
113 err = -ENOMEM;
114 goto err_exit;
117 self->aq_nic = aq_nic;
118 self->aq_ring_param.vec_idx = idx;
119 self->aq_ring_param.cpu =
120 idx + aq_nic_cfg->aq_rss.base_cpu_number;
122 cpumask_set_cpu(self->aq_ring_param.cpu,
123 &self->aq_ring_param.affinity_mask);
125 self->tx_rings = 0;
126 self->rx_rings = 0;
128 netif_napi_add(aq_nic_get_ndev(aq_nic), &self->napi,
129 aq_vec_poll, AQ_CFG_NAPI_WEIGHT);
131 for (i = 0; i < aq_nic_cfg->tcs; ++i) {
132 unsigned int idx_ring = AQ_NIC_TCVEC2RING(self->nic,
133 self->tx_rings,
134 self->aq_ring_param.vec_idx);
136 ring = aq_ring_tx_alloc(&self->ring[i][AQ_VEC_TX_ID], aq_nic,
137 idx_ring, aq_nic_cfg);
138 if (!ring) {
139 err = -ENOMEM;
140 goto err_exit;
143 ++self->tx_rings;
145 aq_nic_set_tx_ring(aq_nic, idx_ring, ring);
147 ring = aq_ring_rx_alloc(&self->ring[i][AQ_VEC_RX_ID], aq_nic,
148 idx_ring, aq_nic_cfg);
149 if (!ring) {
150 err = -ENOMEM;
151 goto err_exit;
154 ++self->rx_rings;
157 err_exit:
158 if (err < 0) {
159 aq_vec_free(self);
160 self = NULL;
163 return self;
166 int aq_vec_init(struct aq_vec_s *self, const struct aq_hw_ops *aq_hw_ops,
167 struct aq_hw_s *aq_hw)
169 struct aq_ring_s *ring = NULL;
170 unsigned int i = 0U;
171 int err = 0;
173 self->aq_hw_ops = aq_hw_ops;
174 self->aq_hw = aq_hw;
176 for (i = 0U, ring = self->ring[0];
177 self->tx_rings > i; ++i, ring = self->ring[i]) {
178 err = aq_ring_init(&ring[AQ_VEC_TX_ID]);
179 if (err < 0)
180 goto err_exit;
182 err = self->aq_hw_ops->hw_ring_tx_init(self->aq_hw,
183 &ring[AQ_VEC_TX_ID],
184 &self->aq_ring_param);
185 if (err < 0)
186 goto err_exit;
188 err = aq_ring_init(&ring[AQ_VEC_RX_ID]);
189 if (err < 0)
190 goto err_exit;
192 err = self->aq_hw_ops->hw_ring_rx_init(self->aq_hw,
193 &ring[AQ_VEC_RX_ID],
194 &self->aq_ring_param);
195 if (err < 0)
196 goto err_exit;
198 err = aq_ring_rx_fill(&ring[AQ_VEC_RX_ID]);
199 if (err < 0)
200 goto err_exit;
202 err = self->aq_hw_ops->hw_ring_rx_fill(self->aq_hw,
203 &ring[AQ_VEC_RX_ID], 0U);
204 if (err < 0)
205 goto err_exit;
208 err_exit:
209 return err;
212 int aq_vec_start(struct aq_vec_s *self)
214 struct aq_ring_s *ring = NULL;
215 unsigned int i = 0U;
216 int err = 0;
218 for (i = 0U, ring = self->ring[0];
219 self->tx_rings > i; ++i, ring = self->ring[i]) {
220 err = self->aq_hw_ops->hw_ring_tx_start(self->aq_hw,
221 &ring[AQ_VEC_TX_ID]);
222 if (err < 0)
223 goto err_exit;
225 err = self->aq_hw_ops->hw_ring_rx_start(self->aq_hw,
226 &ring[AQ_VEC_RX_ID]);
227 if (err < 0)
228 goto err_exit;
231 napi_enable(&self->napi);
233 err_exit:
234 return err;
237 void aq_vec_stop(struct aq_vec_s *self)
239 struct aq_ring_s *ring = NULL;
240 unsigned int i = 0U;
242 for (i = 0U, ring = self->ring[0];
243 self->tx_rings > i; ++i, ring = self->ring[i]) {
244 self->aq_hw_ops->hw_ring_tx_stop(self->aq_hw,
245 &ring[AQ_VEC_TX_ID]);
247 self->aq_hw_ops->hw_ring_rx_stop(self->aq_hw,
248 &ring[AQ_VEC_RX_ID]);
251 napi_disable(&self->napi);
254 void aq_vec_deinit(struct aq_vec_s *self)
256 struct aq_ring_s *ring = NULL;
257 unsigned int i = 0U;
259 if (!self)
260 goto err_exit;
262 for (i = 0U, ring = self->ring[0];
263 self->tx_rings > i; ++i, ring = self->ring[i]) {
264 aq_ring_tx_clean(&ring[AQ_VEC_TX_ID]);
265 aq_ring_rx_deinit(&ring[AQ_VEC_RX_ID]);
268 err_exit:;
271 void aq_vec_free(struct aq_vec_s *self)
273 struct aq_ring_s *ring = NULL;
274 unsigned int i = 0U;
276 if (!self)
277 goto err_exit;
279 for (i = 0U, ring = self->ring[0];
280 self->tx_rings > i; ++i, ring = self->ring[i]) {
281 aq_ring_free(&ring[AQ_VEC_TX_ID]);
282 aq_ring_free(&ring[AQ_VEC_RX_ID]);
285 netif_napi_del(&self->napi);
287 kfree(self);
289 err_exit:;
292 irqreturn_t aq_vec_isr(int irq, void *private)
294 struct aq_vec_s *self = private;
295 int err = 0;
297 if (!self) {
298 err = -EINVAL;
299 goto err_exit;
301 napi_schedule(&self->napi);
303 err_exit:
304 return err >= 0 ? IRQ_HANDLED : IRQ_NONE;
307 irqreturn_t aq_vec_isr_legacy(int irq, void *private)
309 struct aq_vec_s *self = private;
310 u64 irq_mask = 0U;
311 int err;
313 if (!self)
314 return IRQ_NONE;
315 err = self->aq_hw_ops->hw_irq_read(self->aq_hw, &irq_mask);
316 if (err < 0)
317 return IRQ_NONE;
319 if (irq_mask) {
320 self->aq_hw_ops->hw_irq_disable(self->aq_hw,
321 1U << self->aq_ring_param.vec_idx);
322 napi_schedule(&self->napi);
323 } else {
324 self->aq_hw_ops->hw_irq_enable(self->aq_hw, 1U);
325 return IRQ_NONE;
328 return IRQ_HANDLED;
331 cpumask_t *aq_vec_get_affinity_mask(struct aq_vec_s *self)
333 return &self->aq_ring_param.affinity_mask;
336 void aq_vec_add_stats(struct aq_vec_s *self,
337 struct aq_ring_stats_rx_s *stats_rx,
338 struct aq_ring_stats_tx_s *stats_tx)
340 struct aq_ring_s *ring = NULL;
341 unsigned int r = 0U;
343 for (r = 0U, ring = self->ring[0];
344 self->tx_rings > r; ++r, ring = self->ring[r]) {
345 struct aq_ring_stats_tx_s *tx = &ring[AQ_VEC_TX_ID].stats.tx;
346 struct aq_ring_stats_rx_s *rx = &ring[AQ_VEC_RX_ID].stats.rx;
348 stats_rx->packets += rx->packets;
349 stats_rx->bytes += rx->bytes;
350 stats_rx->errors += rx->errors;
351 stats_rx->jumbo_packets += rx->jumbo_packets;
352 stats_rx->lro_packets += rx->lro_packets;
353 stats_rx->pg_losts += rx->pg_losts;
354 stats_rx->pg_flips += rx->pg_flips;
355 stats_rx->pg_reuses += rx->pg_reuses;
357 stats_tx->packets += tx->packets;
358 stats_tx->bytes += tx->bytes;
359 stats_tx->errors += tx->errors;
360 stats_tx->queue_restarts += tx->queue_restarts;
364 int aq_vec_get_sw_stats(struct aq_vec_s *self, u64 *data, unsigned int *p_count)
366 struct aq_ring_stats_rx_s stats_rx;
367 struct aq_ring_stats_tx_s stats_tx;
368 unsigned int count = 0U;
370 memset(&stats_rx, 0U, sizeof(struct aq_ring_stats_rx_s));
371 memset(&stats_tx, 0U, sizeof(struct aq_ring_stats_tx_s));
372 aq_vec_add_stats(self, &stats_rx, &stats_tx);
374 /* This data should mimic aq_ethtool_queue_stat_names structure
376 data[count] += stats_rx.packets;
377 data[++count] += stats_tx.packets;
378 data[++count] += stats_tx.queue_restarts;
379 data[++count] += stats_rx.jumbo_packets;
380 data[++count] += stats_rx.lro_packets;
381 data[++count] += stats_rx.errors;
383 if (p_count)
384 *p_count = ++count;
386 return 0;