drivers/net/ethernet/intel/igc/igc_ptp.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright (c)  2019 Intel Corporation */
   3
   4 #include "igc.h"
   5
   6 #include <linux/module.h>
   7 #include <linux/device.h>
   8 #include <linux/pci.h>
   9 #include <linux/ptp_classify.h>
  10 #include <linux/clocksource.h>
  11
  12 #define INCVALUE_MASK           0x7fffffff
  13 #define ISGN                    0x80000000
  14
  15 #define IGC_SYSTIM_OVERFLOW_PERIOD      (HZ * 60 * 9)
  16 #define IGC_PTP_TX_TIMEOUT              (HZ * 15)
  17
  18 /* SYSTIM read access for I225 */
  19 static void igc_ptp_read_i225(struct igc_adapter *adapter,
  20                               struct timespec64 *ts)
  21 {
  22         struct igc_hw *hw = &adapter->hw;
  23         u32 sec, nsec;
  24
  25         /* The timestamp latches on lowest register read. For I210/I211, the
  26          * lowest register is SYSTIMR. Since we only need to provide nanosecond
  27          * resolution, we can ignore it.
  28          */
  29         rd32(IGC_SYSTIMR);
  30         nsec = rd32(IGC_SYSTIML);
  31         sec = rd32(IGC_SYSTIMH);
  32
  33         ts->tv_sec = sec;
  34         ts->tv_nsec = nsec;
  35 }
  36
  37 static void igc_ptp_write_i225(struct igc_adapter *adapter,
  38                                const struct timespec64 *ts)
  39 {
  40         struct igc_hw *hw = &adapter->hw;
  41
  42         /* Writing the SYSTIMR register is not necessary as it only
  43          * provides sub-nanosecond resolution.
  44          */
  45         wr32(IGC_SYSTIML, ts->tv_nsec);
  46         wr32(IGC_SYSTIMH, ts->tv_sec);
  47 }
  48
  49 static int igc_ptp_adjfine_i225(struct ptp_clock_info *ptp, long scaled_ppm)
  50 {
  51         struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
  52                                                ptp_caps);
  53         struct igc_hw *hw = &igc->hw;
  54         int neg_adj = 0;
  55         u64 rate;
  56         u32 inca;
  57
  58         if (scaled_ppm < 0) {
  59                 neg_adj = 1;
  60                 scaled_ppm = -scaled_ppm;
  61         }
  62         rate = scaled_ppm;
  63         rate <<= 14;
  64         rate = div_u64(rate, 78125);
  65
  66         inca = rate & INCVALUE_MASK;
  67         if (neg_adj)
  68                 inca |= ISGN;
  69
  70         wr32(IGC_TIMINCA, inca);
  71
  72         return 0;
  73 }
  74
  75 static int igc_ptp_adjtime_i225(struct ptp_clock_info *ptp, s64 delta)
  76 {
  77         struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
  78                                                ptp_caps);
  79         struct timespec64 now, then = ns_to_timespec64(delta);
  80         unsigned long flags;
  81
  82         spin_lock_irqsave(&igc->tmreg_lock, flags);
  83
  84         igc_ptp_read_i225(igc, &now);
  85         now = timespec64_add(now, then);
  86         igc_ptp_write_i225(igc, (const struct timespec64 *)&now);
  87
  88         spin_unlock_irqrestore(&igc->tmreg_lock, flags);
  89
  90         return 0;
  91 }
  92
  93 static int igc_ptp_gettimex64_i225(struct ptp_clock_info *ptp,
  94                                    struct timespec64 *ts,
  95                                    struct ptp_system_timestamp *sts)
  96 {
  97         struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
  98                                                ptp_caps);
  99         struct igc_hw *hw = &igc->hw;
 100         unsigned long flags;
 101
 102         spin_lock_irqsave(&igc->tmreg_lock, flags);
 103
 104         ptp_read_system_prets(sts);
 105         rd32(IGC_SYSTIMR);
 106         ptp_read_system_postts(sts);
 107         ts->tv_nsec = rd32(IGC_SYSTIML);
 108         ts->tv_sec = rd32(IGC_SYSTIMH);
 109
 110         spin_unlock_irqrestore(&igc->tmreg_lock, flags);
 111
 112         return 0;
 113 }
 114
 115 static int igc_ptp_settime_i225(struct ptp_clock_info *ptp,
 116                                 const struct timespec64 *ts)
 117 {
 118         struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
 119                                                ptp_caps);
 120         unsigned long flags;
 121
 122         spin_lock_irqsave(&igc->tmreg_lock, flags);
 123
 124         igc_ptp_write_i225(igc, ts);
 125
 126         spin_unlock_irqrestore(&igc->tmreg_lock, flags);
 127
 128         return 0;
 129 }
 130
 131 static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,
 132                                        struct ptp_clock_request *rq, int on)
 133 {
 134         return -EOPNOTSUPP;
 135 }
 136
 137 /**
 138  * igc_ptp_systim_to_hwtstamp - convert system time value to HW timestamp
 139  * @adapter: board private structure
 140  * @hwtstamps: timestamp structure to update
 141  * @systim: unsigned 64bit system time value
 142  *
 143  * We need to convert the system time value stored in the RX/TXSTMP registers
 144  * into a hwtstamp which can be used by the upper level timestamping functions.
 145  **/
 146 static void igc_ptp_systim_to_hwtstamp(struct igc_adapter *adapter,
 147                                        struct skb_shared_hwtstamps *hwtstamps,
 148                                        u64 systim)
 149 {
 150         switch (adapter->hw.mac.type) {
 151         case igc_i225:
 152                 memset(hwtstamps, 0, sizeof(*hwtstamps));
 153                 /* Upper 32 bits contain s, lower 32 bits contain ns. */
 154                 hwtstamps->hwtstamp = ktime_set(systim >> 32,
 155                                                 systim & 0xFFFFFFFF);
 156                 break;
 157         default:
 158                 break;
 159         }
 160 }
 161
 162 /**
 163  * igc_ptp_rx_pktstamp - retrieve Rx per packet timestamp
 164  * @q_vector: Pointer to interrupt specific structure
 165  * @va: Pointer to address containing Rx buffer
 166  * @skb: Buffer containing timestamp and packet
 167  *
 168  * This function is meant to retrieve the first timestamp from the
 169  * first buffer of an incoming frame. The value is stored in little
 170  * endian format starting on byte 0. There's a second timestamp
 171  * starting on byte 8.
 172  **/
 173 void igc_ptp_rx_pktstamp(struct igc_q_vector *q_vector, void *va,
 174                          struct sk_buff *skb)
 175 {
 176         struct igc_adapter *adapter = q_vector->adapter;
 177         __le64 *regval = (__le64 *)va;
 178         int adjust = 0;
 179
 180         /* The timestamp is recorded in little endian format.
 181          * DWORD: | 0          | 1           | 2          | 3
 182          * Field: | Timer0 Low | Timer0 High | Timer1 Low | Timer1 High
 183          */
 184         igc_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb),
 185                                    le64_to_cpu(regval[0]));
 186
 187         /* adjust timestamp for the RX latency based on link speed */
 188         if (adapter->hw.mac.type == igc_i225) {
 189                 switch (adapter->link_speed) {
 190                 case SPEED_10:
 191                         adjust = IGC_I225_RX_LATENCY_10;
 192                         break;
 193                 case SPEED_100:
 194                         adjust = IGC_I225_RX_LATENCY_100;
 195                         break;
 196                 case SPEED_1000:
 197                         adjust = IGC_I225_RX_LATENCY_1000;
 198                         break;
 199                 case SPEED_2500:
 200                         adjust = IGC_I225_RX_LATENCY_2500;
 201                         break;
 202                 }
 203         }
 204         skb_hwtstamps(skb)->hwtstamp =
 205                 ktime_sub_ns(skb_hwtstamps(skb)->hwtstamp, adjust);
 206 }
 207
 208 /**
 209  * igc_ptp_rx_rgtstamp - retrieve Rx timestamp stored in register
 210  * @q_vector: Pointer to interrupt specific structure
 211  * @skb: Buffer containing timestamp and packet
 212  *
 213  * This function is meant to retrieve a timestamp from the internal registers
 214  * of the adapter and store it in the skb.
 215  */
 216 void igc_ptp_rx_rgtstamp(struct igc_q_vector *q_vector,
 217                          struct sk_buff *skb)
 218 {
 219         struct igc_adapter *adapter = q_vector->adapter;
 220         struct igc_hw *hw = &adapter->hw;
 221         u64 regval;
 222
 223         /* If this bit is set, then the RX registers contain the time
 224          * stamp. No other packet will be time stamped until we read
 225          * these registers, so read the registers to make them
 226          * available again. Because only one packet can be time
 227          * stamped at a time, we know that the register values must
 228          * belong to this one here and therefore we don't need to
 229          * compare any of the additional attributes stored for it.
 230          *
 231          * If nothing went wrong, then it should have a shared
 232          * tx_flags that we can turn into a skb_shared_hwtstamps.
 233          */
 234         if (!(rd32(IGC_TSYNCRXCTL) & IGC_TSYNCRXCTL_VALID))
 235                 return;
 236
 237         regval = rd32(IGC_RXSTMPL);
 238         regval |= (u64)rd32(IGC_RXSTMPH) << 32;
 239
 240         igc_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
 241
 242         /* Update the last_rx_timestamp timer in order to enable watchdog check
 243          * for error case of latched timestamp on a dropped packet.
 244          */
 245         adapter->last_rx_timestamp = jiffies;
 246 }
 247
 248 /**
 249  * igc_ptp_enable_tstamp_rxqueue - Enable RX timestamp for a queue
 250  * @rx_ring: Pointer to RX queue
 251  * @timer: Index for timer
 252  *
 253  * This function enables RX timestamping for a queue, and selects
 254  * which 1588 timer will provide the timestamp.
 255  */
 256 static void igc_ptp_enable_tstamp_rxqueue(struct igc_adapter *adapter,
 257                                           struct igc_ring *rx_ring, u8 timer)
 258 {
 259         struct igc_hw *hw = &adapter->hw;
 260         int reg_idx = rx_ring->reg_idx;
 261         u32 srrctl = rd32(IGC_SRRCTL(reg_idx));
 262
 263         srrctl |= IGC_SRRCTL_TIMESTAMP;
 264         srrctl |= IGC_SRRCTL_TIMER1SEL(timer);
 265         srrctl |= IGC_SRRCTL_TIMER0SEL(timer);
 266
 267         wr32(IGC_SRRCTL(reg_idx), srrctl);
 268 }
 269
 270 static void igc_ptp_enable_tstamp_all_rxqueues(struct igc_adapter *adapter,
 271                                                u8 timer)
 272 {
 273         int i;
 274
 275         for (i = 0; i < adapter->num_rx_queues; i++) {
 276                 struct igc_ring *ring = adapter->rx_ring[i];
 277
 278                 igc_ptp_enable_tstamp_rxqueue(adapter, ring, timer);
 279         }
 280 }
 281
 282 /**
 283  * igc_ptp_set_timestamp_mode - setup hardware for timestamping
 284  * @adapter: networking device structure
 285  * @config: hwtstamp configuration
 286  *
 287  * Outgoing time stamping can be enabled and disabled. Play nice and
 288  * disable it when requested, although it shouldn't case any overhead
 289  * when no packet needs it. At most one packet in the queue may be
 290  * marked for time stamping, otherwise it would be impossible to tell
 291  * for sure to which packet the hardware time stamp belongs.
 292  *
 293  * Incoming time stamping has to be configured via the hardware
 294  * filters. Not all combinations are supported, in particular event
 295  * type has to be specified. Matching the kind of event packet is
 296  * not supported, with the exception of "all V2 events regardless of
 297  * level 2 or 4".
 298  *
 299  */
 300 static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,
 301                                       struct hwtstamp_config *config)
 302 {
 303         u32 tsync_tx_ctl = IGC_TSYNCTXCTL_ENABLED;
 304         u32 tsync_rx_ctl = IGC_TSYNCRXCTL_ENABLED;
 305         struct igc_hw *hw = &adapter->hw;
 306         u32 tsync_rx_cfg = 0;
 307         bool is_l4 = false;
 308         bool is_l2 = false;
 309         u32 regval;
 310
 311         /* reserved for future extensions */
 312         if (config->flags)
 313                 return -EINVAL;
 314
 315         switch (config->tx_type) {
 316         case HWTSTAMP_TX_OFF:
 317                 tsync_tx_ctl = 0;
 318         case HWTSTAMP_TX_ON:
 319                 break;
 320         default:
 321                 return -ERANGE;
 322         }
 323
 324         switch (config->rx_filter) {
 325         case HWTSTAMP_FILTER_NONE:
 326                 tsync_rx_ctl = 0;
 327                 break;
 328         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
 329                 tsync_rx_ctl |= IGC_TSYNCRXCTL_TYPE_L4_V1;
 330                 tsync_rx_cfg = IGC_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
 331                 is_l4 = true;
 332                 break;
 333         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
 334                 tsync_rx_ctl |= IGC_TSYNCRXCTL_TYPE_L4_V1;
 335                 tsync_rx_cfg = IGC_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
 336                 is_l4 = true;
 337                 break;
 338         case HWTSTAMP_FILTER_PTP_V2_EVENT:
 339         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 340         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
 341         case HWTSTAMP_FILTER_PTP_V2_SYNC:
 342         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
 343         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
 344         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 345         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 346         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
 347                 tsync_rx_ctl |= IGC_TSYNCRXCTL_TYPE_EVENT_V2;
 348                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
 349                 is_l2 = true;
 350                 is_l4 = true;
 351                 break;
 352         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
 353         case HWTSTAMP_FILTER_NTP_ALL:
 354         case HWTSTAMP_FILTER_ALL:
 355                 tsync_rx_ctl |= IGC_TSYNCRXCTL_TYPE_ALL;
 356                 config->rx_filter = HWTSTAMP_FILTER_ALL;
 357                 break;
 358                 /* fall through */
 359         default:
 360                 config->rx_filter = HWTSTAMP_FILTER_NONE;
 361                 return -ERANGE;
 362         }
 363
 364         /* Per-packet timestamping only works if all packets are
 365          * timestamped, so enable timestamping in all packets as long
 366          * as one Rx filter was configured.
 367          */
 368         if (tsync_rx_ctl) {
 369                 tsync_rx_ctl = IGC_TSYNCRXCTL_ENABLED;
 370                 tsync_rx_ctl |= IGC_TSYNCRXCTL_TYPE_ALL;
 371                 tsync_rx_ctl |= IGC_TSYNCRXCTL_RXSYNSIG;
 372                 config->rx_filter = HWTSTAMP_FILTER_ALL;
 373                 is_l2 = true;
 374                 is_l4 = true;
 375
 376                 if (hw->mac.type == igc_i225) {
 377                         regval = rd32(IGC_RXPBS);
 378                         regval |= IGC_RXPBS_CFG_TS_EN;
 379                         wr32(IGC_RXPBS, regval);
 380
 381                         /* FIXME: For now, only support retrieving RX
 382                          * timestamps from timer 0
 383                          */
 384                         igc_ptp_enable_tstamp_all_rxqueues(adapter, 0);
 385                 }
 386         }
 387
 388         if (tsync_tx_ctl) {
 389                 tsync_tx_ctl = IGC_TSYNCTXCTL_ENABLED;
 390                 tsync_tx_ctl |= IGC_TSYNCTXCTL_TXSYNSIG;
 391         }
 392
 393         /* enable/disable TX */
 394         regval = rd32(IGC_TSYNCTXCTL);
 395         regval &= ~IGC_TSYNCTXCTL_ENABLED;
 396         regval |= tsync_tx_ctl;
 397         wr32(IGC_TSYNCTXCTL, regval);
 398
 399         /* enable/disable RX */
 400         regval = rd32(IGC_TSYNCRXCTL);
 401         regval &= ~(IGC_TSYNCRXCTL_ENABLED | IGC_TSYNCRXCTL_TYPE_MASK);
 402         regval |= tsync_rx_ctl;
 403         wr32(IGC_TSYNCRXCTL, regval);
 404
 405         /* define which PTP packets are time stamped */
 406         wr32(IGC_TSYNCRXCFG, tsync_rx_cfg);
 407
 408         /* define ethertype filter for timestamped packets */
 409         if (is_l2)
 410                 wr32(IGC_ETQF(3),
 411                      (IGC_ETQF_FILTER_ENABLE | /* enable filter */
 412                      IGC_ETQF_1588 | /* enable timestamping */
 413                      ETH_P_1588)); /* 1588 eth protocol type */
 414         else
 415                 wr32(IGC_ETQF(3), 0);
 416
 417         /* L4 Queue Filter[3]: filter by destination port and protocol */
 418         if (is_l4) {
 419                 u32 ftqf = (IPPROTO_UDP /* UDP */
 420                             | IGC_FTQF_VF_BP /* VF not compared */
 421                             | IGC_FTQF_1588_TIME_STAMP /* Enable Timestamp */
 422                             | IGC_FTQF_MASK); /* mask all inputs */
 423                 ftqf &= ~IGC_FTQF_MASK_PROTO_BP; /* enable protocol check */
 424
 425                 wr32(IGC_IMIR(3), htons(PTP_EV_PORT));
 426                 wr32(IGC_IMIREXT(3),
 427                      (IGC_IMIREXT_SIZE_BP | IGC_IMIREXT_CTRL_BP));
 428                 wr32(IGC_FTQF(3), ftqf);
 429         } else {
 430                 wr32(IGC_FTQF(3), IGC_FTQF_MASK);
 431         }
 432         wrfl();
 433
 434         /* clear TX/RX time stamp registers, just to be sure */
 435         regval = rd32(IGC_TXSTMPL);
 436         regval = rd32(IGC_TXSTMPH);
 437         regval = rd32(IGC_RXSTMPL);
 438         regval = rd32(IGC_RXSTMPH);
 439
 440         return 0;
 441 }
 442
 443 void igc_ptp_tx_hang(struct igc_adapter *adapter)
 444 {
 445         bool timeout = time_is_before_jiffies(adapter->ptp_tx_start +
 446                                               IGC_PTP_TX_TIMEOUT);
 447         struct igc_hw *hw = &adapter->hw;
 448
 449         if (!adapter->ptp_tx_skb)
 450                 return;
 451
 452         if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))
 453                 return;
 454
 455         /* If we haven't received a timestamp within the timeout, it is
 456          * reasonable to assume that it will never occur, so we can unlock the
 457          * timestamp bit when this occurs.
 458          */
 459         if (timeout) {
 460                 cancel_work_sync(&adapter->ptp_tx_work);
 461                 dev_kfree_skb_any(adapter->ptp_tx_skb);
 462                 adapter->ptp_tx_skb = NULL;
 463                 clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
 464                 adapter->tx_hwtstamp_timeouts++;
 465                 /* Clear the Tx valid bit in TSYNCTXCTL register to enable
 466                  * interrupt
 467                  */
 468                 rd32(IGC_TXSTMPH);
 469                 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");
 470         }
 471 }
 472
 473 /**
 474  * igc_ptp_tx_hwtstamp - utility function which checks for TX time stamp
 475  * @adapter: Board private structure
 476  *
 477  * If we were asked to do hardware stamping and such a time stamp is
 478  * available, then it must have been for this skb here because we only
 479  * allow only one such packet into the queue.
 480  */
 481 static void igc_ptp_tx_hwtstamp(struct igc_adapter *adapter)
 482 {
 483         struct sk_buff *skb = adapter->ptp_tx_skb;
 484         struct skb_shared_hwtstamps shhwtstamps;
 485         struct igc_hw *hw = &adapter->hw;
 486         u64 regval;
 487
 488         regval = rd32(IGC_TXSTMPL);
 489         regval |= (u64)rd32(IGC_TXSTMPH) << 32;
 490         igc_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
 491
 492         /* Clear the lock early before calling skb_tstamp_tx so that
 493          * applications are not woken up before the lock bit is clear. We use
 494          * a copy of the skb pointer to ensure other threads can't change it
 495          * while we're notifying the stack.
 496          */
 497         adapter->ptp_tx_skb = NULL;
 498         clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
 499
 500         /* Notify the stack and free the skb after we've unlocked */
 501         skb_tstamp_tx(skb, &shhwtstamps);
 502         dev_kfree_skb_any(skb);
 503 }
 504
 505 /**
 506  * igc_ptp_tx_work
 507  * @work: pointer to work struct
 508  *
 509  * This work function polls the TSYNCTXCTL valid bit to determine when a
 510  * timestamp has been taken for the current stored skb.
 511  */
 512 static void igc_ptp_tx_work(struct work_struct *work)
 513 {
 514         struct igc_adapter *adapter = container_of(work, struct igc_adapter,
 515                                                    ptp_tx_work);
 516         struct igc_hw *hw = &adapter->hw;
 517         u32 tsynctxctl;
 518
 519         if (!adapter->ptp_tx_skb)
 520                 return;
 521
 522         if (time_is_before_jiffies(adapter->ptp_tx_start +
 523                                    IGC_PTP_TX_TIMEOUT)) {
 524                 dev_kfree_skb_any(adapter->ptp_tx_skb);
 525                 adapter->ptp_tx_skb = NULL;
 526                 clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
 527                 adapter->tx_hwtstamp_timeouts++;
 528                 /* Clear the tx valid bit in TSYNCTXCTL register to enable
 529                  * interrupt
 530                  */
 531                 rd32(IGC_TXSTMPH);
 532                 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");
 533                 return;
 534         }
 535
 536         tsynctxctl = rd32(IGC_TSYNCTXCTL);
 537         if (tsynctxctl & IGC_TSYNCTXCTL_VALID)
 538                 igc_ptp_tx_hwtstamp(adapter);
 539         else
 540                 /* reschedule to check later */
 541                 schedule_work(&adapter->ptp_tx_work);
 542 }
 543
 544 /**
 545  * igc_ptp_set_ts_config - set hardware time stamping config
 546  * @netdev: network interface device structure
 547  * @ifreq: interface request data
 548  *
 549  **/
 550 int igc_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
 551 {
 552         struct igc_adapter *adapter = netdev_priv(netdev);
 553         struct hwtstamp_config config;
 554         int err;
 555
 556         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
 557                 return -EFAULT;
 558
 559         err = igc_ptp_set_timestamp_mode(adapter, &config);
 560         if (err)
 561                 return err;
 562
 563         /* save these settings for future reference */
 564         memcpy(&adapter->tstamp_config, &config,
 565                sizeof(adapter->tstamp_config));
 566
 567         return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
 568                 -EFAULT : 0;
 569 }
 570
 571 /**
 572  * igc_ptp_get_ts_config - get hardware time stamping config
 573  * @netdev: network interface device structure
 574  * @ifreq: interface request data
 575  *
 576  * Get the hwtstamp_config settings to return to the user. Rather than attempt
 577  * to deconstruct the settings from the registers, just return a shadow copy
 578  * of the last known settings.
 579  **/
 580 int igc_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)
 581 {
 582         struct igc_adapter *adapter = netdev_priv(netdev);
 583         struct hwtstamp_config *config = &adapter->tstamp_config;
 584
 585         return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
 586                 -EFAULT : 0;
 587 }
 588
 589 /**
 590  * igc_ptp_init - Initialize PTP functionality
 591  * @adapter: Board private structure
 592  *
 593  * This function is called at device probe to initialize the PTP
 594  * functionality.
 595  */
 596 void igc_ptp_init(struct igc_adapter *adapter)
 597 {
 598         struct net_device *netdev = adapter->netdev;
 599         struct igc_hw *hw = &adapter->hw;
 600
 601         switch (hw->mac.type) {
 602         case igc_i225:
 603                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 604                 adapter->ptp_caps.owner = THIS_MODULE;
 605                 adapter->ptp_caps.max_adj = 62499999;
 606                 adapter->ptp_caps.adjfine = igc_ptp_adjfine_i225;
 607                 adapter->ptp_caps.adjtime = igc_ptp_adjtime_i225;
 608                 adapter->ptp_caps.gettimex64 = igc_ptp_gettimex64_i225;
 609                 adapter->ptp_caps.settime64 = igc_ptp_settime_i225;
 610                 adapter->ptp_caps.enable = igc_ptp_feature_enable_i225;
 611                 break;
 612         default:
 613                 adapter->ptp_clock = NULL;
 614                 return;
 615         }
 616
 617         spin_lock_init(&adapter->tmreg_lock);
 618         INIT_WORK(&adapter->ptp_tx_work, igc_ptp_tx_work);
 619
 620         adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
 621         adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
 622
 623         igc_ptp_reset(adapter);
 624
 625         adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
 626                                                 &adapter->pdev->dev);
 627         if (IS_ERR(adapter->ptp_clock)) {
 628                 adapter->ptp_clock = NULL;
 629                 dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
 630         } else if (adapter->ptp_clock) {
 631                 dev_info(&adapter->pdev->dev, "added PHC on %s\n",
 632                          adapter->netdev->name);
 633                 adapter->ptp_flags |= IGC_PTP_ENABLED;
 634         }
 635 }
 636
 637 /**
 638  * igc_ptp_suspend - Disable PTP work items and prepare for suspend
 639  * @adapter: Board private structure
 640  *
 641  * This function stops the overflow check work and PTP Tx timestamp work, and
 642  * will prepare the device for OS suspend.
 643  */
 644 void igc_ptp_suspend(struct igc_adapter *adapter)
 645 {
 646         if (!(adapter->ptp_flags & IGC_PTP_ENABLED))
 647                 return;
 648
 649         cancel_work_sync(&adapter->ptp_tx_work);
 650         if (adapter->ptp_tx_skb) {
 651                 dev_kfree_skb_any(adapter->ptp_tx_skb);
 652                 adapter->ptp_tx_skb = NULL;
 653                 clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
 654         }
 655 }
 656
 657 /**
 658  * igc_ptp_stop - Disable PTP device and stop the overflow check.
 659  * @adapter: Board private structure.
 660  *
 661  * This function stops the PTP support and cancels the delayed work.
 662  **/
 663 void igc_ptp_stop(struct igc_adapter *adapter)
 664 {
 665         igc_ptp_suspend(adapter);
 666
 667         if (adapter->ptp_clock) {
 668                 ptp_clock_unregister(adapter->ptp_clock);
 669                 dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
 670                          adapter->netdev->name);
 671                 adapter->ptp_flags &= ~IGC_PTP_ENABLED;
 672         }
 673 }
 674
 675 /**
 676  * igc_ptp_reset - Re-enable the adapter for PTP following a reset.
 677  * @adapter: Board private structure.
 678  *
 679  * This function handles the reset work required to re-enable the PTP device.
 680  **/
 681 void igc_ptp_reset(struct igc_adapter *adapter)
 682 {
 683         struct igc_hw *hw = &adapter->hw;
 684         unsigned long flags;
 685
 686         /* reset the tstamp_config */
 687         igc_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
 688
 689         spin_lock_irqsave(&adapter->tmreg_lock, flags);
 690
 691         switch (adapter->hw.mac.type) {
 692         case igc_i225:
 693                 wr32(IGC_TSAUXC, 0x0);
 694                 wr32(IGC_TSSDP, 0x0);
 695                 wr32(IGC_TSIM, IGC_TSICR_INTERRUPTS);
 696                 wr32(IGC_IMS, IGC_IMS_TS);
 697                 break;
 698         default:
 699                 /* No work to do. */
 700                 goto out;
 701         }
 702
 703         /* Re-initialize the timer. */
 704         if (hw->mac.type == igc_i225) {
 705                 struct timespec64 ts64 = ktime_to_timespec64(ktime_get_real());
 706
 707                 igc_ptp_write_i225(adapter, &ts64);
 708         } else {
 709                 timecounter_init(&adapter->tc, &adapter->cc,
 710                                  ktime_to_ns(ktime_get_real()));
 711         }
 712 out:
 713         spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
 714
 715         wrfl();
 716 }