1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ethernet driver for the WIZnet W5300 chip.
5 * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
6 * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
7 * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/netdevice.h>
13 #include <linux/etherdevice.h>
14 #include <linux/platform_device.h>
15 #include <linux/platform_data/wiznet.h>
16 #include <linux/ethtool.h>
17 #include <linux/skbuff.h>
18 #include <linux/types.h>
19 #include <linux/errno.h>
20 #include <linux/delay.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
24 #include <linux/ioport.h>
25 #include <linux/interrupt.h>
26 #include <linux/irq.h>
27 #include <linux/gpio.h>
29 #define DRV_NAME "w5300"
30 #define DRV_VERSION "2012-04-04"
32 MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION
);
33 MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
34 MODULE_ALIAS("platform:"DRV_NAME
);
35 MODULE_LICENSE("GPL");
40 #define W5300_MR 0x0000 /* Mode Register */
41 #define MR_DBW (1 << 15) /* Data bus width */
42 #define MR_MPF (1 << 14) /* Mac layer pause frame */
43 #define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
44 #define MR_RDH (1 << 10) /* Read data hold time */
45 #define MR_FS (1 << 8) /* FIFO swap */
46 #define MR_RST (1 << 7) /* S/W reset */
47 #define MR_PB (1 << 4) /* Ping block */
48 #define MR_DBS (1 << 2) /* Data bus swap */
49 #define MR_IND (1 << 0) /* Indirect mode */
50 #define W5300_IR 0x0002 /* Interrupt Register */
51 #define W5300_IMR 0x0004 /* Interrupt Mask Register */
52 #define IR_S0 0x0001 /* S0 interrupt */
53 #define W5300_SHARL 0x0008 /* Source MAC address (0123) */
54 #define W5300_SHARH 0x000c /* Source MAC address (45) */
55 #define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
56 #define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
57 #define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
58 #define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
59 #define W5300_MTYPE 0x0030 /* Memory Type */
60 #define W5300_IDR 0x00fe /* Chip ID register */
61 #define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
62 #define W5300_S0_MR 0x0200 /* S0 Mode Register */
63 #define S0_MR_CLOSED 0x0000 /* Close mode */
64 #define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscuous) */
65 #define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
66 #define W5300_S0_CR 0x0202 /* S0 Command Register */
67 #define S0_CR_OPEN 0x0001 /* OPEN command */
68 #define S0_CR_CLOSE 0x0010 /* CLOSE command */
69 #define S0_CR_SEND 0x0020 /* SEND command */
70 #define S0_CR_RECV 0x0040 /* RECV command */
71 #define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
72 #define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
73 #define S0_IR_RECV 0x0004 /* Receive interrupt */
74 #define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
75 #define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
76 #define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
77 #define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
78 #define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
79 #define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
80 #define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
81 #define W5300_REGS_LEN 0x0400
84 * Device driver private data structure
90 u16 (*read
) (struct w5300_priv
*priv
, u16 addr
);
91 void (*write
)(struct w5300_priv
*priv
, u16 addr
, u16 data
);
96 struct napi_struct napi
;
97 struct net_device
*ndev
;
102 /************************************************************************
104 * Lowlevel I/O functions
106 ***********************************************************************/
109 * In direct address mode host system can directly access W5300 registers
110 * after mapping to Memory-Mapped I/O space.
112 * 0x400 bytes are required for memory space.
114 static inline u16
w5300_read_direct(struct w5300_priv
*priv
, u16 addr
)
116 return ioread16(priv
->base
+ (addr
<< CONFIG_WIZNET_BUS_SHIFT
));
119 static inline void w5300_write_direct(struct w5300_priv
*priv
,
122 iowrite16(data
, priv
->base
+ (addr
<< CONFIG_WIZNET_BUS_SHIFT
));
126 * In indirect address mode host system indirectly accesses registers by
127 * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
128 * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
129 * Mode Register (MR) is directly accessible.
131 * Only 0x06 bytes are required for memory space.
133 #define W5300_IDM_AR 0x0002 /* Indirect Mode Address */
134 #define W5300_IDM_DR 0x0004 /* Indirect Mode Data */
136 static u16
w5300_read_indirect(struct w5300_priv
*priv
, u16 addr
)
141 spin_lock_irqsave(&priv
->reg_lock
, flags
);
142 w5300_write_direct(priv
, W5300_IDM_AR
, addr
);
143 data
= w5300_read_direct(priv
, W5300_IDM_DR
);
144 spin_unlock_irqrestore(&priv
->reg_lock
, flags
);
149 static void w5300_write_indirect(struct w5300_priv
*priv
, u16 addr
, u16 data
)
153 spin_lock_irqsave(&priv
->reg_lock
, flags
);
154 w5300_write_direct(priv
, W5300_IDM_AR
, addr
);
155 w5300_write_direct(priv
, W5300_IDM_DR
, data
);
156 spin_unlock_irqrestore(&priv
->reg_lock
, flags
);
159 #if defined(CONFIG_WIZNET_BUS_DIRECT)
160 #define w5300_read w5300_read_direct
161 #define w5300_write w5300_write_direct
163 #elif defined(CONFIG_WIZNET_BUS_INDIRECT)
164 #define w5300_read w5300_read_indirect
165 #define w5300_write w5300_write_indirect
167 #else /* CONFIG_WIZNET_BUS_ANY */
168 #define w5300_read priv->read
169 #define w5300_write priv->write
172 static u32
w5300_read32(struct w5300_priv
*priv
, u16 addr
)
175 data
= w5300_read(priv
, addr
) << 16;
176 data
|= w5300_read(priv
, addr
+ 2);
180 static void w5300_write32(struct w5300_priv
*priv
, u16 addr
, u32 data
)
182 w5300_write(priv
, addr
, data
>> 16);
183 w5300_write(priv
, addr
+ 2, data
);
186 static int w5300_command(struct w5300_priv
*priv
, u16 cmd
)
188 unsigned long timeout
= jiffies
+ msecs_to_jiffies(100);
190 w5300_write(priv
, W5300_S0_CR
, cmd
);
192 while (w5300_read(priv
, W5300_S0_CR
) != 0) {
193 if (time_after(jiffies
, timeout
))
201 static void w5300_read_frame(struct w5300_priv
*priv
, u8
*buf
, int len
)
206 for (i
= 0; i
< len
; i
+= 2) {
207 fifo
= w5300_read(priv
, W5300_S0_RX_FIFO
);
211 fifo
= w5300_read(priv
, W5300_S0_RX_FIFO
);
212 fifo
= w5300_read(priv
, W5300_S0_RX_FIFO
);
215 static void w5300_write_frame(struct w5300_priv
*priv
, u8
*buf
, int len
)
220 for (i
= 0; i
< len
; i
+= 2) {
223 w5300_write(priv
, W5300_S0_TX_FIFO
, fifo
);
225 w5300_write32(priv
, W5300_S0_TX_WRSR
, len
);
228 static void w5300_write_macaddr(struct w5300_priv
*priv
)
230 struct net_device
*ndev
= priv
->ndev
;
231 w5300_write32(priv
, W5300_SHARL
,
232 ndev
->dev_addr
[0] << 24 |
233 ndev
->dev_addr
[1] << 16 |
234 ndev
->dev_addr
[2] << 8 |
236 w5300_write(priv
, W5300_SHARH
,
237 ndev
->dev_addr
[4] << 8 |
241 static void w5300_hw_reset(struct w5300_priv
*priv
)
243 w5300_write_direct(priv
, W5300_MR
, MR_RST
);
245 w5300_write_direct(priv
, W5300_MR
, priv
->indirect
?
246 MR_WDF(7) | MR_PB
| MR_IND
:
248 w5300_write(priv
, W5300_IMR
, 0);
249 w5300_write_macaddr(priv
);
251 /* Configure 128K of internal memory
252 * as 64K RX fifo and 64K TX fifo
254 w5300_write32(priv
, W5300_RMSRL
, 64 << 24);
255 w5300_write32(priv
, W5300_RMSRH
, 0);
256 w5300_write32(priv
, W5300_TMSRL
, 64 << 24);
257 w5300_write32(priv
, W5300_TMSRH
, 0);
258 w5300_write(priv
, W5300_MTYPE
, 0x00ff);
261 static void w5300_hw_start(struct w5300_priv
*priv
)
263 w5300_write(priv
, W5300_S0_MR
, priv
->promisc
?
264 S0_MR_MACRAW
: S0_MR_MACRAW_MF
);
265 w5300_command(priv
, S0_CR_OPEN
);
266 w5300_write(priv
, W5300_S0_IMR
, S0_IR_RECV
| S0_IR_SENDOK
);
267 w5300_write(priv
, W5300_IMR
, IR_S0
);
270 static void w5300_hw_close(struct w5300_priv
*priv
)
272 w5300_write(priv
, W5300_IMR
, 0);
273 w5300_command(priv
, S0_CR_CLOSE
);
276 /***********************************************************************
278 * Device driver functions / callbacks
280 ***********************************************************************/
282 static void w5300_get_drvinfo(struct net_device
*ndev
,
283 struct ethtool_drvinfo
*info
)
285 strlcpy(info
->driver
, DRV_NAME
, sizeof(info
->driver
));
286 strlcpy(info
->version
, DRV_VERSION
, sizeof(info
->version
));
287 strlcpy(info
->bus_info
, dev_name(ndev
->dev
.parent
),
288 sizeof(info
->bus_info
));
291 static u32
w5300_get_link(struct net_device
*ndev
)
293 struct w5300_priv
*priv
= netdev_priv(ndev
);
295 if (gpio_is_valid(priv
->link_gpio
))
296 return !!gpio_get_value(priv
->link_gpio
);
301 static u32
w5300_get_msglevel(struct net_device
*ndev
)
303 struct w5300_priv
*priv
= netdev_priv(ndev
);
305 return priv
->msg_enable
;
308 static void w5300_set_msglevel(struct net_device
*ndev
, u32 value
)
310 struct w5300_priv
*priv
= netdev_priv(ndev
);
312 priv
->msg_enable
= value
;
315 static int w5300_get_regs_len(struct net_device
*ndev
)
317 return W5300_REGS_LEN
;
320 static void w5300_get_regs(struct net_device
*ndev
,
321 struct ethtool_regs
*regs
, void *_buf
)
323 struct w5300_priv
*priv
= netdev_priv(ndev
);
329 for (addr
= 0; addr
< W5300_REGS_LEN
; addr
+= 2) {
330 switch (addr
& 0x23f) {
331 case W5300_S0_TX_FIFO
: /* cannot read TX_FIFO */
332 case W5300_S0_RX_FIFO
: /* cannot read RX_FIFO */
336 data
= w5300_read(priv
, addr
);
344 static void w5300_tx_timeout(struct net_device
*ndev
, unsigned int txqueue
)
346 struct w5300_priv
*priv
= netdev_priv(ndev
);
348 netif_stop_queue(ndev
);
349 w5300_hw_reset(priv
);
350 w5300_hw_start(priv
);
351 ndev
->stats
.tx_errors
++;
352 netif_trans_update(ndev
);
353 netif_wake_queue(ndev
);
356 static netdev_tx_t
w5300_start_tx(struct sk_buff
*skb
, struct net_device
*ndev
)
358 struct w5300_priv
*priv
= netdev_priv(ndev
);
360 netif_stop_queue(ndev
);
362 w5300_write_frame(priv
, skb
->data
, skb
->len
);
363 ndev
->stats
.tx_packets
++;
364 ndev
->stats
.tx_bytes
+= skb
->len
;
366 netif_dbg(priv
, tx_queued
, ndev
, "tx queued\n");
368 w5300_command(priv
, S0_CR_SEND
);
373 static int w5300_napi_poll(struct napi_struct
*napi
, int budget
)
375 struct w5300_priv
*priv
= container_of(napi
, struct w5300_priv
, napi
);
376 struct net_device
*ndev
= priv
->ndev
;
381 for (rx_count
= 0; rx_count
< budget
; rx_count
++) {
382 u32 rx_fifo_len
= w5300_read32(priv
, W5300_S0_RX_RSR
);
383 if (rx_fifo_len
== 0)
386 rx_len
= w5300_read(priv
, W5300_S0_RX_FIFO
);
388 skb
= netdev_alloc_skb_ip_align(ndev
, roundup(rx_len
, 2));
389 if (unlikely(!skb
)) {
391 for (i
= 0; i
< rx_fifo_len
; i
+= 2)
392 w5300_read(priv
, W5300_S0_RX_FIFO
);
393 ndev
->stats
.rx_dropped
++;
397 skb_put(skb
, rx_len
);
398 w5300_read_frame(priv
, skb
->data
, rx_len
);
399 skb
->protocol
= eth_type_trans(skb
, ndev
);
401 netif_receive_skb(skb
);
402 ndev
->stats
.rx_packets
++;
403 ndev
->stats
.rx_bytes
+= rx_len
;
406 if (rx_count
< budget
) {
407 napi_complete_done(napi
, rx_count
);
408 w5300_write(priv
, W5300_IMR
, IR_S0
);
414 static irqreturn_t
w5300_interrupt(int irq
, void *ndev_instance
)
416 struct net_device
*ndev
= ndev_instance
;
417 struct w5300_priv
*priv
= netdev_priv(ndev
);
419 int ir
= w5300_read(priv
, W5300_S0_IR
);
422 w5300_write(priv
, W5300_S0_IR
, ir
);
424 if (ir
& S0_IR_SENDOK
) {
425 netif_dbg(priv
, tx_done
, ndev
, "tx done\n");
426 netif_wake_queue(ndev
);
429 if (ir
& S0_IR_RECV
) {
430 if (napi_schedule_prep(&priv
->napi
)) {
431 w5300_write(priv
, W5300_IMR
, 0);
432 __napi_schedule(&priv
->napi
);
439 static irqreturn_t
w5300_detect_link(int irq
, void *ndev_instance
)
441 struct net_device
*ndev
= ndev_instance
;
442 struct w5300_priv
*priv
= netdev_priv(ndev
);
444 if (netif_running(ndev
)) {
445 if (gpio_get_value(priv
->link_gpio
) != 0) {
446 netif_info(priv
, link
, ndev
, "link is up\n");
447 netif_carrier_on(ndev
);
449 netif_info(priv
, link
, ndev
, "link is down\n");
450 netif_carrier_off(ndev
);
457 static void w5300_set_rx_mode(struct net_device
*ndev
)
459 struct w5300_priv
*priv
= netdev_priv(ndev
);
460 bool set_promisc
= (ndev
->flags
& IFF_PROMISC
) != 0;
462 if (priv
->promisc
!= set_promisc
) {
463 priv
->promisc
= set_promisc
;
464 w5300_hw_start(priv
);
468 static int w5300_set_macaddr(struct net_device
*ndev
, void *addr
)
470 struct w5300_priv
*priv
= netdev_priv(ndev
);
471 struct sockaddr
*sock_addr
= addr
;
473 if (!is_valid_ether_addr(sock_addr
->sa_data
))
474 return -EADDRNOTAVAIL
;
475 memcpy(ndev
->dev_addr
, sock_addr
->sa_data
, ETH_ALEN
);
476 w5300_write_macaddr(priv
);
480 static int w5300_open(struct net_device
*ndev
)
482 struct w5300_priv
*priv
= netdev_priv(ndev
);
484 netif_info(priv
, ifup
, ndev
, "enabling\n");
485 w5300_hw_start(priv
);
486 napi_enable(&priv
->napi
);
487 netif_start_queue(ndev
);
488 if (!gpio_is_valid(priv
->link_gpio
) ||
489 gpio_get_value(priv
->link_gpio
) != 0)
490 netif_carrier_on(ndev
);
494 static int w5300_stop(struct net_device
*ndev
)
496 struct w5300_priv
*priv
= netdev_priv(ndev
);
498 netif_info(priv
, ifdown
, ndev
, "shutting down\n");
499 w5300_hw_close(priv
);
500 netif_carrier_off(ndev
);
501 netif_stop_queue(ndev
);
502 napi_disable(&priv
->napi
);
506 static const struct ethtool_ops w5300_ethtool_ops
= {
507 .get_drvinfo
= w5300_get_drvinfo
,
508 .get_msglevel
= w5300_get_msglevel
,
509 .set_msglevel
= w5300_set_msglevel
,
510 .get_link
= w5300_get_link
,
511 .get_regs_len
= w5300_get_regs_len
,
512 .get_regs
= w5300_get_regs
,
515 static const struct net_device_ops w5300_netdev_ops
= {
516 .ndo_open
= w5300_open
,
517 .ndo_stop
= w5300_stop
,
518 .ndo_start_xmit
= w5300_start_tx
,
519 .ndo_tx_timeout
= w5300_tx_timeout
,
520 .ndo_set_rx_mode
= w5300_set_rx_mode
,
521 .ndo_set_mac_address
= w5300_set_macaddr
,
522 .ndo_validate_addr
= eth_validate_addr
,
525 static int w5300_hw_probe(struct platform_device
*pdev
)
527 struct wiznet_platform_data
*data
= dev_get_platdata(&pdev
->dev
);
528 struct net_device
*ndev
= platform_get_drvdata(pdev
);
529 struct w5300_priv
*priv
= netdev_priv(ndev
);
530 const char *name
= netdev_name(ndev
);
531 struct resource
*mem
;
536 if (data
&& is_valid_ether_addr(data
->mac_addr
)) {
537 memcpy(ndev
->dev_addr
, data
->mac_addr
, ETH_ALEN
);
539 eth_hw_addr_random(ndev
);
542 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
543 priv
->base
= devm_ioremap_resource(&pdev
->dev
, mem
);
544 if (IS_ERR(priv
->base
))
545 return PTR_ERR(priv
->base
);
547 mem_size
= resource_size(mem
);
549 spin_lock_init(&priv
->reg_lock
);
550 priv
->indirect
= mem_size
< W5300_BUS_DIRECT_SIZE
;
551 if (priv
->indirect
) {
552 priv
->read
= w5300_read_indirect
;
553 priv
->write
= w5300_write_indirect
;
555 priv
->read
= w5300_read_direct
;
556 priv
->write
= w5300_write_direct
;
559 w5300_hw_reset(priv
);
560 if (w5300_read(priv
, W5300_IDR
) != IDR_W5300
)
563 irq
= platform_get_irq(pdev
, 0);
566 ret
= request_irq(irq
, w5300_interrupt
,
567 IRQ_TYPE_LEVEL_LOW
, name
, ndev
);
572 priv
->link_gpio
= data
? data
->link_gpio
: -EINVAL
;
573 if (gpio_is_valid(priv
->link_gpio
)) {
574 char *link_name
= devm_kzalloc(&pdev
->dev
, 16, GFP_KERNEL
);
577 snprintf(link_name
, 16, "%s-link", name
);
578 priv
->link_irq
= gpio_to_irq(priv
->link_gpio
);
579 if (request_any_context_irq(priv
->link_irq
, w5300_detect_link
,
580 IRQF_TRIGGER_RISING
| IRQF_TRIGGER_FALLING
,
581 link_name
, priv
->ndev
) < 0)
582 priv
->link_gpio
= -EINVAL
;
585 netdev_info(ndev
, "at 0x%llx irq %d\n", (u64
)mem
->start
, irq
);
589 static int w5300_probe(struct platform_device
*pdev
)
591 struct w5300_priv
*priv
;
592 struct net_device
*ndev
;
595 ndev
= alloc_etherdev(sizeof(*priv
));
598 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
599 platform_set_drvdata(pdev
, ndev
);
600 priv
= netdev_priv(ndev
);
603 ndev
->netdev_ops
= &w5300_netdev_ops
;
604 ndev
->ethtool_ops
= &w5300_ethtool_ops
;
605 ndev
->watchdog_timeo
= HZ
;
606 netif_napi_add(ndev
, &priv
->napi
, w5300_napi_poll
, 16);
608 /* This chip doesn't support VLAN packets with normal MTU,
609 * so disable VLAN for this device.
611 ndev
->features
|= NETIF_F_VLAN_CHALLENGED
;
613 err
= register_netdev(ndev
);
617 err
= w5300_hw_probe(pdev
);
624 unregister_netdev(ndev
);
630 static int w5300_remove(struct platform_device
*pdev
)
632 struct net_device
*ndev
= platform_get_drvdata(pdev
);
633 struct w5300_priv
*priv
= netdev_priv(ndev
);
635 w5300_hw_reset(priv
);
636 free_irq(priv
->irq
, ndev
);
637 if (gpio_is_valid(priv
->link_gpio
))
638 free_irq(priv
->link_irq
, ndev
);
640 unregister_netdev(ndev
);
645 #ifdef CONFIG_PM_SLEEP
646 static int w5300_suspend(struct device
*dev
)
648 struct net_device
*ndev
= dev_get_drvdata(dev
);
649 struct w5300_priv
*priv
= netdev_priv(ndev
);
651 if (netif_running(ndev
)) {
652 netif_carrier_off(ndev
);
653 netif_device_detach(ndev
);
655 w5300_hw_close(priv
);
660 static int w5300_resume(struct device
*dev
)
662 struct net_device
*ndev
= dev_get_drvdata(dev
);
663 struct w5300_priv
*priv
= netdev_priv(ndev
);
665 if (!netif_running(ndev
)) {
666 w5300_hw_reset(priv
);
667 w5300_hw_start(priv
);
669 netif_device_attach(ndev
);
670 if (!gpio_is_valid(priv
->link_gpio
) ||
671 gpio_get_value(priv
->link_gpio
) != 0)
672 netif_carrier_on(ndev
);
676 #endif /* CONFIG_PM_SLEEP */
678 static SIMPLE_DEV_PM_OPS(w5300_pm_ops
, w5300_suspend
, w5300_resume
);
680 static struct platform_driver w5300_driver
= {
685 .probe
= w5300_probe
,
686 .remove
= w5300_remove
,
689 module_platform_driver(w5300_driver
);