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gpio: rcar: Fix runtime PM imbalance on error
[linux/fpc-iii.git] / drivers / net / wireless / st / cw1200 / cw1200_spi.c
blobef01caac629c55479006018404b55c141e28ff7a
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Mac80211 SPI driver for ST-Ericsson CW1200 device
4 *
5 * Copyright (c) 2011, Sagrad Inc.
6 * Author: Solomon Peachy <speachy@sagrad.com>
7 *
8 * Based on cw1200_sdio.c
9 * Copyright (c) 2010, ST-Ericsson
10 * Author: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
11 */
12
13 #include <linux/module.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
16 #include <linux/spinlock.h>
17 #include <linux/interrupt.h>
18 #include <net/mac80211.h>
19
20 #include <linux/spi/spi.h>
21 #include <linux/device.h>
22
23 #include "cw1200.h"
24 #include "hwbus.h"
25 #include <linux/platform_data/net-cw1200.h>
26 #include "hwio.h"
27
28 MODULE_AUTHOR("Solomon Peachy <speachy@sagrad.com>");
29 MODULE_DESCRIPTION("mac80211 ST-Ericsson CW1200 SPI driver");
30 MODULE_LICENSE("GPL");
31 MODULE_ALIAS("spi:cw1200_wlan_spi");
32
33 /* #define SPI_DEBUG */
34
35 struct hwbus_priv {
36 struct spi_device *func;
37 struct cw1200_common *core;
38 const struct cw1200_platform_data_spi *pdata;
39 spinlock_t lock; /* Serialize all bus operations */
40 wait_queue_head_t wq;
41 int claimed;
42 };
43
44 #define SDIO_TO_SPI_ADDR(addr) ((addr & 0x1f)>>2)
45 #define SET_WRITE 0x7FFF /* usage: and operation */
46 #define SET_READ 0x8000 /* usage: or operation */
47
48 /* Notes on byte ordering:
49 LE: B0 B1 B2 B3
50 BE: B3 B2 B1 B0
51
52 Hardware expects 32-bit data to be written as 16-bit BE words:
53
54 B1 B0 B3 B2
55 */
56
57 static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self,
58 unsigned int addr,
59 void *dst, int count)
60 {
61 int ret, i;
62 u16 regaddr;
63 struct spi_message m;
64
65 struct spi_transfer t_addr = {
66 .tx_buf = &regaddr,
67 .len = sizeof(regaddr),
68 };
69 struct spi_transfer t_msg = {
70 .rx_buf = dst,
71 .len = count,
72 };
73
74 regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
75 regaddr |= SET_READ;
76 regaddr |= (count>>1);
77
78 #ifdef SPI_DEBUG
79 pr_info("READ : %04d from 0x%02x (%04x)\n", count, addr, regaddr);
80 #endif
81
82 /* Header is LE16 */
83 regaddr = cpu_to_le16(regaddr);
84
85 /* We have to byteswap if the SPI bus is limited to 8b operation
86 or we are running on a Big Endian system
87 */
88 #if defined(__LITTLE_ENDIAN)
89 if (self->func->bits_per_word == 8)
90 #endif
91 regaddr = swab16(regaddr);
92
93 spi_message_init(&m);
94 spi_message_add_tail(&t_addr, &m);
95 spi_message_add_tail(&t_msg, &m);
96 ret = spi_sync(self->func, &m);
97
98 #ifdef SPI_DEBUG
99 pr_info("READ : ");
100 for (i = 0; i < t_addr.len; i++)
101 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
102 printk(" : ");
103 for (i = 0; i < t_msg.len; i++)
104 printk("%02x ", ((u8 *)t_msg.rx_buf)[i]);
105 printk("\n");
106 #endif
107
108 /* We have to byteswap if the SPI bus is limited to 8b operation
109 or we are running on a Big Endian system
110 */
111 #if defined(__LITTLE_ENDIAN)
112 if (self->func->bits_per_word == 8)
113 #endif
114 {
115 uint16_t *buf = (uint16_t *)dst;
116 for (i = 0; i < ((count + 1) >> 1); i++)
117 buf[i] = swab16(buf[i]);
118 }
119
120 return ret;
121 }
122
123 static int cw1200_spi_memcpy_toio(struct hwbus_priv *self,
124 unsigned int addr,
125 const void *src, int count)
126 {
127 int rval, i;
128 u16 regaddr;
129 struct spi_transfer t_addr = {
130 .tx_buf = &regaddr,
131 .len = sizeof(regaddr),
132 };
133 struct spi_transfer t_msg = {
134 .tx_buf = src,
135 .len = count,
136 };
137 struct spi_message m;
138
139 regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
140 regaddr &= SET_WRITE;
141 regaddr |= (count>>1);
142
143 #ifdef SPI_DEBUG
144 pr_info("WRITE: %04d to 0x%02x (%04x)\n", count, addr, regaddr);
145 #endif
146
147 /* Header is LE16 */
148 regaddr = cpu_to_le16(regaddr);
149
150 /* We have to byteswap if the SPI bus is limited to 8b operation
151 or we are running on a Big Endian system
152 */
153 #if defined(__LITTLE_ENDIAN)
154 if (self->func->bits_per_word == 8)
155 #endif
156 {
157 uint16_t *buf = (uint16_t *)src;
158 regaddr = swab16(regaddr);
159 for (i = 0; i < ((count + 1) >> 1); i++)
160 buf[i] = swab16(buf[i]);
161 }
162
163 #ifdef SPI_DEBUG
164 pr_info("WRITE: ");
165 for (i = 0; i < t_addr.len; i++)
166 printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
167 printk(" : ");
168 for (i = 0; i < t_msg.len; i++)
169 printk("%02x ", ((u8 *)t_msg.tx_buf)[i]);
170 printk("\n");
171 #endif
172
173 spi_message_init(&m);
174 spi_message_add_tail(&t_addr, &m);
175 spi_message_add_tail(&t_msg, &m);
176 rval = spi_sync(self->func, &m);
177
178 #ifdef SPI_DEBUG
179 pr_info("WROTE: %d\n", m.actual_length);
180 #endif
181
182 #if defined(__LITTLE_ENDIAN)
183 /* We have to byteswap if the SPI bus is limited to 8b operation */
184 if (self->func->bits_per_word == 8)
185 #endif
186 {
187 uint16_t *buf = (uint16_t *)src;
188 for (i = 0; i < ((count + 1) >> 1); i++)
189 buf[i] = swab16(buf[i]);
190 }
191 return rval;
192 }
193
194 static void cw1200_spi_lock(struct hwbus_priv *self)
195 {
196 unsigned long flags;
197
198 DECLARE_WAITQUEUE(wait, current);
199
200 might_sleep();
201
202 add_wait_queue(&self->wq, &wait);
203 spin_lock_irqsave(&self->lock, flags);
204 while (1) {
205 set_current_state(TASK_UNINTERRUPTIBLE);
206 if (!self->claimed)
207 break;
208 spin_unlock_irqrestore(&self->lock, flags);
209 schedule();
210 spin_lock_irqsave(&self->lock, flags);
211 }
212 set_current_state(TASK_RUNNING);
213 self->claimed = 1;
214 spin_unlock_irqrestore(&self->lock, flags);
215 remove_wait_queue(&self->wq, &wait);
216
217 return;
218 }
219
220 static void cw1200_spi_unlock(struct hwbus_priv *self)
221 {
222 unsigned long flags;
223
224 spin_lock_irqsave(&self->lock, flags);
225 self->claimed = 0;
226 spin_unlock_irqrestore(&self->lock, flags);
227 wake_up(&self->wq);
228
229 return;
230 }
231
232 static irqreturn_t cw1200_spi_irq_handler(int irq, void *dev_id)
233 {
234 struct hwbus_priv *self = dev_id;
235
236 if (self->core) {
237 cw1200_spi_lock(self);
238 cw1200_irq_handler(self->core);
239 cw1200_spi_unlock(self);
240 return IRQ_HANDLED;
241 } else {
242 return IRQ_NONE;
243 }
244 }
245
246 static int cw1200_spi_irq_subscribe(struct hwbus_priv *self)
247 {
248 int ret;
249
250 pr_debug("SW IRQ subscribe\n");
251
252 ret = request_threaded_irq(self->func->irq, NULL,
253 cw1200_spi_irq_handler,
254 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
255 "cw1200_wlan_irq", self);
256 if (WARN_ON(ret < 0))
257 goto exit;
258
259 ret = enable_irq_wake(self->func->irq);
260 if (WARN_ON(ret))
261 goto free_irq;
262
263 return 0;
264
265 free_irq:
266 free_irq(self->func->irq, self);
267 exit:
268 return ret;
269 }
270
271 static int cw1200_spi_irq_unsubscribe(struct hwbus_priv *self)
272 {
273 int ret = 0;
274
275 pr_debug("SW IRQ unsubscribe\n");
276 disable_irq_wake(self->func->irq);
277 free_irq(self->func->irq, self);
278
279 return ret;
280 }
281
282 static int cw1200_spi_off(const struct cw1200_platform_data_spi *pdata)
283 {
284 if (pdata->reset) {
285 gpio_set_value(pdata->reset, 0);
286 msleep(30); /* Min is 2 * CLK32K cycles */
287 gpio_free(pdata->reset);
288 }
289
290 if (pdata->power_ctrl)
291 pdata->power_ctrl(pdata, false);
292 if (pdata->clk_ctrl)
293 pdata->clk_ctrl(pdata, false);
294
295 return 0;
296 }
297
298 static int cw1200_spi_on(const struct cw1200_platform_data_spi *pdata)
299 {
300 /* Ensure I/Os are pulled low */
301 if (pdata->reset) {
302 gpio_request(pdata->reset, "cw1200_wlan_reset");
303 gpio_direction_output(pdata->reset, 0);
304 }
305 if (pdata->powerup) {
306 gpio_request(pdata->powerup, "cw1200_wlan_powerup");
307 gpio_direction_output(pdata->powerup, 0);
308 }
309 if (pdata->reset || pdata->powerup)
310 msleep(10); /* Settle time? */
311
312 /* Enable 3v3 and 1v8 to hardware */
313 if (pdata->power_ctrl) {
314 if (pdata->power_ctrl(pdata, true)) {
315 pr_err("power_ctrl() failed!\n");
316 return -1;
317 }
318 }
319
320 /* Enable CLK32K */
321 if (pdata->clk_ctrl) {
322 if (pdata->clk_ctrl(pdata, true)) {
323 pr_err("clk_ctrl() failed!\n");
324 return -1;
325 }
326 msleep(10); /* Delay until clock is stable for 2 cycles */
327 }
328
329 /* Enable POWERUP signal */
330 if (pdata->powerup) {
331 gpio_set_value(pdata->powerup, 1);
332 msleep(250); /* or more..? */
333 }
334 /* Enable RSTn signal */
335 if (pdata->reset) {
336 gpio_set_value(pdata->reset, 1);
337 msleep(50); /* Or more..? */
338 }
339 return 0;
340 }
341
342 static size_t cw1200_spi_align_size(struct hwbus_priv *self, size_t size)
343 {
344 return size & 1 ? size + 1 : size;
345 }
346
347 static int cw1200_spi_pm(struct hwbus_priv *self, bool suspend)
348 {
349 return irq_set_irq_wake(self->func->irq, suspend);
350 }
351
352 static const struct hwbus_ops cw1200_spi_hwbus_ops = {
353 .hwbus_memcpy_fromio = cw1200_spi_memcpy_fromio,
354 .hwbus_memcpy_toio = cw1200_spi_memcpy_toio,
355 .lock = cw1200_spi_lock,
356 .unlock = cw1200_spi_unlock,
357 .align_size = cw1200_spi_align_size,
358 .power_mgmt = cw1200_spi_pm,
359 };
360
361 /* Probe Function to be called by SPI stack when device is discovered */
362 static int cw1200_spi_probe(struct spi_device *func)
363 {
364 const struct cw1200_platform_data_spi *plat_data =
365 dev_get_platdata(&func->dev);
366 struct hwbus_priv *self;
367 int status;
368
369 /* Sanity check speed */
370 if (func->max_speed_hz > 52000000)
371 func->max_speed_hz = 52000000;
372 if (func->max_speed_hz < 1000000)
373 func->max_speed_hz = 1000000;
374
375 /* Fix up transfer size */
376 if (plat_data->spi_bits_per_word)
377 func->bits_per_word = plat_data->spi_bits_per_word;
378 if (!func->bits_per_word)
379 func->bits_per_word = 16;
380
381 /* And finally.. */
382 func->mode = SPI_MODE_0;
383
384 pr_info("cw1200_wlan_spi: Probe called (CS %d M %d BPW %d CLK %d)\n",
385 func->chip_select, func->mode, func->bits_per_word,
386 func->max_speed_hz);
387
388 if (cw1200_spi_on(plat_data)) {
389 pr_err("spi_on() failed!\n");
390 return -1;
391 }
392
393 if (spi_setup(func)) {
394 pr_err("spi_setup() failed!\n");
395 return -1;
396 }
397
398 self = devm_kzalloc(&func->dev, sizeof(*self), GFP_KERNEL);
399 if (!self) {
400 pr_err("Can't allocate SPI hwbus_priv.");
401 return -ENOMEM;
402 }
403
404 self->pdata = plat_data;
405 self->func = func;
406 spin_lock_init(&self->lock);
407
408 spi_set_drvdata(func, self);
409
410 init_waitqueue_head(&self->wq);
411
412 status = cw1200_spi_irq_subscribe(self);
413
414 status = cw1200_core_probe(&cw1200_spi_hwbus_ops,
415 self, &func->dev, &self->core,
416 self->pdata->ref_clk,
417 self->pdata->macaddr,
418 self->pdata->sdd_file,
419 self->pdata->have_5ghz);
420
421 if (status) {
422 cw1200_spi_irq_unsubscribe(self);
423 cw1200_spi_off(plat_data);
424 }
425
426 return status;
427 }
428
429 /* Disconnect Function to be called by SPI stack when device is disconnected */
430 static int cw1200_spi_disconnect(struct spi_device *func)
431 {
432 struct hwbus_priv *self = spi_get_drvdata(func);
433
434 if (self) {
435 cw1200_spi_irq_unsubscribe(self);
436 if (self->core) {
437 cw1200_core_release(self->core);
438 self->core = NULL;
439 }
440 }
441 cw1200_spi_off(dev_get_platdata(&func->dev));
442
443 return 0;
444 }
445
446 static int __maybe_unused cw1200_spi_suspend(struct device *dev)
447 {
448 struct hwbus_priv *self = spi_get_drvdata(to_spi_device(dev));
449
450 if (!cw1200_can_suspend(self->core))
451 return -EAGAIN;
452
453 /* XXX notify host that we have to keep CW1200 powered on? */
454 return 0;
455 }
456
457 static SIMPLE_DEV_PM_OPS(cw1200_pm_ops, cw1200_spi_suspend, NULL);
458
459 static struct spi_driver spi_driver = {
460 .probe = cw1200_spi_probe,
461 .remove = cw1200_spi_disconnect,
462 .driver = {
463 .name = "cw1200_wlan_spi",
464 .pm = IS_ENABLED(CONFIG_PM) ? &cw1200_pm_ops : NULL,
465 },
466 };
467
468 module_spi_driver(spi_driver);
Linux with added FPC-III support