1 // SPDX-License-Identifier: GPL-2.0
2 // SPI interface for ChromeOS Embedded Controller
4 // Copyright (C) 2012 Google, Inc
6 #include <linux/delay.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
10 #include <linux/platform_data/cros_ec_commands.h>
11 #include <linux/platform_data/cros_ec_proto.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
14 #include <linux/spi/spi.h>
15 #include <uapi/linux/sched/types.h>
19 /* The header byte, which follows the preamble */
20 #define EC_MSG_HEADER 0xec
23 * Number of EC preamble bytes we read at a time. Since it takes
24 * about 400-500us for the EC to respond there is not a lot of
25 * point in tuning this. If the EC could respond faster then
26 * we could increase this so that might expect the preamble and
27 * message to occur in a single transaction. However, the maximum
28 * SPI transfer size is 256 bytes, so at 5MHz we need a response
29 * time of perhaps <320us (200 bytes / 1600 bits).
31 #define EC_MSG_PREAMBLE_COUNT 32
34 * Allow for a long time for the EC to respond. We support i2c
35 * tunneling and support fairly long messages for the tunnel (249
36 * bytes long at the moment). If we're talking to a 100 kHz device
37 * on the other end and need to transfer ~256 bytes, then we need:
38 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
40 * We'll wait 8 times that to handle clock stretching and other
41 * paranoia. Note that some battery gas gauge ICs claim to have a
42 * clock stretch of 144ms in rare situations. That's incentive for
43 * not directly passing i2c through, but it's too late for that for
46 * It's pretty unlikely that we'll really see a 249 byte tunnel in
47 * anything other than testing. If this was more common we might
48 * consider having slow commands like this require a GET_STATUS
49 * wait loop. The 'flash write' command would be another candidate
50 * for this, clocking in at 2-3ms.
52 #define EC_MSG_DEADLINE_MS 200
55 * Time between raising the SPI chip select (for the end of a
56 * transaction) and dropping it again (for the next transaction).
57 * If we go too fast, the EC will miss the transaction. We know that we
58 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
61 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
64 * struct cros_ec_spi - information about a SPI-connected EC
66 * @spi: SPI device we are connected to
67 * @last_transfer_ns: time that we last finished a transfer.
68 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
69 * is sent when we want to turn on CS at the start of a transaction.
70 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
71 * is sent when we want to turn off CS at the end of a transaction.
72 * @high_pri_worker: Used to schedule high priority work.
75 struct spi_device
*spi
;
77 unsigned int start_of_msg_delay
;
78 unsigned int end_of_msg_delay
;
79 struct kthread_worker
*high_pri_worker
;
82 typedef int (*cros_ec_xfer_fn_t
) (struct cros_ec_device
*ec_dev
,
83 struct cros_ec_command
*ec_msg
);
86 * struct cros_ec_xfer_work_params - params for our high priority workers
88 * @work: The work_struct needed to queue work
89 * @fn: The function to use to transfer
90 * @ec_dev: ChromeOS EC device
91 * @ec_msg: Message to transfer
92 * @ret: The return value of the function
95 struct cros_ec_xfer_work_params
{
96 struct kthread_work work
;
98 struct cros_ec_device
*ec_dev
;
99 struct cros_ec_command
*ec_msg
;
103 static void debug_packet(struct device
*dev
, const char *name
, u8
*ptr
,
109 dev_dbg(dev
, "%s: ", name
);
110 for (i
= 0; i
< len
; i
++)
111 pr_cont(" %02x", ptr
[i
]);
117 static int terminate_request(struct cros_ec_device
*ec_dev
)
119 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
120 struct spi_message msg
;
121 struct spi_transfer trans
;
125 * Turn off CS, possibly adding a delay to ensure the rising edge
126 * doesn't come too soon after the end of the data.
128 spi_message_init(&msg
);
129 memset(&trans
, 0, sizeof(trans
));
130 trans
.delay
.value
= ec_spi
->end_of_msg_delay
;
131 trans
.delay
.unit
= SPI_DELAY_UNIT_USECS
;
132 spi_message_add_tail(&trans
, &msg
);
134 ret
= spi_sync_locked(ec_spi
->spi
, &msg
);
136 /* Reset end-of-response timer */
137 ec_spi
->last_transfer_ns
= ktime_get_ns();
140 "cs-deassert spi transfer failed: %d\n",
148 * receive_n_bytes - receive n bytes from the EC.
150 * Assumes buf is a pointer into the ec_dev->din buffer
152 static int receive_n_bytes(struct cros_ec_device
*ec_dev
, u8
*buf
, int n
)
154 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
155 struct spi_transfer trans
;
156 struct spi_message msg
;
159 BUG_ON(buf
- ec_dev
->din
+ n
> ec_dev
->din_size
);
161 memset(&trans
, 0, sizeof(trans
));
166 spi_message_init(&msg
);
167 spi_message_add_tail(&trans
, &msg
);
168 ret
= spi_sync_locked(ec_spi
->spi
, &msg
);
170 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
176 * cros_ec_spi_receive_packet - Receive a packet from the EC.
178 * This function has two phases: reading the preamble bytes (since if we read
179 * data from the EC before it is ready to send, we just get preamble) and
180 * reading the actual message.
182 * The received data is placed into ec_dev->din.
184 * @ec_dev: ChromeOS EC device
185 * @need_len: Number of message bytes we need to read
187 static int cros_ec_spi_receive_packet(struct cros_ec_device
*ec_dev
,
190 struct ec_host_response
*response
;
193 unsigned long deadline
;
196 BUG_ON(ec_dev
->din_size
< EC_MSG_PREAMBLE_COUNT
);
198 /* Receive data until we see the header byte */
199 deadline
= jiffies
+ msecs_to_jiffies(EC_MSG_DEADLINE_MS
);
201 unsigned long start_jiffies
= jiffies
;
203 ret
= receive_n_bytes(ec_dev
,
205 EC_MSG_PREAMBLE_COUNT
);
210 for (end
= ptr
+ EC_MSG_PREAMBLE_COUNT
; ptr
!= end
; ptr
++) {
211 if (*ptr
== EC_SPI_FRAME_START
) {
212 dev_dbg(ec_dev
->dev
, "msg found at %zd\n",
221 * Use the time at the start of the loop as a timeout. This
222 * gives us one last shot at getting the transfer and is useful
223 * in case we got context switched out for a while.
225 if (time_after(start_jiffies
, deadline
)) {
226 dev_warn(ec_dev
->dev
, "EC failed to respond in time\n");
232 * ptr now points to the header byte. Copy any valid data to the
233 * start of our buffer
236 BUG_ON(todo
< 0 || todo
> ec_dev
->din_size
);
237 todo
= min(todo
, need_len
);
238 memmove(ec_dev
->din
, ptr
, todo
);
239 ptr
= ec_dev
->din
+ todo
;
240 dev_dbg(ec_dev
->dev
, "need %d, got %d bytes from preamble\n",
244 /* If the entire response struct wasn't read, get the rest of it. */
245 if (todo
< sizeof(*response
)) {
246 ret
= receive_n_bytes(ec_dev
, ptr
, sizeof(*response
) - todo
);
249 ptr
+= (sizeof(*response
) - todo
);
250 todo
= sizeof(*response
);
253 response
= (struct ec_host_response
*)ec_dev
->din
;
255 /* Abort if data_len is too large. */
256 if (response
->data_len
> ec_dev
->din_size
)
259 /* Receive data until we have it all */
260 while (need_len
> 0) {
262 * We can't support transfers larger than the SPI FIFO size
263 * unless we have DMA. We don't have DMA on the ISP SPI ports
264 * for Exynos. We need a way of asking SPI driver for
265 * maximum-supported transfer size.
267 todo
= min(need_len
, 256);
268 dev_dbg(ec_dev
->dev
, "loop, todo=%d, need_len=%d, ptr=%zd\n",
269 todo
, need_len
, ptr
- ec_dev
->din
);
271 ret
= receive_n_bytes(ec_dev
, ptr
, todo
);
279 dev_dbg(ec_dev
->dev
, "loop done, ptr=%zd\n", ptr
- ec_dev
->din
);
285 * cros_ec_spi_receive_response - Receive a response from the EC.
287 * This function has two phases: reading the preamble bytes (since if we read
288 * data from the EC before it is ready to send, we just get preamble) and
289 * reading the actual message.
291 * The received data is placed into ec_dev->din.
293 * @ec_dev: ChromeOS EC device
294 * @need_len: Number of message bytes we need to read
296 static int cros_ec_spi_receive_response(struct cros_ec_device
*ec_dev
,
301 unsigned long deadline
;
304 BUG_ON(ec_dev
->din_size
< EC_MSG_PREAMBLE_COUNT
);
306 /* Receive data until we see the header byte */
307 deadline
= jiffies
+ msecs_to_jiffies(EC_MSG_DEADLINE_MS
);
309 unsigned long start_jiffies
= jiffies
;
311 ret
= receive_n_bytes(ec_dev
,
313 EC_MSG_PREAMBLE_COUNT
);
318 for (end
= ptr
+ EC_MSG_PREAMBLE_COUNT
; ptr
!= end
; ptr
++) {
319 if (*ptr
== EC_SPI_FRAME_START
) {
320 dev_dbg(ec_dev
->dev
, "msg found at %zd\n",
329 * Use the time at the start of the loop as a timeout. This
330 * gives us one last shot at getting the transfer and is useful
331 * in case we got context switched out for a while.
333 if (time_after(start_jiffies
, deadline
)) {
334 dev_warn(ec_dev
->dev
, "EC failed to respond in time\n");
340 * ptr now points to the header byte. Copy any valid data to the
341 * start of our buffer
344 BUG_ON(todo
< 0 || todo
> ec_dev
->din_size
);
345 todo
= min(todo
, need_len
);
346 memmove(ec_dev
->din
, ptr
, todo
);
347 ptr
= ec_dev
->din
+ todo
;
348 dev_dbg(ec_dev
->dev
, "need %d, got %d bytes from preamble\n",
352 /* Receive data until we have it all */
353 while (need_len
> 0) {
355 * We can't support transfers larger than the SPI FIFO size
356 * unless we have DMA. We don't have DMA on the ISP SPI ports
357 * for Exynos. We need a way of asking SPI driver for
358 * maximum-supported transfer size.
360 todo
= min(need_len
, 256);
361 dev_dbg(ec_dev
->dev
, "loop, todo=%d, need_len=%d, ptr=%zd\n",
362 todo
, need_len
, ptr
- ec_dev
->din
);
364 ret
= receive_n_bytes(ec_dev
, ptr
, todo
);
368 debug_packet(ec_dev
->dev
, "interim", ptr
, todo
);
373 dev_dbg(ec_dev
->dev
, "loop done, ptr=%zd\n", ptr
- ec_dev
->din
);
379 * do_cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
381 * @ec_dev: ChromeOS EC device
382 * @ec_msg: Message to transfer
384 static int do_cros_ec_pkt_xfer_spi(struct cros_ec_device
*ec_dev
,
385 struct cros_ec_command
*ec_msg
)
387 struct ec_host_response
*response
;
388 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
389 struct spi_transfer trans
, trans_delay
;
390 struct spi_message msg
;
396 int ret
= 0, final_ret
;
399 len
= cros_ec_prepare_tx(ec_dev
, ec_msg
);
400 dev_dbg(ec_dev
->dev
, "prepared, len=%d\n", len
);
402 /* If it's too soon to do another transaction, wait */
403 delay
= ktime_get_ns() - ec_spi
->last_transfer_ns
;
404 if (delay
< EC_SPI_RECOVERY_TIME_NS
)
405 ndelay(EC_SPI_RECOVERY_TIME_NS
- delay
);
407 rx_buf
= kzalloc(len
, GFP_KERNEL
);
411 spi_bus_lock(ec_spi
->spi
->master
);
414 * Leave a gap between CS assertion and clocking of data to allow the
417 spi_message_init(&msg
);
418 if (ec_spi
->start_of_msg_delay
) {
419 memset(&trans_delay
, 0, sizeof(trans_delay
));
420 trans_delay
.delay
.value
= ec_spi
->start_of_msg_delay
;
421 trans_delay
.delay
.unit
= SPI_DELAY_UNIT_USECS
;
422 spi_message_add_tail(&trans_delay
, &msg
);
425 /* Transmit phase - send our message */
426 memset(&trans
, 0, sizeof(trans
));
427 trans
.tx_buf
= ec_dev
->dout
;
428 trans
.rx_buf
= rx_buf
;
431 spi_message_add_tail(&trans
, &msg
);
432 ret
= spi_sync_locked(ec_spi
->spi
, &msg
);
434 /* Get the response */
436 /* Verify that EC can process command */
437 for (i
= 0; i
< len
; i
++) {
440 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
441 * markers are all signs that the EC didn't fully
442 * receive our command. e.g., if the EC is flashing
443 * itself, it can't respond to any commands and instead
444 * clocks out EC_SPI_PAST_END from its SPI hardware
445 * buffer. Similar occurrences can happen if the AP is
446 * too slow to clock out data after asserting CS -- the
447 * EC will abort and fill its buffer with
448 * EC_SPI_RX_BAD_DATA.
450 * In all cases, these errors should be safe to retry.
451 * Report -EAGAIN and let the caller decide what to do
454 if (rx_byte
== EC_SPI_PAST_END
||
455 rx_byte
== EC_SPI_RX_BAD_DATA
||
456 rx_byte
== EC_SPI_NOT_READY
) {
464 ret
= cros_ec_spi_receive_packet(ec_dev
,
465 ec_msg
->insize
+ sizeof(*response
));
466 else if (ret
!= -EAGAIN
)
467 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
469 final_ret
= terminate_request(ec_dev
);
471 spi_bus_unlock(ec_spi
->spi
->master
);
480 /* check response error code */
481 response
= (struct ec_host_response
*)ptr
;
482 ec_msg
->result
= response
->result
;
484 ret
= cros_ec_check_result(ec_dev
, ec_msg
);
488 len
= response
->data_len
;
490 if (len
> ec_msg
->insize
) {
491 dev_err(ec_dev
->dev
, "packet too long (%d bytes, expected %d)",
492 len
, ec_msg
->insize
);
497 for (i
= 0; i
< sizeof(*response
); i
++)
500 /* copy response packet payload and compute checksum */
501 memcpy(ec_msg
->data
, ptr
+ sizeof(*response
), len
);
502 for (i
= 0; i
< len
; i
++)
503 sum
+= ec_msg
->data
[i
];
507 "bad packet checksum, calculated %x\n",
516 if (ec_msg
->command
== EC_CMD_REBOOT_EC
)
517 msleep(EC_REBOOT_DELAY_MS
);
523 * do_cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
525 * @ec_dev: ChromeOS EC device
526 * @ec_msg: Message to transfer
528 static int do_cros_ec_cmd_xfer_spi(struct cros_ec_device
*ec_dev
,
529 struct cros_ec_command
*ec_msg
)
531 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
532 struct spi_transfer trans
;
533 struct spi_message msg
;
539 int ret
= 0, final_ret
;
542 len
= cros_ec_prepare_tx(ec_dev
, ec_msg
);
543 dev_dbg(ec_dev
->dev
, "prepared, len=%d\n", len
);
545 /* If it's too soon to do another transaction, wait */
546 delay
= ktime_get_ns() - ec_spi
->last_transfer_ns
;
547 if (delay
< EC_SPI_RECOVERY_TIME_NS
)
548 ndelay(EC_SPI_RECOVERY_TIME_NS
- delay
);
550 rx_buf
= kzalloc(len
, GFP_KERNEL
);
554 spi_bus_lock(ec_spi
->spi
->master
);
556 /* Transmit phase - send our message */
557 debug_packet(ec_dev
->dev
, "out", ec_dev
->dout
, len
);
558 memset(&trans
, 0, sizeof(trans
));
559 trans
.tx_buf
= ec_dev
->dout
;
560 trans
.rx_buf
= rx_buf
;
563 spi_message_init(&msg
);
564 spi_message_add_tail(&trans
, &msg
);
565 ret
= spi_sync_locked(ec_spi
->spi
, &msg
);
567 /* Get the response */
569 /* Verify that EC can process command */
570 for (i
= 0; i
< len
; i
++) {
572 /* See comments in cros_ec_pkt_xfer_spi() */
573 if (rx_byte
== EC_SPI_PAST_END
||
574 rx_byte
== EC_SPI_RX_BAD_DATA
||
575 rx_byte
== EC_SPI_NOT_READY
) {
583 ret
= cros_ec_spi_receive_response(ec_dev
,
584 ec_msg
->insize
+ EC_MSG_TX_PROTO_BYTES
);
585 else if (ret
!= -EAGAIN
)
586 dev_err(ec_dev
->dev
, "spi transfer failed: %d\n", ret
);
588 final_ret
= terminate_request(ec_dev
);
590 spi_bus_unlock(ec_spi
->spi
->master
);
599 /* check response error code */
600 ec_msg
->result
= ptr
[0];
601 ret
= cros_ec_check_result(ec_dev
, ec_msg
);
606 sum
= ptr
[0] + ptr
[1];
607 if (len
> ec_msg
->insize
) {
608 dev_err(ec_dev
->dev
, "packet too long (%d bytes, expected %d)",
609 len
, ec_msg
->insize
);
614 /* copy response packet payload and compute checksum */
615 for (i
= 0; i
< len
; i
++) {
618 ec_msg
->data
[i
] = ptr
[i
+ 2];
622 debug_packet(ec_dev
->dev
, "in", ptr
, len
+ 3);
624 if (sum
!= ptr
[len
+ 2]) {
626 "bad packet checksum, expected %02x, got %02x\n",
635 if (ec_msg
->command
== EC_CMD_REBOOT_EC
)
636 msleep(EC_REBOOT_DELAY_MS
);
641 static void cros_ec_xfer_high_pri_work(struct kthread_work
*work
)
643 struct cros_ec_xfer_work_params
*params
;
645 params
= container_of(work
, struct cros_ec_xfer_work_params
, work
);
646 params
->ret
= params
->fn(params
->ec_dev
, params
->ec_msg
);
649 static int cros_ec_xfer_high_pri(struct cros_ec_device
*ec_dev
,
650 struct cros_ec_command
*ec_msg
,
651 cros_ec_xfer_fn_t fn
)
653 struct cros_ec_spi
*ec_spi
= ec_dev
->priv
;
654 struct cros_ec_xfer_work_params params
= {
655 .work
= KTHREAD_WORK_INIT(params
.work
,
656 cros_ec_xfer_high_pri_work
),
663 * This looks a bit ridiculous. Why do the work on a
664 * different thread if we're just going to block waiting for
665 * the thread to finish? The key here is that the thread is
666 * running at high priority but the calling context might not
667 * be. We need to be at high priority to avoid getting
668 * context switched out for too long and the EC giving up on
671 kthread_queue_work(ec_spi
->high_pri_worker
, ¶ms
.work
);
672 kthread_flush_work(¶ms
.work
);
677 static int cros_ec_pkt_xfer_spi(struct cros_ec_device
*ec_dev
,
678 struct cros_ec_command
*ec_msg
)
680 return cros_ec_xfer_high_pri(ec_dev
, ec_msg
, do_cros_ec_pkt_xfer_spi
);
683 static int cros_ec_cmd_xfer_spi(struct cros_ec_device
*ec_dev
,
684 struct cros_ec_command
*ec_msg
)
686 return cros_ec_xfer_high_pri(ec_dev
, ec_msg
, do_cros_ec_cmd_xfer_spi
);
689 static void cros_ec_spi_dt_probe(struct cros_ec_spi
*ec_spi
, struct device
*dev
)
691 struct device_node
*np
= dev
->of_node
;
695 ret
= of_property_read_u32(np
, "google,cros-ec-spi-pre-delay", &val
);
697 ec_spi
->start_of_msg_delay
= val
;
699 ret
= of_property_read_u32(np
, "google,cros-ec-spi-msg-delay", &val
);
701 ec_spi
->end_of_msg_delay
= val
;
704 static void cros_ec_spi_high_pri_release(void *worker
)
706 kthread_destroy_worker(worker
);
709 static int cros_ec_spi_devm_high_pri_alloc(struct device
*dev
,
710 struct cros_ec_spi
*ec_spi
)
712 struct sched_param sched_priority
= {
713 .sched_priority
= MAX_RT_PRIO
/ 2,
717 ec_spi
->high_pri_worker
=
718 kthread_create_worker(0, "cros_ec_spi_high_pri");
720 if (IS_ERR(ec_spi
->high_pri_worker
)) {
721 err
= PTR_ERR(ec_spi
->high_pri_worker
);
722 dev_err(dev
, "Can't create cros_ec high pri worker: %d\n", err
);
726 err
= devm_add_action_or_reset(dev
, cros_ec_spi_high_pri_release
,
727 ec_spi
->high_pri_worker
);
731 err
= sched_setscheduler_nocheck(ec_spi
->high_pri_worker
->task
,
732 SCHED_FIFO
, &sched_priority
);
734 dev_err(dev
, "Can't set cros_ec high pri priority: %d\n", err
);
738 static int cros_ec_spi_probe(struct spi_device
*spi
)
740 struct device
*dev
= &spi
->dev
;
741 struct cros_ec_device
*ec_dev
;
742 struct cros_ec_spi
*ec_spi
;
745 spi
->bits_per_word
= 8;
746 spi
->mode
= SPI_MODE_0
;
748 err
= spi_setup(spi
);
752 ec_spi
= devm_kzalloc(dev
, sizeof(*ec_spi
), GFP_KERNEL
);
756 ec_dev
= devm_kzalloc(dev
, sizeof(*ec_dev
), GFP_KERNEL
);
760 /* Check for any DT properties */
761 cros_ec_spi_dt_probe(ec_spi
, dev
);
763 spi_set_drvdata(spi
, ec_dev
);
765 ec_dev
->priv
= ec_spi
;
766 ec_dev
->irq
= spi
->irq
;
767 ec_dev
->cmd_xfer
= cros_ec_cmd_xfer_spi
;
768 ec_dev
->pkt_xfer
= cros_ec_pkt_xfer_spi
;
769 ec_dev
->phys_name
= dev_name(&ec_spi
->spi
->dev
);
770 ec_dev
->din_size
= EC_MSG_PREAMBLE_COUNT
+
771 sizeof(struct ec_host_response
) +
772 sizeof(struct ec_response_get_protocol_info
);
773 ec_dev
->dout_size
= sizeof(struct ec_host_request
);
775 ec_spi
->last_transfer_ns
= ktime_get_ns();
777 err
= cros_ec_spi_devm_high_pri_alloc(dev
, ec_spi
);
781 err
= cros_ec_register(ec_dev
);
783 dev_err(dev
, "cannot register EC\n");
787 device_init_wakeup(&spi
->dev
, true);
792 static int cros_ec_spi_remove(struct spi_device
*spi
)
794 struct cros_ec_device
*ec_dev
= spi_get_drvdata(spi
);
796 return cros_ec_unregister(ec_dev
);
799 #ifdef CONFIG_PM_SLEEP
800 static int cros_ec_spi_suspend(struct device
*dev
)
802 struct cros_ec_device
*ec_dev
= dev_get_drvdata(dev
);
804 return cros_ec_suspend(ec_dev
);
807 static int cros_ec_spi_resume(struct device
*dev
)
809 struct cros_ec_device
*ec_dev
= dev_get_drvdata(dev
);
811 return cros_ec_resume(ec_dev
);
815 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops
, cros_ec_spi_suspend
,
818 static const struct of_device_id cros_ec_spi_of_match
[] = {
819 { .compatible
= "google,cros-ec-spi", },
822 MODULE_DEVICE_TABLE(of
, cros_ec_spi_of_match
);
824 static const struct spi_device_id cros_ec_spi_id
[] = {
825 { "cros-ec-spi", 0 },
828 MODULE_DEVICE_TABLE(spi
, cros_ec_spi_id
);
830 static struct spi_driver cros_ec_driver_spi
= {
832 .name
= "cros-ec-spi",
833 .of_match_table
= cros_ec_spi_of_match
,
834 .pm
= &cros_ec_spi_pm_ops
,
836 .probe
= cros_ec_spi_probe
,
837 .remove
= cros_ec_spi_remove
,
838 .id_table
= cros_ec_spi_id
,
841 module_spi_driver(cros_ec_driver_spi
);
843 MODULE_LICENSE("GPL v2");
844 MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller");