1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) STMicroelectronics 2019
3 // Authors: Gabriel Fernandez <gabriel.fernandez@st.com>
4 // Pascal Paillet <p.paillet@st.com>.
7 #include <linux/iopoll.h>
8 #include <linux/module.h>
9 #include <linux/of_address.h>
10 #include <linux/of_device.h>
11 #include <linux/platform_device.h>
12 #include <linux/regulator/driver.h>
13 #include <linux/regulator/of_regulator.h>
16 * Registers description
18 #define REG_PWR_CR3 0x0C
20 #define USB_3_3_EN BIT(24)
21 #define USB_3_3_RDY BIT(26)
22 #define REG_1_8_EN BIT(28)
23 #define REG_1_8_RDY BIT(29)
24 #define REG_1_1_EN BIT(30)
25 #define REG_1_1_RDY BIT(31)
27 /* list of supported regulators */
35 static u32 ready_mask_table
[STM32PWR_REG_NUM_REGS
] = {
36 [PWR_REG11
] = REG_1_1_RDY
,
37 [PWR_REG18
] = REG_1_8_RDY
,
38 [PWR_USB33
] = USB_3_3_RDY
,
41 struct stm32_pwr_reg
{
46 static int stm32_pwr_reg_is_ready(struct regulator_dev
*rdev
)
48 struct stm32_pwr_reg
*priv
= rdev_get_drvdata(rdev
);
51 val
= readl_relaxed(priv
->base
+ REG_PWR_CR3
);
53 return (val
& priv
->ready_mask
);
56 static int stm32_pwr_reg_is_enabled(struct regulator_dev
*rdev
)
58 struct stm32_pwr_reg
*priv
= rdev_get_drvdata(rdev
);
61 val
= readl_relaxed(priv
->base
+ REG_PWR_CR3
);
63 return (val
& rdev
->desc
->enable_mask
);
66 static int stm32_pwr_reg_enable(struct regulator_dev
*rdev
)
68 struct stm32_pwr_reg
*priv
= rdev_get_drvdata(rdev
);
72 val
= readl_relaxed(priv
->base
+ REG_PWR_CR3
);
73 val
|= rdev
->desc
->enable_mask
;
74 writel_relaxed(val
, priv
->base
+ REG_PWR_CR3
);
76 /* use an arbitrary timeout of 20ms */
77 ret
= readx_poll_timeout(stm32_pwr_reg_is_ready
, rdev
, val
, val
,
80 dev_err(&rdev
->dev
, "regulator enable timed out!\n");
85 static int stm32_pwr_reg_disable(struct regulator_dev
*rdev
)
87 struct stm32_pwr_reg
*priv
= rdev_get_drvdata(rdev
);
91 val
= readl_relaxed(priv
->base
+ REG_PWR_CR3
);
92 val
&= ~rdev
->desc
->enable_mask
;
93 writel_relaxed(val
, priv
->base
+ REG_PWR_CR3
);
95 /* use an arbitrary timeout of 20ms */
96 ret
= readx_poll_timeout(stm32_pwr_reg_is_ready
, rdev
, val
, !val
,
99 dev_err(&rdev
->dev
, "regulator disable timed out!\n");
104 static const struct regulator_ops stm32_pwr_reg_ops
= {
105 .enable
= stm32_pwr_reg_enable
,
106 .disable
= stm32_pwr_reg_disable
,
107 .is_enabled
= stm32_pwr_reg_is_enabled
,
110 #define PWR_REG(_id, _name, _volt, _en, _supply) \
114 .of_match = of_match_ptr(_name), \
116 .type = REGULATOR_VOLTAGE, \
118 .ops = &stm32_pwr_reg_ops, \
119 .enable_mask = _en, \
120 .owner = THIS_MODULE, \
121 .supply_name = _supply, \
124 static const struct regulator_desc stm32_pwr_desc[] = {
125 PWR_REG(PWR_REG11
, "reg11", 1100000, REG_1_1_EN
, "vdd"),
126 PWR_REG(PWR_REG18
, "reg18", 1800000, REG_1_8_EN
, "vdd"),
127 PWR_REG(PWR_USB33
, "usb33", 3300000, USB_3_3_EN
, "vdd_3v3_usbfs"),
130 static int stm32_pwr_regulator_probe(struct platform_device
*pdev
)
132 struct device_node
*np
= pdev
->dev
.of_node
;
133 struct stm32_pwr_reg
*priv
;
135 struct regulator_dev
*rdev
;
136 struct regulator_config config
= { };
139 base
= of_iomap(np
, 0);
141 dev_err(&pdev
->dev
, "Unable to map IO memory\n");
145 config
.dev
= &pdev
->dev
;
147 for (i
= 0; i
< STM32PWR_REG_NUM_REGS
; i
++) {
148 priv
= devm_kzalloc(&pdev
->dev
, sizeof(struct stm32_pwr_reg
),
153 priv
->ready_mask
= ready_mask_table
[i
];
154 config
.driver_data
= priv
;
156 rdev
= devm_regulator_register(&pdev
->dev
,
162 "Failed to register regulator: %d\n", ret
);
169 static const struct of_device_id stm32_pwr_of_match
[] = {
170 { .compatible
= "st,stm32mp1,pwr-reg", },
173 MODULE_DEVICE_TABLE(of
, stm32_pwr_of_match
);
175 static struct platform_driver stm32_pwr_driver
= {
176 .probe
= stm32_pwr_regulator_probe
,
178 .name
= "stm32-pwr-regulator",
179 .of_match_table
= of_match_ptr(stm32_pwr_of_match
),
182 module_platform_driver(stm32_pwr_driver
);
184 MODULE_DESCRIPTION("STM32MP1 PWR voltage regulator driver");
185 MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
186 MODULE_LICENSE("GPL v2");