1 // SPDX-License-Identifier: GPL-2.0+
3 * Freescale FlexTimer Module (FTM) alarm device driver.
5 * Copyright 2014 Freescale Semiconductor, Inc.
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/interrupt.h>
14 #include <linux/of_address.h>
15 #include <linux/of_irq.h>
16 #include <linux/platform_device.h>
18 #include <linux/of_device.h>
19 #include <linux/module.h>
20 #include <linux/fsl/ftm.h>
21 #include <linux/rtc.h>
22 #include <linux/time.h>
23 #include <linux/acpi.h>
25 #define FTM_SC_CLK(c) ((c) << FTM_SC_CLK_MASK_SHIFT)
28 * Select Fixed frequency clock (32KHz) as clock source
31 #define FTM_SC_CLKS_FIXED_FREQ 0x02
32 #define FIXED_FREQ_CLK 32000
34 /* Select 128 (2^7) as divider factor */
35 #define MAX_FREQ_DIV (1 << FTM_SC_PS_MASK)
37 /* Maximum counter value in FlexTimer's CNT registers */
38 #define MAX_COUNT_VAL 0xffff
41 struct rtc_device
*rtc_dev
;
47 static inline u32
rtc_readl(struct ftm_rtc
*dev
, u32 reg
)
50 return ioread32be(dev
->base
+ reg
);
52 return ioread32(dev
->base
+ reg
);
55 static inline void rtc_writel(struct ftm_rtc
*dev
, u32 reg
, u32 val
)
58 iowrite32be(val
, dev
->base
+ reg
);
60 iowrite32(val
, dev
->base
+ reg
);
63 static inline void ftm_counter_enable(struct ftm_rtc
*rtc
)
67 /* select and enable counter clock source */
68 val
= rtc_readl(rtc
, FTM_SC
);
69 val
&= ~(FTM_SC_PS_MASK
| FTM_SC_CLK_MASK
);
70 val
|= (FTM_SC_PS_MASK
| FTM_SC_CLK(FTM_SC_CLKS_FIXED_FREQ
));
71 rtc_writel(rtc
, FTM_SC
, val
);
74 static inline void ftm_counter_disable(struct ftm_rtc
*rtc
)
78 /* disable counter clock source */
79 val
= rtc_readl(rtc
, FTM_SC
);
80 val
&= ~(FTM_SC_PS_MASK
| FTM_SC_CLK_MASK
);
81 rtc_writel(rtc
, FTM_SC
, val
);
84 static inline void ftm_irq_acknowledge(struct ftm_rtc
*rtc
)
86 unsigned int timeout
= 100;
89 *Fix errata A-007728 for flextimer
90 * If the FTM counter reaches the FTM_MOD value between
91 * the reading of the TOF bit and the writing of 0 to
92 * the TOF bit, the process of clearing the TOF bit
93 * does not work as expected when FTMx_CONF[NUMTOF] != 0
94 * and the current TOF count is less than FTMx_CONF[NUMTOF].
95 * If the above condition is met, the TOF bit remains set.
96 * If the TOF interrupt is enabled (FTMx_SC[TOIE] = 1),the
97 * TOF interrupt also remains asserted.
99 * Above is the errata discription
101 * In one word: software clearing TOF bit not works when
102 * FTMx_CONF[NUMTOF] was seted as nonzero and FTM counter
103 * reaches the FTM_MOD value.
105 * The workaround is clearing TOF bit until it works
106 * (FTM counter doesn't always reache the FTM_MOD anyway),
107 * which may cost some cycles.
109 while ((FTM_SC_TOF
& rtc_readl(rtc
, FTM_SC
)) && timeout
--)
110 rtc_writel(rtc
, FTM_SC
, rtc_readl(rtc
, FTM_SC
) & (~FTM_SC_TOF
));
113 static inline void ftm_irq_enable(struct ftm_rtc
*rtc
)
117 val
= rtc_readl(rtc
, FTM_SC
);
119 rtc_writel(rtc
, FTM_SC
, val
);
122 static inline void ftm_irq_disable(struct ftm_rtc
*rtc
)
126 val
= rtc_readl(rtc
, FTM_SC
);
128 rtc_writel(rtc
, FTM_SC
, val
);
131 static inline void ftm_reset_counter(struct ftm_rtc
*rtc
)
134 * The CNT register contains the FTM counter value.
135 * Reset clears the CNT register. Writing any value to COUNT
136 * updates the counter with its initial value, CNTIN.
138 rtc_writel(rtc
, FTM_CNT
, 0x00);
141 static void ftm_clean_alarm(struct ftm_rtc
*rtc
)
143 ftm_counter_disable(rtc
);
145 rtc_writel(rtc
, FTM_CNTIN
, 0x00);
146 rtc_writel(rtc
, FTM_MOD
, ~0U);
148 ftm_reset_counter(rtc
);
151 static irqreturn_t
ftm_rtc_alarm_interrupt(int irq
, void *dev
)
153 struct ftm_rtc
*rtc
= dev
;
155 rtc_update_irq(rtc
->rtc_dev
, 1, RTC_IRQF
| RTC_AF
);
157 ftm_irq_acknowledge(rtc
);
158 ftm_irq_disable(rtc
);
159 ftm_clean_alarm(rtc
);
164 static int ftm_rtc_alarm_irq_enable(struct device
*dev
,
165 unsigned int enabled
)
167 struct ftm_rtc
*rtc
= dev_get_drvdata(dev
);
172 ftm_irq_disable(rtc
);
179 * The function is not really getting time from the RTC
180 * since FlexTimer is not a RTC device, but we need to
181 * get time to setup alarm, so we are using system time
184 static int ftm_rtc_read_time(struct device
*dev
, struct rtc_time
*tm
)
186 rtc_time64_to_tm(ktime_get_real_seconds(), tm
);
191 static int ftm_rtc_read_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
197 * 1. Select fixed frequency clock (32KHz) as clock source;
198 * 2. Select 128 (2^7) as divider factor;
199 * So clock is 250 Hz (32KHz/128).
201 * 3. FlexTimer's CNT register is a 32bit register,
202 * but the register's 16 bit as counter value,it's other 16 bit
203 * is reserved.So minimum counter value is 0x0,maximum counter
205 * So max alarm value is 262 (65536 / 250) seconds
207 static int ftm_rtc_set_alarm(struct device
*dev
, struct rtc_wkalrm
*alm
)
210 unsigned long long cycle
;
211 struct ftm_rtc
*rtc
= dev_get_drvdata(dev
);
213 alm_time
= rtc_tm_to_time64(&alm
->time
);
215 ftm_clean_alarm(rtc
);
216 cycle
= (alm_time
- ktime_get_real_seconds()) * rtc
->alarm_freq
;
217 if (cycle
> MAX_COUNT_VAL
) {
218 pr_err("Out of alarm range {0~262} seconds.\n");
222 ftm_irq_disable(rtc
);
225 * The counter increments until the value of MOD is reached,
226 * at which point the counter is reloaded with the value of CNTIN.
227 * The TOF (the overflow flag) bit is set when the FTM counter
228 * changes from MOD to CNTIN. So we should using the cycle - 1.
230 rtc_writel(rtc
, FTM_MOD
, cycle
- 1);
232 ftm_counter_enable(rtc
);
239 static const struct rtc_class_ops ftm_rtc_ops
= {
240 .read_time
= ftm_rtc_read_time
,
241 .read_alarm
= ftm_rtc_read_alarm
,
242 .set_alarm
= ftm_rtc_set_alarm
,
243 .alarm_irq_enable
= ftm_rtc_alarm_irq_enable
,
246 static int ftm_rtc_probe(struct platform_device
*pdev
)
252 rtc
= devm_kzalloc(&pdev
->dev
, sizeof(*rtc
), GFP_KERNEL
);
253 if (unlikely(!rtc
)) {
254 dev_err(&pdev
->dev
, "cannot alloc memory for rtc\n");
258 platform_set_drvdata(pdev
, rtc
);
260 rtc
->rtc_dev
= devm_rtc_allocate_device(&pdev
->dev
);
261 if (IS_ERR(rtc
->rtc_dev
))
262 return PTR_ERR(rtc
->rtc_dev
);
264 rtc
->base
= devm_platform_ioremap_resource(pdev
, 0);
265 if (IS_ERR(rtc
->base
)) {
266 dev_err(&pdev
->dev
, "cannot ioremap resource for rtc\n");
267 return PTR_ERR(rtc
->base
);
270 irq
= platform_get_irq(pdev
, 0);
272 dev_err(&pdev
->dev
, "can't get irq number\n");
276 ret
= devm_request_irq(&pdev
->dev
, irq
, ftm_rtc_alarm_interrupt
,
277 IRQF_NO_SUSPEND
, dev_name(&pdev
->dev
), rtc
);
279 dev_err(&pdev
->dev
, "failed to request irq\n");
284 device_property_read_bool(&pdev
->dev
, "big-endian");
286 rtc
->alarm_freq
= (u32
)FIXED_FREQ_CLK
/ (u32
)MAX_FREQ_DIV
;
287 rtc
->rtc_dev
->ops
= &ftm_rtc_ops
;
289 device_init_wakeup(&pdev
->dev
, true);
291 ret
= rtc_register_device(rtc
->rtc_dev
);
293 dev_err(&pdev
->dev
, "can't register rtc device\n");
300 static const struct of_device_id ftm_rtc_match
[] = {
301 { .compatible
= "fsl,ls1012a-ftm-alarm", },
302 { .compatible
= "fsl,ls1021a-ftm-alarm", },
303 { .compatible
= "fsl,ls1028a-ftm-alarm", },
304 { .compatible
= "fsl,ls1043a-ftm-alarm", },
305 { .compatible
= "fsl,ls1046a-ftm-alarm", },
306 { .compatible
= "fsl,ls1088a-ftm-alarm", },
307 { .compatible
= "fsl,ls208xa-ftm-alarm", },
308 { .compatible
= "fsl,lx2160a-ftm-alarm", },
312 static const struct acpi_device_id ftm_imx_acpi_ids
[] = {
316 MODULE_DEVICE_TABLE(acpi
, ftm_imx_acpi_ids
);
318 static struct platform_driver ftm_rtc_driver
= {
319 .probe
= ftm_rtc_probe
,
322 .of_match_table
= ftm_rtc_match
,
323 .acpi_match_table
= ACPI_PTR(ftm_imx_acpi_ids
),
327 static int __init
ftm_alarm_init(void)
329 return platform_driver_register(&ftm_rtc_driver
);
332 device_initcall(ftm_alarm_init
);
334 MODULE_DESCRIPTION("NXP/Freescale FlexTimer alarm driver");
335 MODULE_AUTHOR("Biwen Li <biwen.li@nxp.com>");
336 MODULE_LICENSE("GPL");