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gpio: rcar: Fix runtime PM imbalance on error
[linux/fpc-iii.git] / drivers / scsi / qla2xxx / qla_isr.c
blob8d7a905f624713bf576f9b31f67c91c4b7cd341b
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_target.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/cpu.h>
13 #include <linux/t10-pi.h>
14 #include <scsi/scsi_tcq.h>
15 #include <scsi/scsi_bsg_fc.h>
16 #include <scsi/scsi_eh.h>
17 #include <scsi/fc/fc_fs.h>
18 #include <linux/nvme-fc-driver.h>
19
20 static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
21 static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
22 static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
23 static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
24 sts_entry_t *);
25
26 const char *const port_state_str[] = {
27 "Unknown",
28 "UNCONFIGURED",
29 "DEAD",
30 "LOST",
31 "ONLINE"
32 };
33
34 static void qla24xx_purex_iocb(scsi_qla_host_t *vha, void *pkt,
35 void (*process_item)(struct scsi_qla_host *vha, void *pkt))
36 {
37 struct purex_list *list = &vha->purex_list;
38 struct purex_item *item;
39 ulong flags;
40
41 item = kzalloc(sizeof(*item), GFP_KERNEL);
42 if (!item) {
43 ql_log(ql_log_warn, vha, 0x5092,
44 ">> Failed allocate purex list item.\n");
45 return;
46 }
47
48 item->vha = vha;
49 item->process_item = process_item;
50 memcpy(&item->iocb, pkt, sizeof(item->iocb));
51
52 spin_lock_irqsave(&list->lock, flags);
53 list_add_tail(&item->list, &list->head);
54 spin_unlock_irqrestore(&list->lock, flags);
55
56 set_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags);
57 }
58
59 static void
60 qla24xx_process_abts(struct scsi_qla_host *vha, void *pkt)
61 {
62 struct abts_entry_24xx *abts = pkt;
63 struct qla_hw_data *ha = vha->hw;
64 struct els_entry_24xx *rsp_els;
65 struct abts_entry_24xx *abts_rsp;
66 dma_addr_t dma;
67 uint32_t fctl;
68 int rval;
69
70 ql_dbg(ql_dbg_init, vha, 0x0286, "%s: entered.\n", __func__);
71
72 ql_log(ql_log_warn, vha, 0x0287,
73 "Processing ABTS xchg=%#x oxid=%#x rxid=%#x seqid=%#x seqcnt=%#x\n",
74 abts->rx_xch_addr_to_abort, abts->ox_id, abts->rx_id,
75 abts->seq_id, abts->seq_cnt);
76 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
77 "-------- ABTS RCV -------\n");
78 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
79 (uint8_t *)abts, sizeof(*abts));
80
81 rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els), &dma,
82 GFP_KERNEL);
83 if (!rsp_els) {
84 ql_log(ql_log_warn, vha, 0x0287,
85 "Failed allocate dma buffer ABTS/ELS RSP.\n");
86 return;
87 }
88
89 /* terminate exchange */
90 memset(rsp_els, 0, sizeof(*rsp_els));
91 rsp_els->entry_type = ELS_IOCB_TYPE;
92 rsp_els->entry_count = 1;
93 rsp_els->nport_handle = ~0;
94 rsp_els->rx_xchg_address = abts->rx_xch_addr_to_abort;
95 rsp_els->control_flags = EPD_RX_XCHG;
96 ql_dbg(ql_dbg_init, vha, 0x0283,
97 "Sending ELS Response to terminate exchange %#x...\n",
98 abts->rx_xch_addr_to_abort);
99 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
100 "-------- ELS RSP -------\n");
101 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
102 (uint8_t *)rsp_els, sizeof(*rsp_els));
103 rval = qla2x00_issue_iocb(vha, rsp_els, dma, 0);
104 if (rval) {
105 ql_log(ql_log_warn, vha, 0x0288,
106 "%s: iocb failed to execute -> %x\n", __func__, rval);
107 } else if (rsp_els->comp_status) {
108 ql_log(ql_log_warn, vha, 0x0289,
109 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
110 __func__, rsp_els->comp_status,
111 rsp_els->error_subcode_1, rsp_els->error_subcode_2);
112 } else {
113 ql_dbg(ql_dbg_init, vha, 0x028a,
114 "%s: abort exchange done.\n", __func__);
115 }
116
117 /* send ABTS response */
118 abts_rsp = (void *)rsp_els;
119 memset(abts_rsp, 0, sizeof(*abts_rsp));
120 abts_rsp->entry_type = ABTS_RSP_TYPE;
121 abts_rsp->entry_count = 1;
122 abts_rsp->nport_handle = abts->nport_handle;
123 abts_rsp->vp_idx = abts->vp_idx;
124 abts_rsp->sof_type = abts->sof_type & 0xf0;
125 abts_rsp->rx_xch_addr = abts->rx_xch_addr;
126 abts_rsp->d_id[0] = abts->s_id[0];
127 abts_rsp->d_id[1] = abts->s_id[1];
128 abts_rsp->d_id[2] = abts->s_id[2];
129 abts_rsp->r_ctl = FC_ROUTING_BLD | FC_R_CTL_BLD_BA_ACC;
130 abts_rsp->s_id[0] = abts->d_id[0];
131 abts_rsp->s_id[1] = abts->d_id[1];
132 abts_rsp->s_id[2] = abts->d_id[2];
133 abts_rsp->cs_ctl = abts->cs_ctl;
134 /* include flipping bit23 in fctl */
135 fctl = ~(abts->f_ctl[2] | 0x7F) << 16 |
136 FC_F_CTL_LAST_SEQ | FC_F_CTL_END_SEQ | FC_F_CTL_SEQ_INIT;
137 abts_rsp->f_ctl[0] = fctl >> 0 & 0xff;
138 abts_rsp->f_ctl[1] = fctl >> 8 & 0xff;
139 abts_rsp->f_ctl[2] = fctl >> 16 & 0xff;
140 abts_rsp->type = FC_TYPE_BLD;
141 abts_rsp->rx_id = abts->rx_id;
142 abts_rsp->ox_id = abts->ox_id;
143 abts_rsp->payload.ba_acc.aborted_rx_id = abts->rx_id;
144 abts_rsp->payload.ba_acc.aborted_ox_id = abts->ox_id;
145 abts_rsp->payload.ba_acc.high_seq_cnt = ~0;
146 abts_rsp->rx_xch_addr_to_abort = abts->rx_xch_addr_to_abort;
147 ql_dbg(ql_dbg_init, vha, 0x028b,
148 "Sending BA ACC response to ABTS %#x...\n",
149 abts->rx_xch_addr_to_abort);
150 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
151 "-------- ELS RSP -------\n");
152 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
153 (uint8_t *)abts_rsp, sizeof(*abts_rsp));
154 rval = qla2x00_issue_iocb(vha, abts_rsp, dma, 0);
155 if (rval) {
156 ql_log(ql_log_warn, vha, 0x028c,
157 "%s: iocb failed to execute -> %x\n", __func__, rval);
158 } else if (abts_rsp->comp_status) {
159 ql_log(ql_log_warn, vha, 0x028d,
160 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
161 __func__, abts_rsp->comp_status,
162 abts_rsp->payload.error.subcode1,
163 abts_rsp->payload.error.subcode2);
164 } else {
165 ql_dbg(ql_dbg_init, vha, 0x028ea,
166 "%s: done.\n", __func__);
167 }
168
169 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els), rsp_els, dma);
170 }
171
172 /**
173 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
174 * @irq: interrupt number
175 * @dev_id: SCSI driver HA context
176 *
177 * Called by system whenever the host adapter generates an interrupt.
178 *
179 * Returns handled flag.
180 */
181 irqreturn_t
182 qla2100_intr_handler(int irq, void *dev_id)
183 {
184 scsi_qla_host_t *vha;
185 struct qla_hw_data *ha;
186 struct device_reg_2xxx __iomem *reg;
187 int status;
188 unsigned long iter;
189 uint16_t hccr;
190 uint16_t mb[8];
191 struct rsp_que *rsp;
192 unsigned long flags;
193
194 rsp = (struct rsp_que *) dev_id;
195 if (!rsp) {
196 ql_log(ql_log_info, NULL, 0x505d,
197 "%s: NULL response queue pointer.\n", __func__);
198 return (IRQ_NONE);
199 }
200
201 ha = rsp->hw;
202 reg = &ha->iobase->isp;
203 status = 0;
204
205 spin_lock_irqsave(&ha->hardware_lock, flags);
206 vha = pci_get_drvdata(ha->pdev);
207 for (iter = 50; iter--; ) {
208 hccr = RD_REG_WORD(&reg->hccr);
209 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
210 break;
211 if (hccr & HCCR_RISC_PAUSE) {
212 if (pci_channel_offline(ha->pdev))
213 break;
214
215 /*
216 * Issue a "HARD" reset in order for the RISC interrupt
217 * bit to be cleared. Schedule a big hammer to get
218 * out of the RISC PAUSED state.
219 */
220 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
221 RD_REG_WORD(&reg->hccr);
222
223 ha->isp_ops->fw_dump(vha, 1);
224 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
225 break;
226 } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
227 break;
228
229 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
230 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
231 RD_REG_WORD(&reg->hccr);
232
233 /* Get mailbox data. */
234 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
235 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
236 qla2x00_mbx_completion(vha, mb[0]);
237 status |= MBX_INTERRUPT;
238 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
239 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
240 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
241 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
242 qla2x00_async_event(vha, rsp, mb);
243 } else {
244 /*EMPTY*/
245 ql_dbg(ql_dbg_async, vha, 0x5025,
246 "Unrecognized interrupt type (%d).\n",
247 mb[0]);
248 }
249 /* Release mailbox registers. */
250 WRT_REG_WORD(&reg->semaphore, 0);
251 RD_REG_WORD(&reg->semaphore);
252 } else {
253 qla2x00_process_response_queue(rsp);
254
255 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
256 RD_REG_WORD(&reg->hccr);
257 }
258 }
259 qla2x00_handle_mbx_completion(ha, status);
260 spin_unlock_irqrestore(&ha->hardware_lock, flags);
261
262 return (IRQ_HANDLED);
263 }
264
265 bool
266 qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
267 {
268 /* Check for PCI disconnection */
269 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
270 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
271 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
272 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
273 /*
274 * Schedule this (only once) on the default system
275 * workqueue so that all the adapter workqueues and the
276 * DPC thread can be shutdown cleanly.
277 */
278 schedule_work(&vha->hw->board_disable);
279 }
280 return true;
281 } else
282 return false;
283 }
284
285 bool
286 qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
287 {
288 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
289 }
290
291 /**
292 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
293 * @irq: interrupt number
294 * @dev_id: SCSI driver HA context
295 *
296 * Called by system whenever the host adapter generates an interrupt.
297 *
298 * Returns handled flag.
299 */
300 irqreturn_t
301 qla2300_intr_handler(int irq, void *dev_id)
302 {
303 scsi_qla_host_t *vha;
304 struct device_reg_2xxx __iomem *reg;
305 int status;
306 unsigned long iter;
307 uint32_t stat;
308 uint16_t hccr;
309 uint16_t mb[8];
310 struct rsp_que *rsp;
311 struct qla_hw_data *ha;
312 unsigned long flags;
313
314 rsp = (struct rsp_que *) dev_id;
315 if (!rsp) {
316 ql_log(ql_log_info, NULL, 0x5058,
317 "%s: NULL response queue pointer.\n", __func__);
318 return (IRQ_NONE);
319 }
320
321 ha = rsp->hw;
322 reg = &ha->iobase->isp;
323 status = 0;
324
325 spin_lock_irqsave(&ha->hardware_lock, flags);
326 vha = pci_get_drvdata(ha->pdev);
327 for (iter = 50; iter--; ) {
328 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
329 if (qla2x00_check_reg32_for_disconnect(vha, stat))
330 break;
331 if (stat & HSR_RISC_PAUSED) {
332 if (unlikely(pci_channel_offline(ha->pdev)))
333 break;
334
335 hccr = RD_REG_WORD(&reg->hccr);
336
337 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
338 ql_log(ql_log_warn, vha, 0x5026,
339 "Parity error -- HCCR=%x, Dumping "
340 "firmware.\n", hccr);
341 else
342 ql_log(ql_log_warn, vha, 0x5027,
343 "RISC paused -- HCCR=%x, Dumping "
344 "firmware.\n", hccr);
345
346 /*
347 * Issue a "HARD" reset in order for the RISC
348 * interrupt bit to be cleared. Schedule a big
349 * hammer to get out of the RISC PAUSED state.
350 */
351 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
352 RD_REG_WORD(&reg->hccr);
353
354 ha->isp_ops->fw_dump(vha, 1);
355 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
356 break;
357 } else if ((stat & HSR_RISC_INT) == 0)
358 break;
359
360 switch (stat & 0xff) {
361 case 0x1:
362 case 0x2:
363 case 0x10:
364 case 0x11:
365 qla2x00_mbx_completion(vha, MSW(stat));
366 status |= MBX_INTERRUPT;
367
368 /* Release mailbox registers. */
369 WRT_REG_WORD(&reg->semaphore, 0);
370 break;
371 case 0x12:
372 mb[0] = MSW(stat);
373 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
374 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
375 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
376 qla2x00_async_event(vha, rsp, mb);
377 break;
378 case 0x13:
379 qla2x00_process_response_queue(rsp);
380 break;
381 case 0x15:
382 mb[0] = MBA_CMPLT_1_16BIT;
383 mb[1] = MSW(stat);
384 qla2x00_async_event(vha, rsp, mb);
385 break;
386 case 0x16:
387 mb[0] = MBA_SCSI_COMPLETION;
388 mb[1] = MSW(stat);
389 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
390 qla2x00_async_event(vha, rsp, mb);
391 break;
392 default:
393 ql_dbg(ql_dbg_async, vha, 0x5028,
394 "Unrecognized interrupt type (%d).\n", stat & 0xff);
395 break;
396 }
397 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
398 RD_REG_WORD_RELAXED(&reg->hccr);
399 }
400 qla2x00_handle_mbx_completion(ha, status);
401 spin_unlock_irqrestore(&ha->hardware_lock, flags);
402
403 return (IRQ_HANDLED);
404 }
405
406 /**
407 * qla2x00_mbx_completion() - Process mailbox command completions.
408 * @vha: SCSI driver HA context
409 * @mb0: Mailbox0 register
410 */
411 static void
412 qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
413 {
414 uint16_t cnt;
415 uint32_t mboxes;
416 uint16_t __iomem *wptr;
417 struct qla_hw_data *ha = vha->hw;
418 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
419
420 /* Read all mbox registers? */
421 WARN_ON_ONCE(ha->mbx_count > 32);
422 mboxes = (1ULL << ha->mbx_count) - 1;
423 if (!ha->mcp)
424 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
425 else
426 mboxes = ha->mcp->in_mb;
427
428 /* Load return mailbox registers. */
429 ha->flags.mbox_int = 1;
430 ha->mailbox_out[0] = mb0;
431 mboxes >>= 1;
432 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
433
434 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
435 if (IS_QLA2200(ha) && cnt == 8)
436 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
437 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
438 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
439 else if (mboxes & BIT_0)
440 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
441
442 wptr++;
443 mboxes >>= 1;
444 }
445 }
446
447 static void
448 qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
449 {
450 static char *event[] =
451 { "Complete", "Request Notification", "Time Extension" };
452 int rval;
453 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
454 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
455 uint16_t __iomem *wptr;
456 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
457
458 /* Seed data -- mailbox1 -> mailbox7. */
459 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
460 wptr = (uint16_t __iomem *)&reg24->mailbox1;
461 else if (IS_QLA8044(vha->hw))
462 wptr = (uint16_t __iomem *)&reg82->mailbox_out[1];
463 else
464 return;
465
466 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
467 mb[cnt] = RD_REG_WORD(wptr);
468
469 ql_dbg(ql_dbg_async, vha, 0x5021,
470 "Inter-Driver Communication %s -- "
471 "%04x %04x %04x %04x %04x %04x %04x.\n",
472 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
473 mb[4], mb[5], mb[6]);
474 switch (aen) {
475 /* Handle IDC Error completion case. */
476 case MBA_IDC_COMPLETE:
477 if (mb[1] >> 15) {
478 vha->hw->flags.idc_compl_status = 1;
479 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
480 complete(&vha->hw->dcbx_comp);
481 }
482 break;
483
484 case MBA_IDC_NOTIFY:
485 /* Acknowledgement needed? [Notify && non-zero timeout]. */
486 timeout = (descr >> 8) & 0xf;
487 ql_dbg(ql_dbg_async, vha, 0x5022,
488 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
489 vha->host_no, event[aen & 0xff], timeout);
490
491 if (!timeout)
492 return;
493 rval = qla2x00_post_idc_ack_work(vha, mb);
494 if (rval != QLA_SUCCESS)
495 ql_log(ql_log_warn, vha, 0x5023,
496 "IDC failed to post ACK.\n");
497 break;
498 case MBA_IDC_TIME_EXT:
499 vha->hw->idc_extend_tmo = descr;
500 ql_dbg(ql_dbg_async, vha, 0x5087,
501 "%lu Inter-Driver Communication %s -- "
502 "Extend timeout by=%d.\n",
503 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
504 break;
505 }
506 }
507
508 #define LS_UNKNOWN 2
509 const char *
510 qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
511 {
512 static const char *const link_speeds[] = {
513 "1", "2", "?", "4", "8", "16", "32", "10"
514 };
515 #define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1)
516
517 if (IS_QLA2100(ha) || IS_QLA2200(ha))
518 return link_speeds[0];
519 else if (speed == 0x13)
520 return link_speeds[QLA_LAST_SPEED];
521 else if (speed < QLA_LAST_SPEED)
522 return link_speeds[speed];
523 else
524 return link_speeds[LS_UNKNOWN];
525 }
526
527 static void
528 qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
529 {
530 struct qla_hw_data *ha = vha->hw;
531
532 /*
533 * 8200 AEN Interpretation:
534 * mb[0] = AEN code
535 * mb[1] = AEN Reason code
536 * mb[2] = LSW of Peg-Halt Status-1 Register
537 * mb[6] = MSW of Peg-Halt Status-1 Register
538 * mb[3] = LSW of Peg-Halt Status-2 register
539 * mb[7] = MSW of Peg-Halt Status-2 register
540 * mb[4] = IDC Device-State Register value
541 * mb[5] = IDC Driver-Presence Register value
542 */
543 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
544 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
545 mb[0], mb[1], mb[2], mb[6]);
546 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
547 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
548 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
549
550 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
551 IDC_HEARTBEAT_FAILURE)) {
552 ha->flags.nic_core_hung = 1;
553 ql_log(ql_log_warn, vha, 0x5060,
554 "83XX: F/W Error Reported: Check if reset required.\n");
555
556 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
557 uint32_t protocol_engine_id, fw_err_code, err_level;
558
559 /*
560 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
561 * - PEG-Halt Status-1 Register:
562 * (LSW = mb[2], MSW = mb[6])
563 * Bits 0-7 = protocol-engine ID
564 * Bits 8-28 = f/w error code
565 * Bits 29-31 = Error-level
566 * Error-level 0x1 = Non-Fatal error
567 * Error-level 0x2 = Recoverable Fatal error
568 * Error-level 0x4 = UnRecoverable Fatal error
569 * - PEG-Halt Status-2 Register:
570 * (LSW = mb[3], MSW = mb[7])
571 */
572 protocol_engine_id = (mb[2] & 0xff);
573 fw_err_code = (((mb[2] & 0xff00) >> 8) |
574 ((mb[6] & 0x1fff) << 8));
575 err_level = ((mb[6] & 0xe000) >> 13);
576 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
577 "Register: protocol_engine_id=0x%x "
578 "fw_err_code=0x%x err_level=0x%x.\n",
579 protocol_engine_id, fw_err_code, err_level);
580 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
581 "Register: 0x%x%x.\n", mb[7], mb[3]);
582 if (err_level == ERR_LEVEL_NON_FATAL) {
583 ql_log(ql_log_warn, vha, 0x5063,
584 "Not a fatal error, f/w has recovered itself.\n");
585 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
586 ql_log(ql_log_fatal, vha, 0x5064,
587 "Recoverable Fatal error: Chip reset "
588 "required.\n");
589 qla83xx_schedule_work(vha,
590 QLA83XX_NIC_CORE_RESET);
591 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
592 ql_log(ql_log_fatal, vha, 0x5065,
593 "Unrecoverable Fatal error: Set FAILED "
594 "state, reboot required.\n");
595 qla83xx_schedule_work(vha,
596 QLA83XX_NIC_CORE_UNRECOVERABLE);
597 }
598 }
599
600 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
601 uint16_t peg_fw_state, nw_interface_link_up;
602 uint16_t nw_interface_signal_detect, sfp_status;
603 uint16_t htbt_counter, htbt_monitor_enable;
604 uint16_t sfp_additional_info, sfp_multirate;
605 uint16_t sfp_tx_fault, link_speed, dcbx_status;
606
607 /*
608 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
609 * - PEG-to-FC Status Register:
610 * (LSW = mb[2], MSW = mb[6])
611 * Bits 0-7 = Peg-Firmware state
612 * Bit 8 = N/W Interface Link-up
613 * Bit 9 = N/W Interface signal detected
614 * Bits 10-11 = SFP Status
615 * SFP Status 0x0 = SFP+ transceiver not expected
616 * SFP Status 0x1 = SFP+ transceiver not present
617 * SFP Status 0x2 = SFP+ transceiver invalid
618 * SFP Status 0x3 = SFP+ transceiver present and
619 * valid
620 * Bits 12-14 = Heartbeat Counter
621 * Bit 15 = Heartbeat Monitor Enable
622 * Bits 16-17 = SFP Additional Info
623 * SFP info 0x0 = Unregocnized transceiver for
624 * Ethernet
625 * SFP info 0x1 = SFP+ brand validation failed
626 * SFP info 0x2 = SFP+ speed validation failed
627 * SFP info 0x3 = SFP+ access error
628 * Bit 18 = SFP Multirate
629 * Bit 19 = SFP Tx Fault
630 * Bits 20-22 = Link Speed
631 * Bits 23-27 = Reserved
632 * Bits 28-30 = DCBX Status
633 * DCBX Status 0x0 = DCBX Disabled
634 * DCBX Status 0x1 = DCBX Enabled
635 * DCBX Status 0x2 = DCBX Exchange error
636 * Bit 31 = Reserved
637 */
638 peg_fw_state = (mb[2] & 0x00ff);
639 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
640 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
641 sfp_status = ((mb[2] & 0x0c00) >> 10);
642 htbt_counter = ((mb[2] & 0x7000) >> 12);
643 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
644 sfp_additional_info = (mb[6] & 0x0003);
645 sfp_multirate = ((mb[6] & 0x0004) >> 2);
646 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
647 link_speed = ((mb[6] & 0x0070) >> 4);
648 dcbx_status = ((mb[6] & 0x7000) >> 12);
649
650 ql_log(ql_log_warn, vha, 0x5066,
651 "Peg-to-Fc Status Register:\n"
652 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
653 "nw_interface_signal_detect=0x%x"
654 "\nsfp_statis=0x%x.\n ", peg_fw_state,
655 nw_interface_link_up, nw_interface_signal_detect,
656 sfp_status);
657 ql_log(ql_log_warn, vha, 0x5067,
658 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
659 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
660 htbt_counter, htbt_monitor_enable,
661 sfp_additional_info, sfp_multirate);
662 ql_log(ql_log_warn, vha, 0x5068,
663 "sfp_tx_fault=0x%x, link_state=0x%x, "
664 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
665 dcbx_status);
666
667 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
668 }
669
670 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
671 ql_log(ql_log_warn, vha, 0x5069,
672 "Heartbeat Failure encountered, chip reset "
673 "required.\n");
674
675 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
676 }
677 }
678
679 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
680 ql_log(ql_log_info, vha, 0x506a,
681 "IDC Device-State changed = 0x%x.\n", mb[4]);
682 if (ha->flags.nic_core_reset_owner)
683 return;
684 qla83xx_schedule_work(vha, MBA_IDC_AEN);
685 }
686 }
687
688 int
689 qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
690 {
691 struct qla_hw_data *ha = vha->hw;
692 scsi_qla_host_t *vp;
693 uint32_t vp_did;
694 unsigned long flags;
695 int ret = 0;
696
697 if (!ha->num_vhosts)
698 return ret;
699
700 spin_lock_irqsave(&ha->vport_slock, flags);
701 list_for_each_entry(vp, &ha->vp_list, list) {
702 vp_did = vp->d_id.b24;
703 if (vp_did == rscn_entry) {
704 ret = 1;
705 break;
706 }
707 }
708 spin_unlock_irqrestore(&ha->vport_slock, flags);
709
710 return ret;
711 }
712
713 fc_port_t *
714 qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
715 {
716 fc_port_t *f, *tf;
717
718 f = tf = NULL;
719 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
720 if (f->loop_id == loop_id)
721 return f;
722 return NULL;
723 }
724
725 fc_port_t *
726 qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
727 {
728 fc_port_t *f, *tf;
729
730 f = tf = NULL;
731 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
732 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
733 if (incl_deleted)
734 return f;
735 else if (f->deleted == 0)
736 return f;
737 }
738 }
739 return NULL;
740 }
741
742 fc_port_t *
743 qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
744 u8 incl_deleted)
745 {
746 fc_port_t *f, *tf;
747
748 f = tf = NULL;
749 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
750 if (f->d_id.b24 == id->b24) {
751 if (incl_deleted)
752 return f;
753 else if (f->deleted == 0)
754 return f;
755 }
756 }
757 return NULL;
758 }
759
760 /**
761 * qla2x00_async_event() - Process aynchronous events.
762 * @vha: SCSI driver HA context
763 * @rsp: response queue
764 * @mb: Mailbox registers (0 - 3)
765 */
766 void
767 qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
768 {
769 uint16_t handle_cnt;
770 uint16_t cnt, mbx;
771 uint32_t handles[5];
772 struct qla_hw_data *ha = vha->hw;
773 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
774 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
775 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
776 uint32_t rscn_entry, host_pid;
777 unsigned long flags;
778 fc_port_t *fcport = NULL;
779
780 if (!vha->hw->flags.fw_started)
781 return;
782
783 /* Setup to process RIO completion. */
784 handle_cnt = 0;
785 if (IS_CNA_CAPABLE(ha))
786 goto skip_rio;
787 switch (mb[0]) {
788 case MBA_SCSI_COMPLETION:
789 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
790 handle_cnt = 1;
791 break;
792 case MBA_CMPLT_1_16BIT:
793 handles[0] = mb[1];
794 handle_cnt = 1;
795 mb[0] = MBA_SCSI_COMPLETION;
796 break;
797 case MBA_CMPLT_2_16BIT:
798 handles[0] = mb[1];
799 handles[1] = mb[2];
800 handle_cnt = 2;
801 mb[0] = MBA_SCSI_COMPLETION;
802 break;
803 case MBA_CMPLT_3_16BIT:
804 handles[0] = mb[1];
805 handles[1] = mb[2];
806 handles[2] = mb[3];
807 handle_cnt = 3;
808 mb[0] = MBA_SCSI_COMPLETION;
809 break;
810 case MBA_CMPLT_4_16BIT:
811 handles[0] = mb[1];
812 handles[1] = mb[2];
813 handles[2] = mb[3];
814 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
815 handle_cnt = 4;
816 mb[0] = MBA_SCSI_COMPLETION;
817 break;
818 case MBA_CMPLT_5_16BIT:
819 handles[0] = mb[1];
820 handles[1] = mb[2];
821 handles[2] = mb[3];
822 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
823 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
824 handle_cnt = 5;
825 mb[0] = MBA_SCSI_COMPLETION;
826 break;
827 case MBA_CMPLT_2_32BIT:
828 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
829 handles[1] = le32_to_cpu(
830 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
831 RD_MAILBOX_REG(ha, reg, 6));
832 handle_cnt = 2;
833 mb[0] = MBA_SCSI_COMPLETION;
834 break;
835 default:
836 break;
837 }
838 skip_rio:
839 switch (mb[0]) {
840 case MBA_SCSI_COMPLETION: /* Fast Post */
841 if (!vha->flags.online)
842 break;
843
844 for (cnt = 0; cnt < handle_cnt; cnt++)
845 qla2x00_process_completed_request(vha, rsp->req,
846 handles[cnt]);
847 break;
848
849 case MBA_RESET: /* Reset */
850 ql_dbg(ql_dbg_async, vha, 0x5002,
851 "Asynchronous RESET.\n");
852
853 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
854 break;
855
856 case MBA_SYSTEM_ERR: /* System Error */
857 mbx = 0;
858 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
859 IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
860 u16 m[4];
861
862 m[0] = RD_REG_WORD(&reg24->mailbox4);
863 m[1] = RD_REG_WORD(&reg24->mailbox5);
864 m[2] = RD_REG_WORD(&reg24->mailbox6);
865 mbx = m[3] = RD_REG_WORD(&reg24->mailbox7);
866
867 ql_log(ql_log_warn, vha, 0x5003,
868 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh mbx4=%xh mbx5=%xh mbx6=%xh mbx7=%xh.\n",
869 mb[1], mb[2], mb[3], m[0], m[1], m[2], m[3]);
870 } else
871 ql_log(ql_log_warn, vha, 0x5003,
872 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh.\n ",
873 mb[1], mb[2], mb[3]);
874
875 ha->fw_dump_mpi =
876 (IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
877 RD_REG_WORD(&reg24->mailbox7) & BIT_8;
878 ha->isp_ops->fw_dump(vha, 1);
879 ha->flags.fw_init_done = 0;
880 QLA_FW_STOPPED(ha);
881
882 if (IS_FWI2_CAPABLE(ha)) {
883 if (mb[1] == 0 && mb[2] == 0) {
884 ql_log(ql_log_fatal, vha, 0x5004,
885 "Unrecoverable Hardware Error: adapter "
886 "marked OFFLINE!\n");
887 vha->flags.online = 0;
888 vha->device_flags |= DFLG_DEV_FAILED;
889 } else {
890 /* Check to see if MPI timeout occurred */
891 if ((mbx & MBX_3) && (ha->port_no == 0))
892 set_bit(MPI_RESET_NEEDED,
893 &vha->dpc_flags);
894
895 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
896 }
897 } else if (mb[1] == 0) {
898 ql_log(ql_log_fatal, vha, 0x5005,
899 "Unrecoverable Hardware Error: adapter marked "
900 "OFFLINE!\n");
901 vha->flags.online = 0;
902 vha->device_flags |= DFLG_DEV_FAILED;
903 } else
904 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
905 break;
906
907 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
908 ql_log(ql_log_warn, vha, 0x5006,
909 "ISP Request Transfer Error (%x).\n", mb[1]);
910
911 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
912 break;
913
914 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
915 ql_log(ql_log_warn, vha, 0x5007,
916 "ISP Response Transfer Error (%x).\n", mb[1]);
917
918 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
919 break;
920
921 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
922 ql_dbg(ql_dbg_async, vha, 0x5008,
923 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
924 break;
925
926 case MBA_LOOP_INIT_ERR:
927 ql_log(ql_log_warn, vha, 0x5090,
928 "LOOP INIT ERROR (%x).\n", mb[1]);
929 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
930 break;
931
932 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
933 ha->flags.lip_ae = 1;
934
935 ql_dbg(ql_dbg_async, vha, 0x5009,
936 "LIP occurred (%x).\n", mb[1]);
937
938 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
939 atomic_set(&vha->loop_state, LOOP_DOWN);
940 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
941 qla2x00_mark_all_devices_lost(vha);
942 }
943
944 if (vha->vp_idx) {
945 atomic_set(&vha->vp_state, VP_FAILED);
946 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
947 }
948
949 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
950 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
951
952 vha->flags.management_server_logged_in = 0;
953 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
954 break;
955
956 case MBA_LOOP_UP: /* Loop Up Event */
957 if (IS_QLA2100(ha) || IS_QLA2200(ha))
958 ha->link_data_rate = PORT_SPEED_1GB;
959 else
960 ha->link_data_rate = mb[1];
961
962 ql_log(ql_log_info, vha, 0x500a,
963 "LOOP UP detected (%s Gbps).\n",
964 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
965
966 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
967 if (mb[2] & BIT_0)
968 ql_log(ql_log_info, vha, 0x11a0,
969 "FEC=enabled (link up).\n");
970 }
971
972 vha->flags.management_server_logged_in = 0;
973 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
974
975 break;
976
977 case MBA_LOOP_DOWN: /* Loop Down Event */
978 SAVE_TOPO(ha);
979 ha->flags.lip_ae = 0;
980 ha->current_topology = 0;
981
982 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
983 ? RD_REG_WORD(&reg24->mailbox4) : 0;
984 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(&reg82->mailbox_out[4])
985 : mbx;
986 ql_log(ql_log_info, vha, 0x500b,
987 "LOOP DOWN detected (%x %x %x %x).\n",
988 mb[1], mb[2], mb[3], mbx);
989
990 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
991 atomic_set(&vha->loop_state, LOOP_DOWN);
992 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
993 /*
994 * In case of loop down, restore WWPN from
995 * NVRAM in case of FA-WWPN capable ISP
996 * Restore for Physical Port only
997 */
998 if (!vha->vp_idx) {
999 if (ha->flags.fawwpn_enabled &&
1000 (ha->current_topology == ISP_CFG_F)) {
1001 void *wwpn = ha->init_cb->port_name;
1002
1003 memcpy(vha->port_name, wwpn, WWN_SIZE);
1004 fc_host_port_name(vha->host) =
1005 wwn_to_u64(vha->port_name);
1006 ql_dbg(ql_dbg_init + ql_dbg_verbose,
1007 vha, 0x00d8, "LOOP DOWN detected,"
1008 "restore WWPN %016llx\n",
1009 wwn_to_u64(vha->port_name));
1010 }
1011
1012 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
1013 }
1014
1015 vha->device_flags |= DFLG_NO_CABLE;
1016 qla2x00_mark_all_devices_lost(vha);
1017 }
1018
1019 if (vha->vp_idx) {
1020 atomic_set(&vha->vp_state, VP_FAILED);
1021 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1022 }
1023
1024 vha->flags.management_server_logged_in = 0;
1025 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1026 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1027 break;
1028
1029 case MBA_LIP_RESET: /* LIP reset occurred */
1030 ql_dbg(ql_dbg_async, vha, 0x500c,
1031 "LIP reset occurred (%x).\n", mb[1]);
1032
1033 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1034 atomic_set(&vha->loop_state, LOOP_DOWN);
1035 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1036 qla2x00_mark_all_devices_lost(vha);
1037 }
1038
1039 if (vha->vp_idx) {
1040 atomic_set(&vha->vp_state, VP_FAILED);
1041 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1042 }
1043
1044 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1045
1046 ha->operating_mode = LOOP;
1047 vha->flags.management_server_logged_in = 0;
1048 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1049 break;
1050
1051 /* case MBA_DCBX_COMPLETE: */
1052 case MBA_POINT_TO_POINT: /* Point-to-Point */
1053 ha->flags.lip_ae = 0;
1054
1055 if (IS_QLA2100(ha))
1056 break;
1057
1058 if (IS_CNA_CAPABLE(ha)) {
1059 ql_dbg(ql_dbg_async, vha, 0x500d,
1060 "DCBX Completed -- %04x %04x %04x.\n",
1061 mb[1], mb[2], mb[3]);
1062 if (ha->notify_dcbx_comp && !vha->vp_idx)
1063 complete(&ha->dcbx_comp);
1064
1065 } else
1066 ql_dbg(ql_dbg_async, vha, 0x500e,
1067 "Asynchronous P2P MODE received.\n");
1068
1069 /*
1070 * Until there's a transition from loop down to loop up, treat
1071 * this as loop down only.
1072 */
1073 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1074 atomic_set(&vha->loop_state, LOOP_DOWN);
1075 if (!atomic_read(&vha->loop_down_timer))
1076 atomic_set(&vha->loop_down_timer,
1077 LOOP_DOWN_TIME);
1078 if (!N2N_TOPO(ha))
1079 qla2x00_mark_all_devices_lost(vha);
1080 }
1081
1082 if (vha->vp_idx) {
1083 atomic_set(&vha->vp_state, VP_FAILED);
1084 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1085 }
1086
1087 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
1088 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1089
1090 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
1091 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1092
1093 vha->flags.management_server_logged_in = 0;
1094 break;
1095
1096 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
1097 if (IS_QLA2100(ha))
1098 break;
1099
1100 ql_dbg(ql_dbg_async, vha, 0x500f,
1101 "Configuration change detected: value=%x.\n", mb[1]);
1102
1103 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1104 atomic_set(&vha->loop_state, LOOP_DOWN);
1105 if (!atomic_read(&vha->loop_down_timer))
1106 atomic_set(&vha->loop_down_timer,
1107 LOOP_DOWN_TIME);
1108 qla2x00_mark_all_devices_lost(vha);
1109 }
1110
1111 if (vha->vp_idx) {
1112 atomic_set(&vha->vp_state, VP_FAILED);
1113 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1114 }
1115
1116 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1117 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1118 break;
1119
1120 case MBA_PORT_UPDATE: /* Port database update */
1121 /*
1122 * Handle only global and vn-port update events
1123 *
1124 * Relevant inputs:
1125 * mb[1] = N_Port handle of changed port
1126 * OR 0xffff for global event
1127 * mb[2] = New login state
1128 * 7 = Port logged out
1129 * mb[3] = LSB is vp_idx, 0xff = all vps
1130 *
1131 * Skip processing if:
1132 * Event is global, vp_idx is NOT all vps,
1133 * vp_idx does not match
1134 * Event is not global, vp_idx does not match
1135 */
1136 if (IS_QLA2XXX_MIDTYPE(ha) &&
1137 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
1138 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
1139 break;
1140
1141 if (mb[2] == 0x7) {
1142 ql_dbg(ql_dbg_async, vha, 0x5010,
1143 "Port %s %04x %04x %04x.\n",
1144 mb[1] == 0xffff ? "unavailable" : "logout",
1145 mb[1], mb[2], mb[3]);
1146
1147 if (mb[1] == 0xffff)
1148 goto global_port_update;
1149
1150 if (mb[1] == NPH_SNS_LID(ha)) {
1151 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1152 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1153 break;
1154 }
1155
1156 /* use handle_cnt for loop id/nport handle */
1157 if (IS_FWI2_CAPABLE(ha))
1158 handle_cnt = NPH_SNS;
1159 else
1160 handle_cnt = SIMPLE_NAME_SERVER;
1161 if (mb[1] == handle_cnt) {
1162 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1163 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1164 break;
1165 }
1166
1167 /* Port logout */
1168 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
1169 if (!fcport)
1170 break;
1171 if (atomic_read(&fcport->state) != FCS_ONLINE)
1172 break;
1173 ql_dbg(ql_dbg_async, vha, 0x508a,
1174 "Marking port lost loopid=%04x portid=%06x.\n",
1175 fcport->loop_id, fcport->d_id.b24);
1176 if (qla_ini_mode_enabled(vha)) {
1177 fcport->logout_on_delete = 0;
1178 qlt_schedule_sess_for_deletion(fcport);
1179 }
1180 break;
1181
1182 global_port_update:
1183 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1184 atomic_set(&vha->loop_state, LOOP_DOWN);
1185 atomic_set(&vha->loop_down_timer,
1186 LOOP_DOWN_TIME);
1187 vha->device_flags |= DFLG_NO_CABLE;
1188 qla2x00_mark_all_devices_lost(vha);
1189 }
1190
1191 if (vha->vp_idx) {
1192 atomic_set(&vha->vp_state, VP_FAILED);
1193 fc_vport_set_state(vha->fc_vport,
1194 FC_VPORT_FAILED);
1195 qla2x00_mark_all_devices_lost(vha);
1196 }
1197
1198 vha->flags.management_server_logged_in = 0;
1199 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1200 break;
1201 }
1202
1203 /*
1204 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1205 * event etc. earlier indicating loop is down) then process
1206 * it. Otherwise ignore it and Wait for RSCN to come in.
1207 */
1208 atomic_set(&vha->loop_down_timer, 0);
1209 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
1210 !ha->flags.n2n_ae &&
1211 atomic_read(&vha->loop_state) != LOOP_DEAD) {
1212 ql_dbg(ql_dbg_async, vha, 0x5011,
1213 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
1214 mb[1], mb[2], mb[3]);
1215 break;
1216 }
1217
1218 ql_dbg(ql_dbg_async, vha, 0x5012,
1219 "Port database changed %04x %04x %04x.\n",
1220 mb[1], mb[2], mb[3]);
1221
1222 /*
1223 * Mark all devices as missing so we will login again.
1224 */
1225 atomic_set(&vha->loop_state, LOOP_UP);
1226 vha->scan.scan_retry = 0;
1227
1228 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1229 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1230 set_bit(VP_CONFIG_OK, &vha->vp_flags);
1231 break;
1232
1233 case MBA_RSCN_UPDATE: /* State Change Registration */
1234 /* Check if the Vport has issued a SCR */
1235 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
1236 break;
1237 /* Only handle SCNs for our Vport index. */
1238 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
1239 break;
1240
1241 ql_dbg(ql_dbg_async, vha, 0x5013,
1242 "RSCN database changed -- %04x %04x %04x.\n",
1243 mb[1], mb[2], mb[3]);
1244
1245 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
1246 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1247 | vha->d_id.b.al_pa;
1248 if (rscn_entry == host_pid) {
1249 ql_dbg(ql_dbg_async, vha, 0x5014,
1250 "Ignoring RSCN update to local host "
1251 "port ID (%06x).\n", host_pid);
1252 break;
1253 }
1254
1255 /* Ignore reserved bits from RSCN-payload. */
1256 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1257
1258 /* Skip RSCNs for virtual ports on the same physical port */
1259 if (qla2x00_is_a_vp_did(vha, rscn_entry))
1260 break;
1261
1262 atomic_set(&vha->loop_down_timer, 0);
1263 vha->flags.management_server_logged_in = 0;
1264 {
1265 struct event_arg ea;
1266
1267 memset(&ea, 0, sizeof(ea));
1268 ea.id.b24 = rscn_entry;
1269 ea.id.b.rsvd_1 = rscn_entry >> 24;
1270 qla2x00_handle_rscn(vha, &ea);
1271 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
1272 }
1273 break;
1274 /* case MBA_RIO_RESPONSE: */
1275 case MBA_ZIO_RESPONSE:
1276 ql_dbg(ql_dbg_async, vha, 0x5015,
1277 "[R|Z]IO update completion.\n");
1278
1279 if (IS_FWI2_CAPABLE(ha))
1280 qla24xx_process_response_queue(vha, rsp);
1281 else
1282 qla2x00_process_response_queue(rsp);
1283 break;
1284
1285 case MBA_DISCARD_RND_FRAME:
1286 ql_dbg(ql_dbg_async, vha, 0x5016,
1287 "Discard RND Frame -- %04x %04x %04x.\n",
1288 mb[1], mb[2], mb[3]);
1289 break;
1290
1291 case MBA_TRACE_NOTIFICATION:
1292 ql_dbg(ql_dbg_async, vha, 0x5017,
1293 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
1294 break;
1295
1296 case MBA_ISP84XX_ALERT:
1297 ql_dbg(ql_dbg_async, vha, 0x5018,
1298 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1299 mb[1], mb[2], mb[3]);
1300
1301 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1302 switch (mb[1]) {
1303 case A84_PANIC_RECOVERY:
1304 ql_log(ql_log_info, vha, 0x5019,
1305 "Alert 84XX: panic recovery %04x %04x.\n",
1306 mb[2], mb[3]);
1307 break;
1308 case A84_OP_LOGIN_COMPLETE:
1309 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
1310 ql_log(ql_log_info, vha, 0x501a,
1311 "Alert 84XX: firmware version %x.\n",
1312 ha->cs84xx->op_fw_version);
1313 break;
1314 case A84_DIAG_LOGIN_COMPLETE:
1315 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1316 ql_log(ql_log_info, vha, 0x501b,
1317 "Alert 84XX: diagnostic firmware version %x.\n",
1318 ha->cs84xx->diag_fw_version);
1319 break;
1320 case A84_GOLD_LOGIN_COMPLETE:
1321 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1322 ha->cs84xx->fw_update = 1;
1323 ql_log(ql_log_info, vha, 0x501c,
1324 "Alert 84XX: gold firmware version %x.\n",
1325 ha->cs84xx->gold_fw_version);
1326 break;
1327 default:
1328 ql_log(ql_log_warn, vha, 0x501d,
1329 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
1330 mb[1], mb[2], mb[3]);
1331 }
1332 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1333 break;
1334 case MBA_DCBX_START:
1335 ql_dbg(ql_dbg_async, vha, 0x501e,
1336 "DCBX Started -- %04x %04x %04x.\n",
1337 mb[1], mb[2], mb[3]);
1338 break;
1339 case MBA_DCBX_PARAM_UPDATE:
1340 ql_dbg(ql_dbg_async, vha, 0x501f,
1341 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1342 mb[1], mb[2], mb[3]);
1343 break;
1344 case MBA_FCF_CONF_ERR:
1345 ql_dbg(ql_dbg_async, vha, 0x5020,
1346 "FCF Configuration Error -- %04x %04x %04x.\n",
1347 mb[1], mb[2], mb[3]);
1348 break;
1349 case MBA_IDC_NOTIFY:
1350 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
1351 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1352 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1353 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1354 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
1355 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
1356 /*
1357 * Extend loop down timer since port is active.
1358 */
1359 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1360 atomic_set(&vha->loop_down_timer,
1361 LOOP_DOWN_TIME);
1362 qla2xxx_wake_dpc(vha);
1363 }
1364 }
1365 /* fall through */
1366 case MBA_IDC_COMPLETE:
1367 if (ha->notify_lb_portup_comp && !vha->vp_idx)
1368 complete(&ha->lb_portup_comp);
1369 /* Fallthru */
1370 case MBA_IDC_TIME_EXT:
1371 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1372 IS_QLA8044(ha))
1373 qla81xx_idc_event(vha, mb[0], mb[1]);
1374 break;
1375
1376 case MBA_IDC_AEN:
1377 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1378 ha->flags.fw_init_done = 0;
1379 ql_log(ql_log_warn, vha, 0xffff,
1380 "MPI Heartbeat stop. Chip reset needed. MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n",
1381 mb[0], mb[1], mb[2], mb[3]);
1382
1383 if ((mb[1] & BIT_8) ||
1384 (mb[2] & BIT_8)) {
1385 ql_log(ql_log_warn, vha, 0xd013,
1386 "MPI Heartbeat stop. FW dump needed\n");
1387 ha->fw_dump_mpi = 1;
1388 ha->isp_ops->fw_dump(vha, 1);
1389 }
1390 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1391 qla2xxx_wake_dpc(vha);
1392 } else if (IS_QLA83XX(ha)) {
1393 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1394 mb[5] = RD_REG_WORD(&reg24->mailbox5);
1395 mb[6] = RD_REG_WORD(&reg24->mailbox6);
1396 mb[7] = RD_REG_WORD(&reg24->mailbox7);
1397 qla83xx_handle_8200_aen(vha, mb);
1398 } else {
1399 ql_dbg(ql_dbg_async, vha, 0x5052,
1400 "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n",
1401 mb[0], mb[1], mb[2], mb[3]);
1402 }
1403 break;
1404
1405 case MBA_DPORT_DIAGNOSTICS:
1406 ql_dbg(ql_dbg_async, vha, 0x5052,
1407 "D-Port Diagnostics: %04x %04x %04x %04x\n",
1408 mb[0], mb[1], mb[2], mb[3]);
1409 memcpy(vha->dport_data, mb, sizeof(vha->dport_data));
1410 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1411 static char *results[] = {
1412 "start", "done(pass)", "done(error)", "undefined" };
1413 static char *types[] = {
1414 "none", "dynamic", "static", "other" };
1415 uint result = mb[1] >> 0 & 0x3;
1416 uint type = mb[1] >> 6 & 0x3;
1417 uint sw = mb[1] >> 15 & 0x1;
1418 ql_dbg(ql_dbg_async, vha, 0x5052,
1419 "D-Port Diagnostics: result=%s type=%s [sw=%u]\n",
1420 results[result], types[type], sw);
1421 if (result == 2) {
1422 static char *reasons[] = {
1423 "reserved", "unexpected reject",
1424 "unexpected phase", "retry exceeded",
1425 "timed out", "not supported",
1426 "user stopped" };
1427 uint reason = mb[2] >> 0 & 0xf;
1428 uint phase = mb[2] >> 12 & 0xf;
1429 ql_dbg(ql_dbg_async, vha, 0x5052,
1430 "D-Port Diagnostics: reason=%s phase=%u \n",
1431 reason < 7 ? reasons[reason] : "other",
1432 phase >> 1);
1433 }
1434 }
1435 break;
1436
1437 case MBA_TEMPERATURE_ALERT:
1438 ql_dbg(ql_dbg_async, vha, 0x505e,
1439 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
1440 if (mb[1] == 0x12)
1441 schedule_work(&ha->board_disable);
1442 break;
1443
1444 case MBA_TRANS_INSERT:
1445 ql_dbg(ql_dbg_async, vha, 0x5091,
1446 "Transceiver Insertion: %04x\n", mb[1]);
1447 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
1448 break;
1449
1450 case MBA_TRANS_REMOVE:
1451 ql_dbg(ql_dbg_async, vha, 0x5091, "Transceiver Removal\n");
1452 break;
1453
1454 default:
1455 ql_dbg(ql_dbg_async, vha, 0x5057,
1456 "Unknown AEN:%04x %04x %04x %04x\n",
1457 mb[0], mb[1], mb[2], mb[3]);
1458 }
1459
1460 qlt_async_event(mb[0], vha, mb);
1461
1462 if (!vha->vp_idx && ha->num_vhosts)
1463 qla2x00_alert_all_vps(rsp, mb);
1464 }
1465
1466 /**
1467 * qla2x00_process_completed_request() - Process a Fast Post response.
1468 * @vha: SCSI driver HA context
1469 * @req: request queue
1470 * @index: SRB index
1471 */
1472 void
1473 qla2x00_process_completed_request(struct scsi_qla_host *vha,
1474 struct req_que *req, uint32_t index)
1475 {
1476 srb_t *sp;
1477 struct qla_hw_data *ha = vha->hw;
1478
1479 /* Validate handle. */
1480 if (index >= req->num_outstanding_cmds) {
1481 ql_log(ql_log_warn, vha, 0x3014,
1482 "Invalid SCSI command index (%x).\n", index);
1483
1484 if (IS_P3P_TYPE(ha))
1485 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1486 else
1487 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1488 return;
1489 }
1490
1491 sp = req->outstanding_cmds[index];
1492 if (sp) {
1493 /* Free outstanding command slot. */
1494 req->outstanding_cmds[index] = NULL;
1495
1496 /* Save ISP completion status */
1497 sp->done(sp, DID_OK << 16);
1498 } else {
1499 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1500
1501 if (IS_P3P_TYPE(ha))
1502 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1503 else
1504 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1505 }
1506 }
1507
1508 srb_t *
1509 qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1510 struct req_que *req, void *iocb)
1511 {
1512 struct qla_hw_data *ha = vha->hw;
1513 sts_entry_t *pkt = iocb;
1514 srb_t *sp = NULL;
1515 uint16_t index;
1516
1517 index = LSW(pkt->handle);
1518 if (index >= req->num_outstanding_cmds) {
1519 ql_log(ql_log_warn, vha, 0x5031,
1520 "Invalid command index (%x) type %8ph.\n",
1521 index, iocb);
1522 if (IS_P3P_TYPE(ha))
1523 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1524 else
1525 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1526 goto done;
1527 }
1528 sp = req->outstanding_cmds[index];
1529 if (!sp) {
1530 ql_log(ql_log_warn, vha, 0x5032,
1531 "Invalid completion handle (%x) -- timed-out.\n", index);
1532 return sp;
1533 }
1534 if (sp->handle != index) {
1535 ql_log(ql_log_warn, vha, 0x5033,
1536 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
1537 return NULL;
1538 }
1539
1540 req->outstanding_cmds[index] = NULL;
1541
1542 done:
1543 return sp;
1544 }
1545
1546 static void
1547 qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1548 struct mbx_entry *mbx)
1549 {
1550 const char func[] = "MBX-IOCB";
1551 const char *type;
1552 fc_port_t *fcport;
1553 srb_t *sp;
1554 struct srb_iocb *lio;
1555 uint16_t *data;
1556 uint16_t status;
1557
1558 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1559 if (!sp)
1560 return;
1561
1562 lio = &sp->u.iocb_cmd;
1563 type = sp->name;
1564 fcport = sp->fcport;
1565 data = lio->u.logio.data;
1566
1567 data[0] = MBS_COMMAND_ERROR;
1568 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
1569 QLA_LOGIO_LOGIN_RETRIED : 0;
1570 if (mbx->entry_status) {
1571 ql_dbg(ql_dbg_async, vha, 0x5043,
1572 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
1573 "entry-status=%x status=%x state-flag=%x "
1574 "status-flags=%x.\n", type, sp->handle,
1575 fcport->d_id.b.domain, fcport->d_id.b.area,
1576 fcport->d_id.b.al_pa, mbx->entry_status,
1577 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
1578 le16_to_cpu(mbx->status_flags));
1579
1580 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
1581 mbx, sizeof(*mbx));
1582
1583 goto logio_done;
1584 }
1585
1586 status = le16_to_cpu(mbx->status);
1587 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
1588 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1589 status = 0;
1590 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
1591 ql_dbg(ql_dbg_async, vha, 0x5045,
1592 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1593 type, sp->handle, fcport->d_id.b.domain,
1594 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1595 le16_to_cpu(mbx->mb1));
1596
1597 data[0] = MBS_COMMAND_COMPLETE;
1598 if (sp->type == SRB_LOGIN_CMD) {
1599 fcport->port_type = FCT_TARGET;
1600 if (le16_to_cpu(mbx->mb1) & BIT_0)
1601 fcport->port_type = FCT_INITIATOR;
1602 else if (le16_to_cpu(mbx->mb1) & BIT_1)
1603 fcport->flags |= FCF_FCP2_DEVICE;
1604 }
1605 goto logio_done;
1606 }
1607
1608 data[0] = le16_to_cpu(mbx->mb0);
1609 switch (data[0]) {
1610 case MBS_PORT_ID_USED:
1611 data[1] = le16_to_cpu(mbx->mb1);
1612 break;
1613 case MBS_LOOP_ID_USED:
1614 break;
1615 default:
1616 data[0] = MBS_COMMAND_ERROR;
1617 break;
1618 }
1619
1620 ql_log(ql_log_warn, vha, 0x5046,
1621 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1622 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1623 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1624 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
1625 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
1626 le16_to_cpu(mbx->mb7));
1627
1628 logio_done:
1629 sp->done(sp, 0);
1630 }
1631
1632 static void
1633 qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1634 struct mbx_24xx_entry *pkt)
1635 {
1636 const char func[] = "MBX-IOCB2";
1637 srb_t *sp;
1638 struct srb_iocb *si;
1639 u16 sz, i;
1640 int res;
1641
1642 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1643 if (!sp)
1644 return;
1645
1646 si = &sp->u.iocb_cmd;
1647 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
1648
1649 for (i = 0; i < sz; i++)
1650 si->u.mbx.in_mb[i] = le16_to_cpu(pkt->mb[i]);
1651
1652 res = (si->u.mbx.in_mb[0] & MBS_MASK);
1653
1654 sp->done(sp, res);
1655 }
1656
1657 static void
1658 qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1659 struct nack_to_isp *pkt)
1660 {
1661 const char func[] = "nack";
1662 srb_t *sp;
1663 int res = 0;
1664
1665 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1666 if (!sp)
1667 return;
1668
1669 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
1670 res = QLA_FUNCTION_FAILED;
1671
1672 sp->done(sp, res);
1673 }
1674
1675 static void
1676 qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1677 sts_entry_t *pkt, int iocb_type)
1678 {
1679 const char func[] = "CT_IOCB";
1680 const char *type;
1681 srb_t *sp;
1682 struct bsg_job *bsg_job;
1683 struct fc_bsg_reply *bsg_reply;
1684 uint16_t comp_status;
1685 int res = 0;
1686
1687 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1688 if (!sp)
1689 return;
1690
1691 switch (sp->type) {
1692 case SRB_CT_CMD:
1693 bsg_job = sp->u.bsg_job;
1694 bsg_reply = bsg_job->reply;
1695
1696 type = "ct pass-through";
1697
1698 comp_status = le16_to_cpu(pkt->comp_status);
1699
1700 /*
1701 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1702 * fc payload to the caller
1703 */
1704 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1705 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1706
1707 if (comp_status != CS_COMPLETE) {
1708 if (comp_status == CS_DATA_UNDERRUN) {
1709 res = DID_OK << 16;
1710 bsg_reply->reply_payload_rcv_len =
1711 le16_to_cpu(pkt->rsp_info_len);
1712
1713 ql_log(ql_log_warn, vha, 0x5048,
1714 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
1715 type, comp_status,
1716 bsg_reply->reply_payload_rcv_len);
1717 } else {
1718 ql_log(ql_log_warn, vha, 0x5049,
1719 "CT pass-through-%s error comp_status=0x%x.\n",
1720 type, comp_status);
1721 res = DID_ERROR << 16;
1722 bsg_reply->reply_payload_rcv_len = 0;
1723 }
1724 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
1725 pkt, sizeof(*pkt));
1726 } else {
1727 res = DID_OK << 16;
1728 bsg_reply->reply_payload_rcv_len =
1729 bsg_job->reply_payload.payload_len;
1730 bsg_job->reply_len = 0;
1731 }
1732 break;
1733 case SRB_CT_PTHRU_CMD:
1734 /*
1735 * borrowing sts_entry_24xx.comp_status.
1736 * same location as ct_entry_24xx.comp_status
1737 */
1738 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
1739 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1740 sp->name);
1741 break;
1742 }
1743
1744 sp->done(sp, res);
1745 }
1746
1747 static void
1748 qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1749 struct sts_entry_24xx *pkt, int iocb_type)
1750 {
1751 const char func[] = "ELS_CT_IOCB";
1752 const char *type;
1753 srb_t *sp;
1754 struct bsg_job *bsg_job;
1755 struct fc_bsg_reply *bsg_reply;
1756 uint16_t comp_status;
1757 uint32_t fw_status[3];
1758 int res;
1759 struct srb_iocb *els;
1760
1761 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1762 if (!sp)
1763 return;
1764
1765 type = NULL;
1766 switch (sp->type) {
1767 case SRB_ELS_CMD_RPT:
1768 case SRB_ELS_CMD_HST:
1769 type = "els";
1770 break;
1771 case SRB_CT_CMD:
1772 type = "ct pass-through";
1773 break;
1774 case SRB_ELS_DCMD:
1775 type = "Driver ELS logo";
1776 if (iocb_type != ELS_IOCB_TYPE) {
1777 ql_dbg(ql_dbg_user, vha, 0x5047,
1778 "Completing %s: (%p) type=%d.\n",
1779 type, sp, sp->type);
1780 sp->done(sp, 0);
1781 return;
1782 }
1783 break;
1784 case SRB_CT_PTHRU_CMD:
1785 /* borrowing sts_entry_24xx.comp_status.
1786 same location as ct_entry_24xx.comp_status
1787 */
1788 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
1789 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1790 sp->name);
1791 sp->done(sp, res);
1792 return;
1793 default:
1794 ql_dbg(ql_dbg_user, vha, 0x503e,
1795 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
1796 return;
1797 }
1798
1799 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
1800 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_1);
1801 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->error_subcode_2);
1802
1803 if (iocb_type == ELS_IOCB_TYPE) {
1804 els = &sp->u.iocb_cmd;
1805 els->u.els_plogi.fw_status[0] = fw_status[0];
1806 els->u.els_plogi.fw_status[1] = fw_status[1];
1807 els->u.els_plogi.fw_status[2] = fw_status[2];
1808 els->u.els_plogi.comp_status = fw_status[0];
1809 if (comp_status == CS_COMPLETE) {
1810 res = DID_OK << 16;
1811 } else {
1812 if (comp_status == CS_DATA_UNDERRUN) {
1813 res = DID_OK << 16;
1814 els->u.els_plogi.len =
1815 le16_to_cpu(((struct els_sts_entry_24xx *)
1816 pkt)->total_byte_count);
1817 } else {
1818 els->u.els_plogi.len = 0;
1819 res = DID_ERROR << 16;
1820 }
1821 }
1822 ql_dbg(ql_dbg_user, vha, 0x503f,
1823 "ELS IOCB Done -%s error hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
1824 type, sp->handle, comp_status, fw_status[1], fw_status[2],
1825 le16_to_cpu(((struct els_sts_entry_24xx *)
1826 pkt)->total_byte_count));
1827 goto els_ct_done;
1828 }
1829
1830 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1831 * fc payload to the caller
1832 */
1833 bsg_job = sp->u.bsg_job;
1834 bsg_reply = bsg_job->reply;
1835 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1836 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1837
1838 if (comp_status != CS_COMPLETE) {
1839 if (comp_status == CS_DATA_UNDERRUN) {
1840 res = DID_OK << 16;
1841 bsg_reply->reply_payload_rcv_len =
1842 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
1843
1844 ql_dbg(ql_dbg_user, vha, 0x503f,
1845 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
1846 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
1847 type, sp->handle, comp_status, fw_status[1], fw_status[2],
1848 le16_to_cpu(((struct els_sts_entry_24xx *)
1849 pkt)->total_byte_count));
1850 } else {
1851 ql_dbg(ql_dbg_user, vha, 0x5040,
1852 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
1853 "error subcode 1=0x%x error subcode 2=0x%x.\n",
1854 type, sp->handle, comp_status,
1855 le16_to_cpu(((struct els_sts_entry_24xx *)
1856 pkt)->error_subcode_1),
1857 le16_to_cpu(((struct els_sts_entry_24xx *)
1858 pkt)->error_subcode_2));
1859 res = DID_ERROR << 16;
1860 bsg_reply->reply_payload_rcv_len = 0;
1861 }
1862 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
1863 fw_status, sizeof(fw_status));
1864 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
1865 pkt, sizeof(*pkt));
1866 }
1867 else {
1868 res = DID_OK << 16;
1869 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
1870 bsg_job->reply_len = 0;
1871 }
1872 els_ct_done:
1873
1874 sp->done(sp, res);
1875 }
1876
1877 static void
1878 qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
1879 struct logio_entry_24xx *logio)
1880 {
1881 const char func[] = "LOGIO-IOCB";
1882 const char *type;
1883 fc_port_t *fcport;
1884 srb_t *sp;
1885 struct srb_iocb *lio;
1886 uint16_t *data;
1887 uint32_t iop[2];
1888
1889 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
1890 if (!sp)
1891 return;
1892
1893 lio = &sp->u.iocb_cmd;
1894 type = sp->name;
1895 fcport = sp->fcport;
1896 data = lio->u.logio.data;
1897
1898 data[0] = MBS_COMMAND_ERROR;
1899 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
1900 QLA_LOGIO_LOGIN_RETRIED : 0;
1901 if (logio->entry_status) {
1902 ql_log(ql_log_warn, fcport->vha, 0x5034,
1903 "Async-%s error entry - %8phC hdl=%x"
1904 "portid=%02x%02x%02x entry-status=%x.\n",
1905 type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
1906 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1907 logio->entry_status);
1908 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
1909 logio, sizeof(*logio));
1910
1911 goto logio_done;
1912 }
1913
1914 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
1915 ql_dbg(ql_dbg_async, sp->vha, 0x5036,
1916 "Async-%s complete: handle=%x pid=%06x wwpn=%8phC iop0=%x\n",
1917 type, sp->handle, fcport->d_id.b24, fcport->port_name,
1918 le32_to_cpu(logio->io_parameter[0]));
1919
1920 vha->hw->exch_starvation = 0;
1921 data[0] = MBS_COMMAND_COMPLETE;
1922
1923 if (sp->type == SRB_PRLI_CMD) {
1924 lio->u.logio.iop[0] =
1925 le32_to_cpu(logio->io_parameter[0]);
1926 lio->u.logio.iop[1] =
1927 le32_to_cpu(logio->io_parameter[1]);
1928 goto logio_done;
1929 }
1930
1931 if (sp->type != SRB_LOGIN_CMD)
1932 goto logio_done;
1933
1934 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1935 if (iop[0] & BIT_4) {
1936 fcport->port_type = FCT_TARGET;
1937 if (iop[0] & BIT_8)
1938 fcport->flags |= FCF_FCP2_DEVICE;
1939 } else if (iop[0] & BIT_5)
1940 fcport->port_type = FCT_INITIATOR;
1941
1942 if (iop[0] & BIT_7)
1943 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1944
1945 if (logio->io_parameter[7] || logio->io_parameter[8])
1946 fcport->supported_classes |= FC_COS_CLASS2;
1947 if (logio->io_parameter[9] || logio->io_parameter[10])
1948 fcport->supported_classes |= FC_COS_CLASS3;
1949
1950 goto logio_done;
1951 }
1952
1953 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1954 iop[1] = le32_to_cpu(logio->io_parameter[1]);
1955 lio->u.logio.iop[0] = iop[0];
1956 lio->u.logio.iop[1] = iop[1];
1957 switch (iop[0]) {
1958 case LSC_SCODE_PORTID_USED:
1959 data[0] = MBS_PORT_ID_USED;
1960 data[1] = LSW(iop[1]);
1961 break;
1962 case LSC_SCODE_NPORT_USED:
1963 data[0] = MBS_LOOP_ID_USED;
1964 break;
1965 case LSC_SCODE_CMD_FAILED:
1966 if (iop[1] == 0x0606) {
1967 /*
1968 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
1969 * Target side acked.
1970 */
1971 data[0] = MBS_COMMAND_COMPLETE;
1972 goto logio_done;
1973 }
1974 data[0] = MBS_COMMAND_ERROR;
1975 break;
1976 case LSC_SCODE_NOXCB:
1977 vha->hw->exch_starvation++;
1978 if (vha->hw->exch_starvation > 5) {
1979 ql_log(ql_log_warn, vha, 0xd046,
1980 "Exchange starvation. Resetting RISC\n");
1981
1982 vha->hw->exch_starvation = 0;
1983
1984 if (IS_P3P_TYPE(vha->hw))
1985 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1986 else
1987 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1988 qla2xxx_wake_dpc(vha);
1989 }
1990 /* fall through */
1991 default:
1992 data[0] = MBS_COMMAND_ERROR;
1993 break;
1994 }
1995
1996 ql_dbg(ql_dbg_async, sp->vha, 0x5037,
1997 "Async-%s failed: handle=%x pid=%06x wwpn=%8phC comp_status=%x iop0=%x iop1=%x\n",
1998 type, sp->handle, fcport->d_id.b24, fcport->port_name,
1999 le16_to_cpu(logio->comp_status),
2000 le32_to_cpu(logio->io_parameter[0]),
2001 le32_to_cpu(logio->io_parameter[1]));
2002
2003 logio_done:
2004 sp->done(sp, 0);
2005 }
2006
2007 static void
2008 qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
2009 {
2010 const char func[] = "TMF-IOCB";
2011 const char *type;
2012 fc_port_t *fcport;
2013 srb_t *sp;
2014 struct srb_iocb *iocb;
2015 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
2016
2017 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
2018 if (!sp)
2019 return;
2020
2021 iocb = &sp->u.iocb_cmd;
2022 type = sp->name;
2023 fcport = sp->fcport;
2024 iocb->u.tmf.data = QLA_SUCCESS;
2025
2026 if (sts->entry_status) {
2027 ql_log(ql_log_warn, fcport->vha, 0x5038,
2028 "Async-%s error - hdl=%x entry-status(%x).\n",
2029 type, sp->handle, sts->entry_status);
2030 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2031 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
2032 ql_log(ql_log_warn, fcport->vha, 0x5039,
2033 "Async-%s error - hdl=%x completion status(%x).\n",
2034 type, sp->handle, sts->comp_status);
2035 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2036 } else if ((le16_to_cpu(sts->scsi_status) &
2037 SS_RESPONSE_INFO_LEN_VALID)) {
2038 if (le32_to_cpu(sts->rsp_data_len) < 4) {
2039 ql_log(ql_log_warn, fcport->vha, 0x503b,
2040 "Async-%s error - hdl=%x not enough response(%d).\n",
2041 type, sp->handle, sts->rsp_data_len);
2042 } else if (sts->data[3]) {
2043 ql_log(ql_log_warn, fcport->vha, 0x503c,
2044 "Async-%s error - hdl=%x response(%x).\n",
2045 type, sp->handle, sts->data[3]);
2046 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2047 }
2048 }
2049
2050 if (iocb->u.tmf.data != QLA_SUCCESS)
2051 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055,
2052 sts, sizeof(*sts));
2053
2054 sp->done(sp, 0);
2055 }
2056
2057 static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2058 void *tsk, srb_t *sp)
2059 {
2060 fc_port_t *fcport;
2061 struct srb_iocb *iocb;
2062 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
2063 uint16_t state_flags;
2064 struct nvmefc_fcp_req *fd;
2065 uint16_t ret = QLA_SUCCESS;
2066 uint16_t comp_status = le16_to_cpu(sts->comp_status);
2067 int logit = 0;
2068
2069 iocb = &sp->u.iocb_cmd;
2070 fcport = sp->fcport;
2071 iocb->u.nvme.comp_status = comp_status;
2072 state_flags = le16_to_cpu(sts->state_flags);
2073 fd = iocb->u.nvme.desc;
2074
2075 if (unlikely(iocb->u.nvme.aen_op))
2076 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
2077
2078 if (unlikely(comp_status != CS_COMPLETE))
2079 logit = 1;
2080
2081 fd->transferred_length = fd->payload_length -
2082 le32_to_cpu(sts->residual_len);
2083
2084 /*
2085 * State flags: Bit 6 and 0.
2086 * If 0 is set, we don't care about 6.
2087 * both cases resp was dma'd to host buffer
2088 * if both are 0, that is good path case.
2089 * if six is set and 0 is clear, we need to
2090 * copy resp data from status iocb to resp buffer.
2091 */
2092 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
2093 iocb->u.nvme.rsp_pyld_len = 0;
2094 } else if ((state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP)) ==
2095 (SF_FCP_RSP_DMA | SF_NVME_ERSP)) {
2096 /* Response already DMA'd to fd->rspaddr. */
2097 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
2098 } else if ((state_flags & SF_FCP_RSP_DMA)) {
2099 /*
2100 * Non-zero value in first 12 bytes of NVMe_RSP IU, treat this
2101 * as an error.
2102 */
2103 iocb->u.nvme.rsp_pyld_len = 0;
2104 fd->transferred_length = 0;
2105 ql_dbg(ql_dbg_io, fcport->vha, 0x307a,
2106 "Unexpected values in NVMe_RSP IU.\n");
2107 logit = 1;
2108 } else if (state_flags & SF_NVME_ERSP) {
2109 uint32_t *inbuf, *outbuf;
2110 uint16_t iter;
2111
2112 inbuf = (uint32_t *)&sts->nvme_ersp_data;
2113 outbuf = (uint32_t *)fd->rspaddr;
2114 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
2115 if (unlikely(iocb->u.nvme.rsp_pyld_len >
2116 sizeof(struct nvme_fc_ersp_iu))) {
2117 if (ql_mask_match(ql_dbg_io)) {
2118 WARN_ONCE(1, "Unexpected response payload length %u.\n",
2119 iocb->u.nvme.rsp_pyld_len);
2120 ql_log(ql_log_warn, fcport->vha, 0x5100,
2121 "Unexpected response payload length %u.\n",
2122 iocb->u.nvme.rsp_pyld_len);
2123 }
2124 iocb->u.nvme.rsp_pyld_len =
2125 sizeof(struct nvme_fc_ersp_iu);
2126 }
2127 iter = iocb->u.nvme.rsp_pyld_len >> 2;
2128 for (; iter; iter--)
2129 *outbuf++ = swab32(*inbuf++);
2130 }
2131
2132 if (state_flags & SF_NVME_ERSP) {
2133 struct nvme_fc_ersp_iu *rsp_iu = fd->rspaddr;
2134 u32 tgt_xfer_len;
2135
2136 tgt_xfer_len = be32_to_cpu(rsp_iu->xfrd_len);
2137 if (fd->transferred_length != tgt_xfer_len) {
2138 ql_dbg(ql_dbg_io, fcport->vha, 0x3079,
2139 "Dropped frame(s) detected (sent/rcvd=%u/%u).\n",
2140 tgt_xfer_len, fd->transferred_length);
2141 logit = 1;
2142 } else if (comp_status == CS_DATA_UNDERRUN) {
2143 /*
2144 * Do not log if this is just an underflow and there
2145 * is no data loss.
2146 */
2147 logit = 0;
2148 }
2149 }
2150
2151 if (unlikely(logit))
2152 ql_log(ql_log_warn, fcport->vha, 0x5060,
2153 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n",
2154 sp->name, sp->handle, comp_status,
2155 fd->transferred_length, le32_to_cpu(sts->residual_len),
2156 sts->ox_id);
2157
2158 /*
2159 * If transport error then Failure (HBA rejects request)
2160 * otherwise transport will handle.
2161 */
2162 switch (comp_status) {
2163 case CS_COMPLETE:
2164 break;
2165
2166 case CS_RESET:
2167 case CS_PORT_UNAVAILABLE:
2168 case CS_PORT_LOGGED_OUT:
2169 fcport->nvme_flag |= NVME_FLAG_RESETTING;
2170 /* fall through */
2171 case CS_ABORTED:
2172 case CS_PORT_BUSY:
2173 fd->transferred_length = 0;
2174 iocb->u.nvme.rsp_pyld_len = 0;
2175 ret = QLA_ABORTED;
2176 break;
2177 case CS_DATA_UNDERRUN:
2178 break;
2179 default:
2180 ret = QLA_FUNCTION_FAILED;
2181 break;
2182 }
2183 sp->done(sp, ret);
2184 }
2185
2186 static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
2187 struct vp_ctrl_entry_24xx *vce)
2188 {
2189 const char func[] = "CTRLVP-IOCB";
2190 srb_t *sp;
2191 int rval = QLA_SUCCESS;
2192
2193 sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
2194 if (!sp)
2195 return;
2196
2197 if (vce->entry_status != 0) {
2198 ql_dbg(ql_dbg_vport, vha, 0x10c4,
2199 "%s: Failed to complete IOCB -- error status (%x)\n",
2200 sp->name, vce->entry_status);
2201 rval = QLA_FUNCTION_FAILED;
2202 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
2203 ql_dbg(ql_dbg_vport, vha, 0x10c5,
2204 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
2205 sp->name, le16_to_cpu(vce->comp_status),
2206 le16_to_cpu(vce->vp_idx_failed));
2207 rval = QLA_FUNCTION_FAILED;
2208 } else {
2209 ql_dbg(ql_dbg_vport, vha, 0x10c6,
2210 "Done %s.\n", __func__);
2211 }
2212
2213 sp->rc = rval;
2214 sp->done(sp, rval);
2215 }
2216
2217 /* Process a single response queue entry. */
2218 static void qla2x00_process_response_entry(struct scsi_qla_host *vha,
2219 struct rsp_que *rsp,
2220 sts_entry_t *pkt)
2221 {
2222 sts21_entry_t *sts21_entry;
2223 sts22_entry_t *sts22_entry;
2224 uint16_t handle_cnt;
2225 uint16_t cnt;
2226
2227 switch (pkt->entry_type) {
2228 case STATUS_TYPE:
2229 qla2x00_status_entry(vha, rsp, pkt);
2230 break;
2231 case STATUS_TYPE_21:
2232 sts21_entry = (sts21_entry_t *)pkt;
2233 handle_cnt = sts21_entry->handle_count;
2234 for (cnt = 0; cnt < handle_cnt; cnt++)
2235 qla2x00_process_completed_request(vha, rsp->req,
2236 sts21_entry->handle[cnt]);
2237 break;
2238 case STATUS_TYPE_22:
2239 sts22_entry = (sts22_entry_t *)pkt;
2240 handle_cnt = sts22_entry->handle_count;
2241 for (cnt = 0; cnt < handle_cnt; cnt++)
2242 qla2x00_process_completed_request(vha, rsp->req,
2243 sts22_entry->handle[cnt]);
2244 break;
2245 case STATUS_CONT_TYPE:
2246 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2247 break;
2248 case MBX_IOCB_TYPE:
2249 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt);
2250 break;
2251 case CT_IOCB_TYPE:
2252 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2253 break;
2254 default:
2255 /* Type Not Supported. */
2256 ql_log(ql_log_warn, vha, 0x504a,
2257 "Received unknown response pkt type %x entry status=%x.\n",
2258 pkt->entry_type, pkt->entry_status);
2259 break;
2260 }
2261 }
2262
2263 /**
2264 * qla2x00_process_response_queue() - Process response queue entries.
2265 * @rsp: response queue
2266 */
2267 void
2268 qla2x00_process_response_queue(struct rsp_que *rsp)
2269 {
2270 struct scsi_qla_host *vha;
2271 struct qla_hw_data *ha = rsp->hw;
2272 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2273 sts_entry_t *pkt;
2274
2275 vha = pci_get_drvdata(ha->pdev);
2276
2277 if (!vha->flags.online)
2278 return;
2279
2280 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2281 pkt = (sts_entry_t *)rsp->ring_ptr;
2282
2283 rsp->ring_index++;
2284 if (rsp->ring_index == rsp->length) {
2285 rsp->ring_index = 0;
2286 rsp->ring_ptr = rsp->ring;
2287 } else {
2288 rsp->ring_ptr++;
2289 }
2290
2291 if (pkt->entry_status != 0) {
2292 qla2x00_error_entry(vha, rsp, pkt);
2293 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2294 wmb();
2295 continue;
2296 }
2297
2298 qla2x00_process_response_entry(vha, rsp, pkt);
2299 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2300 wmb();
2301 }
2302
2303 /* Adjust ring index */
2304 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
2305 }
2306
2307 static inline void
2308 qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2309 uint32_t sense_len, struct rsp_que *rsp, int res)
2310 {
2311 struct scsi_qla_host *vha = sp->vha;
2312 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2313 uint32_t track_sense_len;
2314
2315 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2316 sense_len = SCSI_SENSE_BUFFERSIZE;
2317
2318 SET_CMD_SENSE_LEN(sp, sense_len);
2319 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2320 track_sense_len = sense_len;
2321
2322 if (sense_len > par_sense_len)
2323 sense_len = par_sense_len;
2324
2325 memcpy(cp->sense_buffer, sense_data, sense_len);
2326
2327 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2328 track_sense_len -= sense_len;
2329 SET_CMD_SENSE_LEN(sp, track_sense_len);
2330
2331 if (track_sense_len != 0) {
2332 rsp->status_srb = sp;
2333 cp->result = res;
2334 }
2335
2336 if (sense_len) {
2337 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
2338 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2339 sp->vha->host_no, cp->device->id, cp->device->lun,
2340 cp);
2341 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
2342 cp->sense_buffer, sense_len);
2343 }
2344 }
2345
2346 struct scsi_dif_tuple {
2347 __be16 guard; /* Checksum */
2348 __be16 app_tag; /* APPL identifier */
2349 __be32 ref_tag; /* Target LBA or indirect LBA */
2350 };
2351
2352 /*
2353 * Checks the guard or meta-data for the type of error
2354 * detected by the HBA. In case of errors, we set the
2355 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
2356 * to indicate to the kernel that the HBA detected error.
2357 */
2358 static inline int
2359 qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
2360 {
2361 struct scsi_qla_host *vha = sp->vha;
2362 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
2363 uint8_t *ap = &sts24->data[12];
2364 uint8_t *ep = &sts24->data[20];
2365 uint32_t e_ref_tag, a_ref_tag;
2366 uint16_t e_app_tag, a_app_tag;
2367 uint16_t e_guard, a_guard;
2368
2369 /*
2370 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
2371 * would make guard field appear at offset 2
2372 */
2373 a_guard = get_unaligned_le16(ap + 2);
2374 a_app_tag = get_unaligned_le16(ap + 0);
2375 a_ref_tag = get_unaligned_le32(ap + 4);
2376 e_guard = get_unaligned_le16(ep + 2);
2377 e_app_tag = get_unaligned_le16(ep + 0);
2378 e_ref_tag = get_unaligned_le32(ep + 4);
2379
2380 ql_dbg(ql_dbg_io, vha, 0x3023,
2381 "iocb(s) %p Returned STATUS.\n", sts24);
2382
2383 ql_dbg(ql_dbg_io, vha, 0x3024,
2384 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
2385 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
2386 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
2387 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
2388 a_app_tag, e_app_tag, a_guard, e_guard);
2389
2390 /*
2391 * Ignore sector if:
2392 * For type 3: ref & app tag is all 'f's
2393 * For type 0,1,2: app tag is all 'f's
2394 */
2395 if ((a_app_tag == T10_PI_APP_ESCAPE) &&
2396 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
2397 (a_ref_tag == T10_PI_REF_ESCAPE))) {
2398 uint32_t blocks_done, resid;
2399 sector_t lba_s = scsi_get_lba(cmd);
2400
2401 /* 2TB boundary case covered automatically with this */
2402 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
2403
2404 resid = scsi_bufflen(cmd) - (blocks_done *
2405 cmd->device->sector_size);
2406
2407 scsi_set_resid(cmd, resid);
2408 cmd->result = DID_OK << 16;
2409
2410 /* Update protection tag */
2411 if (scsi_prot_sg_count(cmd)) {
2412 uint32_t i, j = 0, k = 0, num_ent;
2413 struct scatterlist *sg;
2414 struct t10_pi_tuple *spt;
2415
2416 /* Patch the corresponding protection tags */
2417 scsi_for_each_prot_sg(cmd, sg,
2418 scsi_prot_sg_count(cmd), i) {
2419 num_ent = sg_dma_len(sg) / 8;
2420 if (k + num_ent < blocks_done) {
2421 k += num_ent;
2422 continue;
2423 }
2424 j = blocks_done - k - 1;
2425 k = blocks_done;
2426 break;
2427 }
2428
2429 if (k != blocks_done) {
2430 ql_log(ql_log_warn, vha, 0x302f,
2431 "unexpected tag values tag:lba=%x:%llx)\n",
2432 e_ref_tag, (unsigned long long)lba_s);
2433 return 1;
2434 }
2435
2436 spt = page_address(sg_page(sg)) + sg->offset;
2437 spt += j;
2438
2439 spt->app_tag = T10_PI_APP_ESCAPE;
2440 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
2441 spt->ref_tag = T10_PI_REF_ESCAPE;
2442 }
2443
2444 return 0;
2445 }
2446
2447 /* check guard */
2448 if (e_guard != a_guard) {
2449 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2450 0x10, 0x1);
2451 set_driver_byte(cmd, DRIVER_SENSE);
2452 set_host_byte(cmd, DID_ABORT);
2453 cmd->result |= SAM_STAT_CHECK_CONDITION;
2454 return 1;
2455 }
2456
2457 /* check ref tag */
2458 if (e_ref_tag != a_ref_tag) {
2459 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2460 0x10, 0x3);
2461 set_driver_byte(cmd, DRIVER_SENSE);
2462 set_host_byte(cmd, DID_ABORT);
2463 cmd->result |= SAM_STAT_CHECK_CONDITION;
2464 return 1;
2465 }
2466
2467 /* check appl tag */
2468 if (e_app_tag != a_app_tag) {
2469 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2470 0x10, 0x2);
2471 set_driver_byte(cmd, DRIVER_SENSE);
2472 set_host_byte(cmd, DID_ABORT);
2473 cmd->result |= SAM_STAT_CHECK_CONDITION;
2474 return 1;
2475 }
2476
2477 return 1;
2478 }
2479
2480 static void
2481 qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
2482 struct req_que *req, uint32_t index)
2483 {
2484 struct qla_hw_data *ha = vha->hw;
2485 srb_t *sp;
2486 uint16_t comp_status;
2487 uint16_t scsi_status;
2488 uint16_t thread_id;
2489 uint32_t rval = EXT_STATUS_OK;
2490 struct bsg_job *bsg_job = NULL;
2491 struct fc_bsg_request *bsg_request;
2492 struct fc_bsg_reply *bsg_reply;
2493 sts_entry_t *sts = pkt;
2494 struct sts_entry_24xx *sts24 = pkt;
2495
2496 /* Validate handle. */
2497 if (index >= req->num_outstanding_cmds) {
2498 ql_log(ql_log_warn, vha, 0x70af,
2499 "Invalid SCSI completion handle 0x%x.\n", index);
2500 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2501 return;
2502 }
2503
2504 sp = req->outstanding_cmds[index];
2505 if (!sp) {
2506 ql_log(ql_log_warn, vha, 0x70b0,
2507 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
2508 req->id, index);
2509
2510 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2511 return;
2512 }
2513
2514 /* Free outstanding command slot. */
2515 req->outstanding_cmds[index] = NULL;
2516 bsg_job = sp->u.bsg_job;
2517 bsg_request = bsg_job->request;
2518 bsg_reply = bsg_job->reply;
2519
2520 if (IS_FWI2_CAPABLE(ha)) {
2521 comp_status = le16_to_cpu(sts24->comp_status);
2522 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2523 } else {
2524 comp_status = le16_to_cpu(sts->comp_status);
2525 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2526 }
2527
2528 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
2529 switch (comp_status) {
2530 case CS_COMPLETE:
2531 if (scsi_status == 0) {
2532 bsg_reply->reply_payload_rcv_len =
2533 bsg_job->reply_payload.payload_len;
2534 vha->qla_stats.input_bytes +=
2535 bsg_reply->reply_payload_rcv_len;
2536 vha->qla_stats.input_requests++;
2537 rval = EXT_STATUS_OK;
2538 }
2539 goto done;
2540
2541 case CS_DATA_OVERRUN:
2542 ql_dbg(ql_dbg_user, vha, 0x70b1,
2543 "Command completed with data overrun thread_id=%d\n",
2544 thread_id);
2545 rval = EXT_STATUS_DATA_OVERRUN;
2546 break;
2547
2548 case CS_DATA_UNDERRUN:
2549 ql_dbg(ql_dbg_user, vha, 0x70b2,
2550 "Command completed with data underrun thread_id=%d\n",
2551 thread_id);
2552 rval = EXT_STATUS_DATA_UNDERRUN;
2553 break;
2554 case CS_BIDIR_RD_OVERRUN:
2555 ql_dbg(ql_dbg_user, vha, 0x70b3,
2556 "Command completed with read data overrun thread_id=%d\n",
2557 thread_id);
2558 rval = EXT_STATUS_DATA_OVERRUN;
2559 break;
2560
2561 case CS_BIDIR_RD_WR_OVERRUN:
2562 ql_dbg(ql_dbg_user, vha, 0x70b4,
2563 "Command completed with read and write data overrun "
2564 "thread_id=%d\n", thread_id);
2565 rval = EXT_STATUS_DATA_OVERRUN;
2566 break;
2567
2568 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
2569 ql_dbg(ql_dbg_user, vha, 0x70b5,
2570 "Command completed with read data over and write data "
2571 "underrun thread_id=%d\n", thread_id);
2572 rval = EXT_STATUS_DATA_OVERRUN;
2573 break;
2574
2575 case CS_BIDIR_RD_UNDERRUN:
2576 ql_dbg(ql_dbg_user, vha, 0x70b6,
2577 "Command completed with read data underrun "
2578 "thread_id=%d\n", thread_id);
2579 rval = EXT_STATUS_DATA_UNDERRUN;
2580 break;
2581
2582 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
2583 ql_dbg(ql_dbg_user, vha, 0x70b7,
2584 "Command completed with read data under and write data "
2585 "overrun thread_id=%d\n", thread_id);
2586 rval = EXT_STATUS_DATA_UNDERRUN;
2587 break;
2588
2589 case CS_BIDIR_RD_WR_UNDERRUN:
2590 ql_dbg(ql_dbg_user, vha, 0x70b8,
2591 "Command completed with read and write data underrun "
2592 "thread_id=%d\n", thread_id);
2593 rval = EXT_STATUS_DATA_UNDERRUN;
2594 break;
2595
2596 case CS_BIDIR_DMA:
2597 ql_dbg(ql_dbg_user, vha, 0x70b9,
2598 "Command completed with data DMA error thread_id=%d\n",
2599 thread_id);
2600 rval = EXT_STATUS_DMA_ERR;
2601 break;
2602
2603 case CS_TIMEOUT:
2604 ql_dbg(ql_dbg_user, vha, 0x70ba,
2605 "Command completed with timeout thread_id=%d\n",
2606 thread_id);
2607 rval = EXT_STATUS_TIMEOUT;
2608 break;
2609 default:
2610 ql_dbg(ql_dbg_user, vha, 0x70bb,
2611 "Command completed with completion status=0x%x "
2612 "thread_id=%d\n", comp_status, thread_id);
2613 rval = EXT_STATUS_ERR;
2614 break;
2615 }
2616 bsg_reply->reply_payload_rcv_len = 0;
2617
2618 done:
2619 /* Return the vendor specific reply to API */
2620 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
2621 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2622 /* Always return DID_OK, bsg will send the vendor specific response
2623 * in this case only */
2624 sp->done(sp, DID_OK << 16);
2625
2626 }
2627
2628 /**
2629 * qla2x00_status_entry() - Process a Status IOCB entry.
2630 * @vha: SCSI driver HA context
2631 * @rsp: response queue
2632 * @pkt: Entry pointer
2633 */
2634 static void
2635 qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2636 {
2637 srb_t *sp;
2638 fc_port_t *fcport;
2639 struct scsi_cmnd *cp;
2640 sts_entry_t *sts = pkt;
2641 struct sts_entry_24xx *sts24 = pkt;
2642 uint16_t comp_status;
2643 uint16_t scsi_status;
2644 uint16_t ox_id;
2645 uint8_t lscsi_status;
2646 int32_t resid;
2647 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2648 fw_resid_len;
2649 uint8_t *rsp_info, *sense_data;
2650 struct qla_hw_data *ha = vha->hw;
2651 uint32_t handle;
2652 uint16_t que;
2653 struct req_que *req;
2654 int logit = 1;
2655 int res = 0;
2656 uint16_t state_flags = 0;
2657 uint16_t retry_delay = 0;
2658
2659 if (IS_FWI2_CAPABLE(ha)) {
2660 comp_status = le16_to_cpu(sts24->comp_status);
2661 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2662 state_flags = le16_to_cpu(sts24->state_flags);
2663 } else {
2664 comp_status = le16_to_cpu(sts->comp_status);
2665 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2666 }
2667 handle = (uint32_t) LSW(sts->handle);
2668 que = MSW(sts->handle);
2669 req = ha->req_q_map[que];
2670
2671 /* Check for invalid queue pointer */
2672 if (req == NULL ||
2673 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2674 ql_dbg(ql_dbg_io, vha, 0x3059,
2675 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2676 "que=%u.\n", sts->handle, req, que);
2677 return;
2678 }
2679
2680 /* Validate handle. */
2681 if (handle < req->num_outstanding_cmds) {
2682 sp = req->outstanding_cmds[handle];
2683 if (!sp) {
2684 ql_dbg(ql_dbg_io, vha, 0x3075,
2685 "%s(%ld): Already returned command for status handle (0x%x).\n",
2686 __func__, vha->host_no, sts->handle);
2687 return;
2688 }
2689 } else {
2690 ql_dbg(ql_dbg_io, vha, 0x3017,
2691 "Invalid status handle, out of range (0x%x).\n",
2692 sts->handle);
2693
2694 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2695 if (IS_P3P_TYPE(ha))
2696 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2697 else
2698 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2699 qla2xxx_wake_dpc(vha);
2700 }
2701 return;
2702 }
2703
2704 if (sp->cmd_type != TYPE_SRB) {
2705 req->outstanding_cmds[handle] = NULL;
2706 ql_dbg(ql_dbg_io, vha, 0x3015,
2707 "Unknown sp->cmd_type %x %p).\n",
2708 sp->cmd_type, sp);
2709 return;
2710 }
2711
2712 /* NVME completion. */
2713 if (sp->type == SRB_NVME_CMD) {
2714 req->outstanding_cmds[handle] = NULL;
2715 qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
2716 return;
2717 }
2718
2719 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2720 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2721 return;
2722 }
2723
2724 /* Task Management completion. */
2725 if (sp->type == SRB_TM_CMD) {
2726 qla24xx_tm_iocb_entry(vha, req, pkt);
2727 return;
2728 }
2729
2730 /* Fast path completion. */
2731 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2732 qla2x00_process_completed_request(vha, req, handle);
2733
2734 return;
2735 }
2736
2737 req->outstanding_cmds[handle] = NULL;
2738 cp = GET_CMD_SP(sp);
2739 if (cp == NULL) {
2740 ql_dbg(ql_dbg_io, vha, 0x3018,
2741 "Command already returned (0x%x/%p).\n",
2742 sts->handle, sp);
2743
2744 return;
2745 }
2746
2747 lscsi_status = scsi_status & STATUS_MASK;
2748
2749 fcport = sp->fcport;
2750
2751 ox_id = 0;
2752 sense_len = par_sense_len = rsp_info_len = resid_len =
2753 fw_resid_len = 0;
2754 if (IS_FWI2_CAPABLE(ha)) {
2755 if (scsi_status & SS_SENSE_LEN_VALID)
2756 sense_len = le32_to_cpu(sts24->sense_len);
2757 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2758 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2759 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2760 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2761 if (comp_status == CS_DATA_UNDERRUN)
2762 fw_resid_len = le32_to_cpu(sts24->residual_len);
2763 rsp_info = sts24->data;
2764 sense_data = sts24->data;
2765 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
2766 ox_id = le16_to_cpu(sts24->ox_id);
2767 par_sense_len = sizeof(sts24->data);
2768 /* Valid values of the retry delay timer are 0x1-0xffef */
2769 if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) {
2770 retry_delay = sts24->retry_delay & 0x3fff;
2771 ql_dbg(ql_dbg_io, sp->vha, 0x3033,
2772 "%s: scope=%#x retry_delay=%#x\n", __func__,
2773 sts24->retry_delay >> 14, retry_delay);
2774 }
2775 } else {
2776 if (scsi_status & SS_SENSE_LEN_VALID)
2777 sense_len = le16_to_cpu(sts->req_sense_length);
2778 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2779 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
2780 resid_len = le32_to_cpu(sts->residual_length);
2781 rsp_info = sts->rsp_info;
2782 sense_data = sts->req_sense_data;
2783 par_sense_len = sizeof(sts->req_sense_data);
2784 }
2785
2786 /* Check for any FCP transport errors. */
2787 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
2788 /* Sense data lies beyond any FCP RESPONSE data. */
2789 if (IS_FWI2_CAPABLE(ha)) {
2790 sense_data += rsp_info_len;
2791 par_sense_len -= rsp_info_len;
2792 }
2793 if (rsp_info_len > 3 && rsp_info[3]) {
2794 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
2795 "FCP I/O protocol failure (0x%x/0x%x).\n",
2796 rsp_info_len, rsp_info[3]);
2797
2798 res = DID_BUS_BUSY << 16;
2799 goto out;
2800 }
2801 }
2802
2803 /* Check for overrun. */
2804 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
2805 scsi_status & SS_RESIDUAL_OVER)
2806 comp_status = CS_DATA_OVERRUN;
2807
2808 /*
2809 * Check retry_delay_timer value if we receive a busy or
2810 * queue full.
2811 */
2812 if (lscsi_status == SAM_STAT_TASK_SET_FULL ||
2813 lscsi_status == SAM_STAT_BUSY)
2814 qla2x00_set_retry_delay_timestamp(fcport, retry_delay);
2815
2816 /*
2817 * Based on Host and scsi status generate status code for Linux
2818 */
2819 switch (comp_status) {
2820 case CS_COMPLETE:
2821 case CS_QUEUE_FULL:
2822 if (scsi_status == 0) {
2823 res = DID_OK << 16;
2824 break;
2825 }
2826 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
2827 resid = resid_len;
2828 scsi_set_resid(cp, resid);
2829
2830 if (!lscsi_status &&
2831 ((unsigned)(scsi_bufflen(cp) - resid) <
2832 cp->underflow)) {
2833 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
2834 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
2835 resid, scsi_bufflen(cp));
2836
2837 res = DID_ERROR << 16;
2838 break;
2839 }
2840 }
2841 res = DID_OK << 16 | lscsi_status;
2842
2843 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
2844 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
2845 "QUEUE FULL detected.\n");
2846 break;
2847 }
2848 logit = 0;
2849 if (lscsi_status != SS_CHECK_CONDITION)
2850 break;
2851
2852 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2853 if (!(scsi_status & SS_SENSE_LEN_VALID))
2854 break;
2855
2856 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2857 rsp, res);
2858 break;
2859
2860 case CS_DATA_UNDERRUN:
2861 /* Use F/W calculated residual length. */
2862 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
2863 scsi_set_resid(cp, resid);
2864 if (scsi_status & SS_RESIDUAL_UNDER) {
2865 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
2866 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
2867 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
2868 resid, scsi_bufflen(cp));
2869
2870 res = DID_ERROR << 16 | lscsi_status;
2871 goto check_scsi_status;
2872 }
2873
2874 if (!lscsi_status &&
2875 ((unsigned)(scsi_bufflen(cp) - resid) <
2876 cp->underflow)) {
2877 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
2878 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
2879 resid, scsi_bufflen(cp));
2880
2881 res = DID_ERROR << 16;
2882 break;
2883 }
2884 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
2885 lscsi_status != SAM_STAT_BUSY) {
2886 /*
2887 * scsi status of task set and busy are considered to be
2888 * task not completed.
2889 */
2890
2891 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
2892 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
2893 resid, scsi_bufflen(cp));
2894
2895 res = DID_ERROR << 16 | lscsi_status;
2896 goto check_scsi_status;
2897 } else {
2898 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
2899 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2900 scsi_status, lscsi_status);
2901 }
2902
2903 res = DID_OK << 16 | lscsi_status;
2904 logit = 0;
2905
2906 check_scsi_status:
2907 /*
2908 * Check to see if SCSI Status is non zero. If so report SCSI
2909 * Status.
2910 */
2911 if (lscsi_status != 0) {
2912 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
2913 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
2914 "QUEUE FULL detected.\n");
2915 logit = 1;
2916 break;
2917 }
2918 if (lscsi_status != SS_CHECK_CONDITION)
2919 break;
2920
2921 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2922 if (!(scsi_status & SS_SENSE_LEN_VALID))
2923 break;
2924
2925 qla2x00_handle_sense(sp, sense_data, par_sense_len,
2926 sense_len, rsp, res);
2927 }
2928 break;
2929
2930 case CS_PORT_LOGGED_OUT:
2931 case CS_PORT_CONFIG_CHG:
2932 case CS_PORT_BUSY:
2933 case CS_INCOMPLETE:
2934 case CS_PORT_UNAVAILABLE:
2935 case CS_TIMEOUT:
2936 case CS_RESET:
2937
2938 /*
2939 * We are going to have the fc class block the rport
2940 * while we try to recover so instruct the mid layer
2941 * to requeue until the class decides how to handle this.
2942 */
2943 res = DID_TRANSPORT_DISRUPTED << 16;
2944
2945 if (comp_status == CS_TIMEOUT) {
2946 if (IS_FWI2_CAPABLE(ha))
2947 break;
2948 else if ((le16_to_cpu(sts->status_flags) &
2949 SF_LOGOUT_SENT) == 0)
2950 break;
2951 }
2952
2953 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2954 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
2955 "Port to be marked lost on fcport=%02x%02x%02x, current "
2956 "port state= %s comp_status %x.\n", fcport->d_id.b.domain,
2957 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2958 port_state_str[FCS_ONLINE],
2959 comp_status);
2960
2961 qlt_schedule_sess_for_deletion(fcport);
2962 }
2963
2964 break;
2965
2966 case CS_ABORTED:
2967 res = DID_RESET << 16;
2968 break;
2969
2970 case CS_DIF_ERROR:
2971 logit = qla2x00_handle_dif_error(sp, sts24);
2972 res = cp->result;
2973 break;
2974
2975 case CS_TRANSPORT:
2976 res = DID_ERROR << 16;
2977
2978 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
2979 break;
2980
2981 if (state_flags & BIT_4)
2982 scmd_printk(KERN_WARNING, cp,
2983 "Unsupported device '%s' found.\n",
2984 cp->device->vendor);
2985 break;
2986
2987 case CS_DMA:
2988 ql_log(ql_log_info, fcport->vha, 0x3022,
2989 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
2990 comp_status, scsi_status, res, vha->host_no,
2991 cp->device->id, cp->device->lun, fcport->d_id.b24,
2992 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
2993 resid_len, fw_resid_len, sp, cp);
2994 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
2995 pkt, sizeof(*sts24));
2996 res = DID_ERROR << 16;
2997 break;
2998 default:
2999 res = DID_ERROR << 16;
3000 break;
3001 }
3002
3003 out:
3004 if (logit)
3005 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
3006 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
3007 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
3008 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
3009 comp_status, scsi_status, res, vha->host_no,
3010 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
3011 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
3012 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
3013 resid_len, fw_resid_len, sp, cp);
3014
3015 if (rsp->status_srb == NULL)
3016 sp->done(sp, res);
3017 }
3018
3019 /**
3020 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
3021 * @rsp: response queue
3022 * @pkt: Entry pointer
3023 *
3024 * Extended sense data.
3025 */
3026 static void
3027 qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
3028 {
3029 uint8_t sense_sz = 0;
3030 struct qla_hw_data *ha = rsp->hw;
3031 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
3032 srb_t *sp = rsp->status_srb;
3033 struct scsi_cmnd *cp;
3034 uint32_t sense_len;
3035 uint8_t *sense_ptr;
3036
3037 if (!sp || !GET_CMD_SENSE_LEN(sp))
3038 return;
3039
3040 sense_len = GET_CMD_SENSE_LEN(sp);
3041 sense_ptr = GET_CMD_SENSE_PTR(sp);
3042
3043 cp = GET_CMD_SP(sp);
3044 if (cp == NULL) {
3045 ql_log(ql_log_warn, vha, 0x3025,
3046 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
3047
3048 rsp->status_srb = NULL;
3049 return;
3050 }
3051
3052 if (sense_len > sizeof(pkt->data))
3053 sense_sz = sizeof(pkt->data);
3054 else
3055 sense_sz = sense_len;
3056
3057 /* Move sense data. */
3058 if (IS_FWI2_CAPABLE(ha))
3059 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
3060 memcpy(sense_ptr, pkt->data, sense_sz);
3061 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
3062 sense_ptr, sense_sz);
3063
3064 sense_len -= sense_sz;
3065 sense_ptr += sense_sz;
3066
3067 SET_CMD_SENSE_PTR(sp, sense_ptr);
3068 SET_CMD_SENSE_LEN(sp, sense_len);
3069
3070 /* Place command on done queue. */
3071 if (sense_len == 0) {
3072 rsp->status_srb = NULL;
3073 sp->done(sp, cp->result);
3074 }
3075 }
3076
3077 /**
3078 * qla2x00_error_entry() - Process an error entry.
3079 * @vha: SCSI driver HA context
3080 * @rsp: response queue
3081 * @pkt: Entry pointer
3082 * return : 1=allow further error analysis. 0=no additional error analysis.
3083 */
3084 static int
3085 qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
3086 {
3087 srb_t *sp;
3088 struct qla_hw_data *ha = vha->hw;
3089 const char func[] = "ERROR-IOCB";
3090 uint16_t que = MSW(pkt->handle);
3091 struct req_que *req = NULL;
3092 int res = DID_ERROR << 16;
3093
3094 ql_dbg(ql_dbg_async, vha, 0x502a,
3095 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
3096 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
3097
3098 if (que >= ha->max_req_queues || !ha->req_q_map[que])
3099 goto fatal;
3100
3101 req = ha->req_q_map[que];
3102
3103 if (pkt->entry_status & RF_BUSY)
3104 res = DID_BUS_BUSY << 16;
3105
3106 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
3107 return 0;
3108
3109 switch (pkt->entry_type) {
3110 case NOTIFY_ACK_TYPE:
3111 case STATUS_TYPE:
3112 case STATUS_CONT_TYPE:
3113 case LOGINOUT_PORT_IOCB_TYPE:
3114 case CT_IOCB_TYPE:
3115 case ELS_IOCB_TYPE:
3116 case ABORT_IOCB_TYPE:
3117 case MBX_IOCB_TYPE:
3118 default:
3119 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3120 if (sp) {
3121 sp->done(sp, res);
3122 return 0;
3123 }
3124 break;
3125
3126 case ABTS_RESP_24XX:
3127 case CTIO_TYPE7:
3128 case CTIO_CRC2:
3129 return 1;
3130 }
3131 fatal:
3132 ql_log(ql_log_warn, vha, 0x5030,
3133 "Error entry - invalid handle/queue (%04x).\n", que);
3134 return 0;
3135 }
3136
3137 /**
3138 * qla24xx_mbx_completion() - Process mailbox command completions.
3139 * @vha: SCSI driver HA context
3140 * @mb0: Mailbox0 register
3141 */
3142 static void
3143 qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
3144 {
3145 uint16_t cnt;
3146 uint32_t mboxes;
3147 uint16_t __iomem *wptr;
3148 struct qla_hw_data *ha = vha->hw;
3149 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3150
3151 /* Read all mbox registers? */
3152 WARN_ON_ONCE(ha->mbx_count > 32);
3153 mboxes = (1ULL << ha->mbx_count) - 1;
3154 if (!ha->mcp)
3155 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
3156 else
3157 mboxes = ha->mcp->in_mb;
3158
3159 /* Load return mailbox registers. */
3160 ha->flags.mbox_int = 1;
3161 ha->mailbox_out[0] = mb0;
3162 mboxes >>= 1;
3163 wptr = (uint16_t __iomem *)&reg->mailbox1;
3164
3165 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
3166 if (mboxes & BIT_0)
3167 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
3168
3169 mboxes >>= 1;
3170 wptr++;
3171 }
3172 }
3173
3174 static void
3175 qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
3176 struct abort_entry_24xx *pkt)
3177 {
3178 const char func[] = "ABT_IOCB";
3179 srb_t *sp;
3180 struct srb_iocb *abt;
3181
3182 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3183 if (!sp)
3184 return;
3185
3186 abt = &sp->u.iocb_cmd;
3187 abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle);
3188 sp->done(sp, 0);
3189 }
3190
3191 void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
3192 struct pt_ls4_request *pkt, struct req_que *req)
3193 {
3194 srb_t *sp;
3195 const char func[] = "LS4_IOCB";
3196 uint16_t comp_status;
3197
3198 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3199 if (!sp)
3200 return;
3201
3202 comp_status = le16_to_cpu(pkt->status);
3203 sp->done(sp, comp_status);
3204 }
3205
3206 /**
3207 * qla24xx_process_response_queue() - Process response queue entries.
3208 * @vha: SCSI driver HA context
3209 * @rsp: response queue
3210 */
3211 void qla24xx_process_response_queue(struct scsi_qla_host *vha,
3212 struct rsp_que *rsp)
3213 {
3214 struct sts_entry_24xx *pkt;
3215 struct qla_hw_data *ha = vha->hw;
3216
3217 if (!ha->flags.fw_started)
3218 return;
3219
3220 if (rsp->qpair->cpuid != smp_processor_id())
3221 qla_cpu_update(rsp->qpair, smp_processor_id());
3222
3223 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
3224 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
3225
3226 rsp->ring_index++;
3227 if (rsp->ring_index == rsp->length) {
3228 rsp->ring_index = 0;
3229 rsp->ring_ptr = rsp->ring;
3230 } else {
3231 rsp->ring_ptr++;
3232 }
3233
3234 if (pkt->entry_status != 0) {
3235 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
3236 goto process_err;
3237
3238 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3239 wmb();
3240 continue;
3241 }
3242 process_err:
3243
3244 switch (pkt->entry_type) {
3245 case STATUS_TYPE:
3246 qla2x00_status_entry(vha, rsp, pkt);
3247 break;
3248 case STATUS_CONT_TYPE:
3249 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
3250 break;
3251 case VP_RPT_ID_IOCB_TYPE:
3252 qla24xx_report_id_acquisition(vha,
3253 (struct vp_rpt_id_entry_24xx *)pkt);
3254 break;
3255 case LOGINOUT_PORT_IOCB_TYPE:
3256 qla24xx_logio_entry(vha, rsp->req,
3257 (struct logio_entry_24xx *)pkt);
3258 break;
3259 case CT_IOCB_TYPE:
3260 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
3261 break;
3262 case ELS_IOCB_TYPE:
3263 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
3264 break;
3265 case ABTS_RECV_24XX:
3266 if (qla_ini_mode_enabled(vha)) {
3267 qla24xx_purex_iocb(vha, pkt,
3268 qla24xx_process_abts);
3269 break;
3270 }
3271 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3272 IS_QLA28XX(ha)) {
3273 /* ensure that the ATIO queue is empty */
3274 qlt_handle_abts_recv(vha, rsp,
3275 (response_t *)pkt);
3276 break;
3277 } else {
3278 qlt_24xx_process_atio_queue(vha, 1);
3279 }
3280 /* fall through */
3281 case ABTS_RESP_24XX:
3282 case CTIO_TYPE7:
3283 case CTIO_CRC2:
3284 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
3285 break;
3286 case PT_LS4_REQUEST:
3287 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
3288 rsp->req);
3289 break;
3290 case NOTIFY_ACK_TYPE:
3291 if (pkt->handle == QLA_TGT_SKIP_HANDLE)
3292 qlt_response_pkt_all_vps(vha, rsp,
3293 (response_t *)pkt);
3294 else
3295 qla24xxx_nack_iocb_entry(vha, rsp->req,
3296 (struct nack_to_isp *)pkt);
3297 break;
3298 case MARKER_TYPE:
3299 /* Do nothing in this case, this check is to prevent it
3300 * from falling into default case
3301 */
3302 break;
3303 case ABORT_IOCB_TYPE:
3304 qla24xx_abort_iocb_entry(vha, rsp->req,
3305 (struct abort_entry_24xx *)pkt);
3306 break;
3307 case MBX_IOCB_TYPE:
3308 qla24xx_mbx_iocb_entry(vha, rsp->req,
3309 (struct mbx_24xx_entry *)pkt);
3310 break;
3311 case VP_CTRL_IOCB_TYPE:
3312 qla_ctrlvp_completed(vha, rsp->req,
3313 (struct vp_ctrl_entry_24xx *)pkt);
3314 break;
3315 case PUREX_IOCB_TYPE:
3316 {
3317 struct purex_entry_24xx *purex = (void *)pkt;
3318
3319 if (purex->els_frame_payload[3] != ELS_COMMAND_RDP) {
3320 ql_dbg(ql_dbg_init, vha, 0x5091,
3321 "Discarding ELS Request opcode %#x...\n",
3322 purex->els_frame_payload[3]);
3323 break;
3324 }
3325 qla24xx_purex_iocb(vha, pkt, qla24xx_process_purex_rdp);
3326 break;
3327 }
3328 default:
3329 /* Type Not Supported. */
3330 ql_dbg(ql_dbg_async, vha, 0x5042,
3331 "Received unknown response pkt type %x "
3332 "entry status=%x.\n",
3333 pkt->entry_type, pkt->entry_status);
3334 break;
3335 }
3336 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3337 wmb();
3338 }
3339
3340 /* Adjust ring index */
3341 if (IS_P3P_TYPE(ha)) {
3342 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
3343
3344 WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
3345 } else {
3346 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
3347 }
3348 }
3349
3350 static void
3351 qla2xxx_check_risc_status(scsi_qla_host_t *vha)
3352 {
3353 int rval;
3354 uint32_t cnt;
3355 struct qla_hw_data *ha = vha->hw;
3356 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3357
3358 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3359 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3360 return;
3361
3362 rval = QLA_SUCCESS;
3363 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
3364 RD_REG_DWORD(&reg->iobase_addr);
3365 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3366 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3367 rval == QLA_SUCCESS; cnt--) {
3368 if (cnt) {
3369 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3370 udelay(10);
3371 } else
3372 rval = QLA_FUNCTION_TIMEOUT;
3373 }
3374 if (rval == QLA_SUCCESS)
3375 goto next_test;
3376
3377 rval = QLA_SUCCESS;
3378 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3379 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3380 rval == QLA_SUCCESS; cnt--) {
3381 if (cnt) {
3382 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3383 udelay(10);
3384 } else
3385 rval = QLA_FUNCTION_TIMEOUT;
3386 }
3387 if (rval != QLA_SUCCESS)
3388 goto done;
3389
3390 next_test:
3391 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
3392 ql_log(ql_log_info, vha, 0x504c,
3393 "Additional code -- 0x55AA.\n");
3394
3395 done:
3396 WRT_REG_DWORD(&reg->iobase_window, 0x0000);
3397 RD_REG_DWORD(&reg->iobase_window);
3398 }
3399
3400 /**
3401 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
3402 * @irq: interrupt number
3403 * @dev_id: SCSI driver HA context
3404 *
3405 * Called by system whenever the host adapter generates an interrupt.
3406 *
3407 * Returns handled flag.
3408 */
3409 irqreturn_t
3410 qla24xx_intr_handler(int irq, void *dev_id)
3411 {
3412 scsi_qla_host_t *vha;
3413 struct qla_hw_data *ha;
3414 struct device_reg_24xx __iomem *reg;
3415 int status;
3416 unsigned long iter;
3417 uint32_t stat;
3418 uint32_t hccr;
3419 uint16_t mb[8];
3420 struct rsp_que *rsp;
3421 unsigned long flags;
3422 bool process_atio = false;
3423
3424 rsp = (struct rsp_que *) dev_id;
3425 if (!rsp) {
3426 ql_log(ql_log_info, NULL, 0x5059,
3427 "%s: NULL response queue pointer.\n", __func__);
3428 return IRQ_NONE;
3429 }
3430
3431 ha = rsp->hw;
3432 reg = &ha->iobase->isp24;
3433 status = 0;
3434
3435 if (unlikely(pci_channel_offline(ha->pdev)))
3436 return IRQ_HANDLED;
3437
3438 spin_lock_irqsave(&ha->hardware_lock, flags);
3439 vha = pci_get_drvdata(ha->pdev);
3440 for (iter = 50; iter--; ) {
3441 stat = RD_REG_DWORD(&reg->host_status);
3442 if (qla2x00_check_reg32_for_disconnect(vha, stat))
3443 break;
3444 if (stat & HSRX_RISC_PAUSED) {
3445 if (unlikely(pci_channel_offline(ha->pdev)))
3446 break;
3447
3448 hccr = RD_REG_DWORD(&reg->hccr);
3449
3450 ql_log(ql_log_warn, vha, 0x504b,
3451 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3452 hccr);
3453
3454 qla2xxx_check_risc_status(vha);
3455
3456 ha->isp_ops->fw_dump(vha, 1);
3457 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3458 break;
3459 } else if ((stat & HSRX_RISC_INT) == 0)
3460 break;
3461
3462 switch (stat & 0xff) {
3463 case INTR_ROM_MB_SUCCESS:
3464 case INTR_ROM_MB_FAILED:
3465 case INTR_MB_SUCCESS:
3466 case INTR_MB_FAILED:
3467 qla24xx_mbx_completion(vha, MSW(stat));
3468 status |= MBX_INTERRUPT;
3469
3470 break;
3471 case INTR_ASYNC_EVENT:
3472 mb[0] = MSW(stat);
3473 mb[1] = RD_REG_WORD(&reg->mailbox1);
3474 mb[2] = RD_REG_WORD(&reg->mailbox2);
3475 mb[3] = RD_REG_WORD(&reg->mailbox3);
3476 qla2x00_async_event(vha, rsp, mb);
3477 break;
3478 case INTR_RSP_QUE_UPDATE:
3479 case INTR_RSP_QUE_UPDATE_83XX:
3480 qla24xx_process_response_queue(vha, rsp);
3481 break;
3482 case INTR_ATIO_QUE_UPDATE_27XX:
3483 case INTR_ATIO_QUE_UPDATE:
3484 process_atio = true;
3485 break;
3486 case INTR_ATIO_RSP_QUE_UPDATE:
3487 process_atio = true;
3488 qla24xx_process_response_queue(vha, rsp);
3489 break;
3490 default:
3491 ql_dbg(ql_dbg_async, vha, 0x504f,
3492 "Unrecognized interrupt type (%d).\n", stat * 0xff);
3493 break;
3494 }
3495 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3496 RD_REG_DWORD_RELAXED(&reg->hccr);
3497 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
3498 ndelay(3500);
3499 }
3500 qla2x00_handle_mbx_completion(ha, status);
3501 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3502
3503 if (process_atio) {
3504 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3505 qlt_24xx_process_atio_queue(vha, 0);
3506 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3507 }
3508
3509 return IRQ_HANDLED;
3510 }
3511
3512 static irqreturn_t
3513 qla24xx_msix_rsp_q(int irq, void *dev_id)
3514 {
3515 struct qla_hw_data *ha;
3516 struct rsp_que *rsp;
3517 struct device_reg_24xx __iomem *reg;
3518 struct scsi_qla_host *vha;
3519 unsigned long flags;
3520
3521 rsp = (struct rsp_que *) dev_id;
3522 if (!rsp) {
3523 ql_log(ql_log_info, NULL, 0x505a,
3524 "%s: NULL response queue pointer.\n", __func__);
3525 return IRQ_NONE;
3526 }
3527 ha = rsp->hw;
3528 reg = &ha->iobase->isp24;
3529
3530 spin_lock_irqsave(&ha->hardware_lock, flags);
3531
3532 vha = pci_get_drvdata(ha->pdev);
3533 qla24xx_process_response_queue(vha, rsp);
3534 if (!ha->flags.disable_msix_handshake) {
3535 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3536 RD_REG_DWORD_RELAXED(&reg->hccr);
3537 }
3538 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3539
3540 return IRQ_HANDLED;
3541 }
3542
3543 static irqreturn_t
3544 qla24xx_msix_default(int irq, void *dev_id)
3545 {
3546 scsi_qla_host_t *vha;
3547 struct qla_hw_data *ha;
3548 struct rsp_que *rsp;
3549 struct device_reg_24xx __iomem *reg;
3550 int status;
3551 uint32_t stat;
3552 uint32_t hccr;
3553 uint16_t mb[8];
3554 unsigned long flags;
3555 bool process_atio = false;
3556
3557 rsp = (struct rsp_que *) dev_id;
3558 if (!rsp) {
3559 ql_log(ql_log_info, NULL, 0x505c,
3560 "%s: NULL response queue pointer.\n", __func__);
3561 return IRQ_NONE;
3562 }
3563 ha = rsp->hw;
3564 reg = &ha->iobase->isp24;
3565 status = 0;
3566
3567 spin_lock_irqsave(&ha->hardware_lock, flags);
3568 vha = pci_get_drvdata(ha->pdev);
3569 do {
3570 stat = RD_REG_DWORD(&reg->host_status);
3571 if (qla2x00_check_reg32_for_disconnect(vha, stat))
3572 break;
3573 if (stat & HSRX_RISC_PAUSED) {
3574 if (unlikely(pci_channel_offline(ha->pdev)))
3575 break;
3576
3577 hccr = RD_REG_DWORD(&reg->hccr);
3578
3579 ql_log(ql_log_info, vha, 0x5050,
3580 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3581 hccr);
3582
3583 qla2xxx_check_risc_status(vha);
3584
3585 ha->isp_ops->fw_dump(vha, 1);
3586 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3587 break;
3588 } else if ((stat & HSRX_RISC_INT) == 0)
3589 break;
3590
3591 switch (stat & 0xff) {
3592 case INTR_ROM_MB_SUCCESS:
3593 case INTR_ROM_MB_FAILED:
3594 case INTR_MB_SUCCESS:
3595 case INTR_MB_FAILED:
3596 qla24xx_mbx_completion(vha, MSW(stat));
3597 status |= MBX_INTERRUPT;
3598
3599 break;
3600 case INTR_ASYNC_EVENT:
3601 mb[0] = MSW(stat);
3602 mb[1] = RD_REG_WORD(&reg->mailbox1);
3603 mb[2] = RD_REG_WORD(&reg->mailbox2);
3604 mb[3] = RD_REG_WORD(&reg->mailbox3);
3605 qla2x00_async_event(vha, rsp, mb);
3606 break;
3607 case INTR_RSP_QUE_UPDATE:
3608 case INTR_RSP_QUE_UPDATE_83XX:
3609 qla24xx_process_response_queue(vha, rsp);
3610 break;
3611 case INTR_ATIO_QUE_UPDATE_27XX:
3612 case INTR_ATIO_QUE_UPDATE:
3613 process_atio = true;
3614 break;
3615 case INTR_ATIO_RSP_QUE_UPDATE:
3616 process_atio = true;
3617 qla24xx_process_response_queue(vha, rsp);
3618 break;
3619 default:
3620 ql_dbg(ql_dbg_async, vha, 0x5051,
3621 "Unrecognized interrupt type (%d).\n", stat & 0xff);
3622 break;
3623 }
3624 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3625 } while (0);
3626 qla2x00_handle_mbx_completion(ha, status);
3627 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3628
3629 if (process_atio) {
3630 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3631 qlt_24xx_process_atio_queue(vha, 0);
3632 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3633 }
3634
3635 return IRQ_HANDLED;
3636 }
3637
3638 irqreturn_t
3639 qla2xxx_msix_rsp_q(int irq, void *dev_id)
3640 {
3641 struct qla_hw_data *ha;
3642 struct qla_qpair *qpair;
3643
3644 qpair = dev_id;
3645 if (!qpair) {
3646 ql_log(ql_log_info, NULL, 0x505b,
3647 "%s: NULL response queue pointer.\n", __func__);
3648 return IRQ_NONE;
3649 }
3650 ha = qpair->hw;
3651
3652 queue_work(ha->wq, &qpair->q_work);
3653
3654 return IRQ_HANDLED;
3655 }
3656
3657 irqreturn_t
3658 qla2xxx_msix_rsp_q_hs(int irq, void *dev_id)
3659 {
3660 struct qla_hw_data *ha;
3661 struct qla_qpair *qpair;
3662 struct device_reg_24xx __iomem *reg;
3663 unsigned long flags;
3664
3665 qpair = dev_id;
3666 if (!qpair) {
3667 ql_log(ql_log_info, NULL, 0x505b,
3668 "%s: NULL response queue pointer.\n", __func__);
3669 return IRQ_NONE;
3670 }
3671 ha = qpair->hw;
3672
3673 reg = &ha->iobase->isp24;
3674 spin_lock_irqsave(&ha->hardware_lock, flags);
3675 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3676 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3677
3678 queue_work(ha->wq, &qpair->q_work);
3679
3680 return IRQ_HANDLED;
3681 }
3682
3683 /* Interrupt handling helpers. */
3684
3685 struct qla_init_msix_entry {
3686 const char *name;
3687 irq_handler_t handler;
3688 };
3689
3690 static const struct qla_init_msix_entry msix_entries[] = {
3691 { "default", qla24xx_msix_default },
3692 { "rsp_q", qla24xx_msix_rsp_q },
3693 { "atio_q", qla83xx_msix_atio_q },
3694 { "qpair_multiq", qla2xxx_msix_rsp_q },
3695 { "qpair_multiq_hs", qla2xxx_msix_rsp_q_hs },
3696 };
3697
3698 static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
3699 { "qla2xxx (default)", qla82xx_msix_default },
3700 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
3701 };
3702
3703 static int
3704 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
3705 {
3706 int i, ret;
3707 struct qla_msix_entry *qentry;
3708 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3709 int min_vecs = QLA_BASE_VECTORS;
3710 struct irq_affinity desc = {
3711 .pre_vectors = QLA_BASE_VECTORS,
3712 };
3713
3714 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3715 IS_ATIO_MSIX_CAPABLE(ha)) {
3716 desc.pre_vectors++;
3717 min_vecs++;
3718 }
3719
3720 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
3721 /* user wants to control IRQ setting for target mode */
3722 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
3723 ha->msix_count, PCI_IRQ_MSIX);
3724 } else
3725 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
3726 ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
3727 &desc);
3728
3729 if (ret < 0) {
3730 ql_log(ql_log_fatal, vha, 0x00c7,
3731 "MSI-X: Failed to enable support, "
3732 "giving up -- %d/%d.\n",
3733 ha->msix_count, ret);
3734 goto msix_out;
3735 } else if (ret < ha->msix_count) {
3736 ql_log(ql_log_info, vha, 0x00c6,
3737 "MSI-X: Using %d vectors\n", ret);
3738 ha->msix_count = ret;
3739 /* Recalculate queue values */
3740 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
3741 ha->max_req_queues = ha->msix_count - 1;
3742
3743 /* ATIOQ needs 1 vector. That's 1 less QPair */
3744 if (QLA_TGT_MODE_ENABLED())
3745 ha->max_req_queues--;
3746
3747 ha->max_rsp_queues = ha->max_req_queues;
3748
3749 ha->max_qpairs = ha->max_req_queues - 1;
3750 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
3751 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
3752 }
3753 }
3754 vha->irq_offset = desc.pre_vectors;
3755 ha->msix_entries = kcalloc(ha->msix_count,
3756 sizeof(struct qla_msix_entry),
3757 GFP_KERNEL);
3758 if (!ha->msix_entries) {
3759 ql_log(ql_log_fatal, vha, 0x00c8,
3760 "Failed to allocate memory for ha->msix_entries.\n");
3761 ret = -ENOMEM;
3762 goto free_irqs;
3763 }
3764 ha->flags.msix_enabled = 1;
3765
3766 for (i = 0; i < ha->msix_count; i++) {
3767 qentry = &ha->msix_entries[i];
3768 qentry->vector = pci_irq_vector(ha->pdev, i);
3769 qentry->entry = i;
3770 qentry->have_irq = 0;
3771 qentry->in_use = 0;
3772 qentry->handle = NULL;
3773 }
3774
3775 /* Enable MSI-X vectors for the base queue */
3776 for (i = 0; i < QLA_BASE_VECTORS; i++) {
3777 qentry = &ha->msix_entries[i];
3778 qentry->handle = rsp;
3779 rsp->msix = qentry;
3780 scnprintf(qentry->name, sizeof(qentry->name),
3781 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
3782 if (IS_P3P_TYPE(ha))
3783 ret = request_irq(qentry->vector,
3784 qla82xx_msix_entries[i].handler,
3785 0, qla82xx_msix_entries[i].name, rsp);
3786 else
3787 ret = request_irq(qentry->vector,
3788 msix_entries[i].handler,
3789 0, qentry->name, rsp);
3790 if (ret)
3791 goto msix_register_fail;
3792 qentry->have_irq = 1;
3793 qentry->in_use = 1;
3794 }
3795
3796 /*
3797 * If target mode is enable, also request the vector for the ATIO
3798 * queue.
3799 */
3800 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3801 IS_ATIO_MSIX_CAPABLE(ha)) {
3802 qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
3803 rsp->msix = qentry;
3804 qentry->handle = rsp;
3805 scnprintf(qentry->name, sizeof(qentry->name),
3806 "qla2xxx%lu_%s", vha->host_no,
3807 msix_entries[QLA_ATIO_VECTOR].name);
3808 qentry->in_use = 1;
3809 ret = request_irq(qentry->vector,
3810 msix_entries[QLA_ATIO_VECTOR].handler,
3811 0, qentry->name, rsp);
3812 qentry->have_irq = 1;
3813 }
3814
3815 msix_register_fail:
3816 if (ret) {
3817 ql_log(ql_log_fatal, vha, 0x00cb,
3818 "MSI-X: unable to register handler -- %x/%d.\n",
3819 qentry->vector, ret);
3820 qla2x00_free_irqs(vha);
3821 ha->mqenable = 0;
3822 goto msix_out;
3823 }
3824
3825 /* Enable MSI-X vector for response queue update for queue 0 */
3826 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3827 if (ha->msixbase && ha->mqiobase &&
3828 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3829 ql2xmqsupport))
3830 ha->mqenable = 1;
3831 } else
3832 if (ha->mqiobase &&
3833 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3834 ql2xmqsupport))
3835 ha->mqenable = 1;
3836 ql_dbg(ql_dbg_multiq, vha, 0xc005,
3837 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3838 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3839 ql_dbg(ql_dbg_init, vha, 0x0055,
3840 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3841 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3842
3843 msix_out:
3844 return ret;
3845
3846 free_irqs:
3847 pci_free_irq_vectors(ha->pdev);
3848 goto msix_out;
3849 }
3850
3851 int
3852 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
3853 {
3854 int ret = QLA_FUNCTION_FAILED;
3855 device_reg_t *reg = ha->iobase;
3856 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3857
3858 /* If possible, enable MSI-X. */
3859 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
3860 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
3861 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha)))
3862 goto skip_msi;
3863
3864 if (ql2xenablemsix == 2)
3865 goto skip_msix;
3866
3867 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
3868 (ha->pdev->subsystem_device == 0x7040 ||
3869 ha->pdev->subsystem_device == 0x7041 ||
3870 ha->pdev->subsystem_device == 0x1705)) {
3871 ql_log(ql_log_warn, vha, 0x0034,
3872 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
3873 ha->pdev->subsystem_vendor,
3874 ha->pdev->subsystem_device);
3875 goto skip_msi;
3876 }
3877
3878 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
3879 ql_log(ql_log_warn, vha, 0x0035,
3880 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
3881 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
3882 goto skip_msix;
3883 }
3884
3885 ret = qla24xx_enable_msix(ha, rsp);
3886 if (!ret) {
3887 ql_dbg(ql_dbg_init, vha, 0x0036,
3888 "MSI-X: Enabled (0x%X, 0x%X).\n",
3889 ha->chip_revision, ha->fw_attributes);
3890 goto clear_risc_ints;
3891 }
3892
3893 skip_msix:
3894
3895 ql_log(ql_log_info, vha, 0x0037,
3896 "Falling back-to MSI mode -- ret=%d.\n", ret);
3897
3898 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
3899 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
3900 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3901 goto skip_msi;
3902
3903 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
3904 if (ret > 0) {
3905 ql_dbg(ql_dbg_init, vha, 0x0038,
3906 "MSI: Enabled.\n");
3907 ha->flags.msi_enabled = 1;
3908 } else
3909 ql_log(ql_log_warn, vha, 0x0039,
3910 "Falling back-to INTa mode -- ret=%d.\n", ret);
3911 skip_msi:
3912
3913 /* Skip INTx on ISP82xx. */
3914 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
3915 return QLA_FUNCTION_FAILED;
3916
3917 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
3918 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
3919 QLA2XXX_DRIVER_NAME, rsp);
3920 if (ret) {
3921 ql_log(ql_log_warn, vha, 0x003a,
3922 "Failed to reserve interrupt %d already in use.\n",
3923 ha->pdev->irq);
3924 goto fail;
3925 } else if (!ha->flags.msi_enabled) {
3926 ql_dbg(ql_dbg_init, vha, 0x0125,
3927 "INTa mode: Enabled.\n");
3928 ha->flags.mr_intr_valid = 1;
3929 }
3930
3931 clear_risc_ints:
3932 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
3933 goto fail;
3934
3935 spin_lock_irq(&ha->hardware_lock);
3936 WRT_REG_WORD(&reg->isp.semaphore, 0);
3937 spin_unlock_irq(&ha->hardware_lock);
3938
3939 fail:
3940 return ret;
3941 }
3942
3943 void
3944 qla2x00_free_irqs(scsi_qla_host_t *vha)
3945 {
3946 struct qla_hw_data *ha = vha->hw;
3947 struct rsp_que *rsp;
3948 struct qla_msix_entry *qentry;
3949 int i;
3950
3951 /*
3952 * We need to check that ha->rsp_q_map is valid in case we are called
3953 * from a probe failure context.
3954 */
3955 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
3956 goto free_irqs;
3957 rsp = ha->rsp_q_map[0];
3958
3959 if (ha->flags.msix_enabled) {
3960 for (i = 0; i < ha->msix_count; i++) {
3961 qentry = &ha->msix_entries[i];
3962 if (qentry->have_irq) {
3963 irq_set_affinity_notifier(qentry->vector, NULL);
3964 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
3965 }
3966 }
3967 kfree(ha->msix_entries);
3968 ha->msix_entries = NULL;
3969 ha->flags.msix_enabled = 0;
3970 ql_dbg(ql_dbg_init, vha, 0x0042,
3971 "Disabled MSI-X.\n");
3972 } else {
3973 free_irq(pci_irq_vector(ha->pdev, 0), rsp);
3974 }
3975
3976 free_irqs:
3977 pci_free_irq_vectors(ha->pdev);
3978 }
3979
3980 int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
3981 struct qla_msix_entry *msix, int vector_type)
3982 {
3983 const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
3984 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3985 int ret;
3986
3987 scnprintf(msix->name, sizeof(msix->name),
3988 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
3989 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
3990 if (ret) {
3991 ql_log(ql_log_fatal, vha, 0x00e6,
3992 "MSI-X: Unable to register handler -- %x/%d.\n",
3993 msix->vector, ret);
3994 return ret;
3995 }
3996 msix->have_irq = 1;
3997 msix->handle = qpair;
3998 return ret;
3999 }
Linux with added FPC-III support