gpio: rcar: Fix runtime PM imbalance on error
[linux/fpc-iii.git] / drivers / spi / spi-sh-sci.c
blob8f30531e141867ca7e1350207c8cbf2b6f222914
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * SH SCI SPI interface
5 * Copyright (c) 2008 Magnus Damm
7 * Based on S3C24XX GPIO based SPI driver, which is:
8 * Copyright (c) 2006 Ben Dooks
9 * Copyright (c) 2006 Simtec Electronics
12 #include <linux/kernel.h>
13 #include <linux/delay.h>
14 #include <linux/spinlock.h>
15 #include <linux/platform_device.h>
17 #include <linux/spi/spi.h>
18 #include <linux/spi/spi_bitbang.h>
19 #include <linux/module.h>
21 #include <asm/spi.h>
22 #include <asm/io.h>
24 struct sh_sci_spi {
25 struct spi_bitbang bitbang;
27 void __iomem *membase;
28 unsigned char val;
29 struct sh_spi_info *info;
30 struct platform_device *dev;
33 #define SCSPTR(sp) (sp->membase + 0x1c)
34 #define PIN_SCK (1 << 2)
35 #define PIN_TXD (1 << 0)
36 #define PIN_RXD PIN_TXD
37 #define PIN_INIT ((1 << 1) | (1 << 3) | PIN_SCK | PIN_TXD)
39 static inline void setbits(struct sh_sci_spi *sp, int bits, int on)
42 * We are the only user of SCSPTR so no locking is required.
43 * Reading bit 2 and 0 in SCSPTR gives pin state as input.
44 * Writing the same bits sets the output value.
45 * This makes regular read-modify-write difficult so we
46 * use sp->val to keep track of the latest register value.
49 if (on)
50 sp->val |= bits;
51 else
52 sp->val &= ~bits;
54 iowrite8(sp->val, SCSPTR(sp));
57 static inline void setsck(struct spi_device *dev, int on)
59 setbits(spi_master_get_devdata(dev->master), PIN_SCK, on);
62 static inline void setmosi(struct spi_device *dev, int on)
64 setbits(spi_master_get_devdata(dev->master), PIN_TXD, on);
67 static inline u32 getmiso(struct spi_device *dev)
69 struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
71 return (ioread8(SCSPTR(sp)) & PIN_RXD) ? 1 : 0;
74 #define spidelay(x) ndelay(x)
76 #include "spi-bitbang-txrx.h"
78 static u32 sh_sci_spi_txrx_mode0(struct spi_device *spi,
79 unsigned nsecs, u32 word, u8 bits,
80 unsigned flags)
82 return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
85 static u32 sh_sci_spi_txrx_mode1(struct spi_device *spi,
86 unsigned nsecs, u32 word, u8 bits,
87 unsigned flags)
89 return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
92 static u32 sh_sci_spi_txrx_mode2(struct spi_device *spi,
93 unsigned nsecs, u32 word, u8 bits,
94 unsigned flags)
96 return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
99 static u32 sh_sci_spi_txrx_mode3(struct spi_device *spi,
100 unsigned nsecs, u32 word, u8 bits,
101 unsigned flags)
103 return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
106 static void sh_sci_spi_chipselect(struct spi_device *dev, int value)
108 struct sh_sci_spi *sp = spi_master_get_devdata(dev->master);
110 if (sp->info->chip_select)
111 (sp->info->chip_select)(sp->info, dev->chip_select, value);
114 static int sh_sci_spi_probe(struct platform_device *dev)
116 struct resource *r;
117 struct spi_master *master;
118 struct sh_sci_spi *sp;
119 int ret;
121 master = spi_alloc_master(&dev->dev, sizeof(struct sh_sci_spi));
122 if (master == NULL) {
123 dev_err(&dev->dev, "failed to allocate spi master\n");
124 ret = -ENOMEM;
125 goto err0;
128 sp = spi_master_get_devdata(master);
130 platform_set_drvdata(dev, sp);
131 sp->info = dev_get_platdata(&dev->dev);
132 if (!sp->info) {
133 dev_err(&dev->dev, "platform data is missing\n");
134 ret = -ENOENT;
135 goto err1;
138 /* setup spi bitbang adaptor */
139 sp->bitbang.master = master;
140 sp->bitbang.master->bus_num = sp->info->bus_num;
141 sp->bitbang.master->num_chipselect = sp->info->num_chipselect;
142 sp->bitbang.chipselect = sh_sci_spi_chipselect;
144 sp->bitbang.txrx_word[SPI_MODE_0] = sh_sci_spi_txrx_mode0;
145 sp->bitbang.txrx_word[SPI_MODE_1] = sh_sci_spi_txrx_mode1;
146 sp->bitbang.txrx_word[SPI_MODE_2] = sh_sci_spi_txrx_mode2;
147 sp->bitbang.txrx_word[SPI_MODE_3] = sh_sci_spi_txrx_mode3;
149 r = platform_get_resource(dev, IORESOURCE_MEM, 0);
150 if (r == NULL) {
151 ret = -ENOENT;
152 goto err1;
154 sp->membase = ioremap(r->start, resource_size(r));
155 if (!sp->membase) {
156 ret = -ENXIO;
157 goto err1;
159 sp->val = ioread8(SCSPTR(sp));
160 setbits(sp, PIN_INIT, 1);
162 ret = spi_bitbang_start(&sp->bitbang);
163 if (!ret)
164 return 0;
166 setbits(sp, PIN_INIT, 0);
167 iounmap(sp->membase);
168 err1:
169 spi_master_put(sp->bitbang.master);
170 err0:
171 return ret;
174 static int sh_sci_spi_remove(struct platform_device *dev)
176 struct sh_sci_spi *sp = platform_get_drvdata(dev);
178 spi_bitbang_stop(&sp->bitbang);
179 setbits(sp, PIN_INIT, 0);
180 iounmap(sp->membase);
181 spi_master_put(sp->bitbang.master);
182 return 0;
185 static struct platform_driver sh_sci_spi_drv = {
186 .probe = sh_sci_spi_probe,
187 .remove = sh_sci_spi_remove,
188 .driver = {
189 .name = "spi_sh_sci",
192 module_platform_driver(sh_sci_spi_drv);
194 MODULE_DESCRIPTION("SH SCI SPI Driver");
195 MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
196 MODULE_LICENSE("GPL");
197 MODULE_ALIAS("platform:spi_sh_sci");