1 // SPDX-License-Identifier: GPL-2.0
3 * Thunderbolt driver - eeprom access
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2018, Intel Corporation
9 #include <linux/crc32.h>
10 #include <linux/property.h>
11 #include <linux/slab.h>
15 * tb_eeprom_ctl_write() - write control word
17 static int tb_eeprom_ctl_write(struct tb_switch
*sw
, struct tb_eeprom_ctl
*ctl
)
19 return tb_sw_write(sw
, ctl
, TB_CFG_SWITCH
, sw
->cap_plug_events
+ 4, 1);
23 * tb_eeprom_ctl_write() - read control word
25 static int tb_eeprom_ctl_read(struct tb_switch
*sw
, struct tb_eeprom_ctl
*ctl
)
27 return tb_sw_read(sw
, ctl
, TB_CFG_SWITCH
, sw
->cap_plug_events
+ 4, 1);
30 enum tb_eeprom_transfer
{
36 * tb_eeprom_active - enable rom access
38 * WARNING: Always disable access after usage. Otherwise the controller will
41 static int tb_eeprom_active(struct tb_switch
*sw
, bool enable
)
43 struct tb_eeprom_ctl ctl
;
44 int res
= tb_eeprom_ctl_read(sw
, &ctl
);
49 res
= tb_eeprom_ctl_write(sw
, &ctl
);
53 return tb_eeprom_ctl_write(sw
, &ctl
);
56 res
= tb_eeprom_ctl_write(sw
, &ctl
);
60 return tb_eeprom_ctl_write(sw
, &ctl
);
65 * tb_eeprom_transfer - transfer one bit
67 * If TB_EEPROM_IN is passed, then the bit can be retrieved from ctl->data_in.
68 * If TB_EEPROM_OUT is passed, then ctl->data_out will be written.
70 static int tb_eeprom_transfer(struct tb_switch
*sw
, struct tb_eeprom_ctl
*ctl
,
71 enum tb_eeprom_transfer direction
)
74 if (direction
== TB_EEPROM_OUT
) {
75 res
= tb_eeprom_ctl_write(sw
, ctl
);
80 res
= tb_eeprom_ctl_write(sw
, ctl
);
83 if (direction
== TB_EEPROM_IN
) {
84 res
= tb_eeprom_ctl_read(sw
, ctl
);
89 return tb_eeprom_ctl_write(sw
, ctl
);
93 * tb_eeprom_out - write one byte to the bus
95 static int tb_eeprom_out(struct tb_switch
*sw
, u8 val
)
97 struct tb_eeprom_ctl ctl
;
99 int res
= tb_eeprom_ctl_read(sw
, &ctl
);
102 for (i
= 0; i
< 8; i
++) {
103 ctl
.data_out
= val
& 0x80;
104 res
= tb_eeprom_transfer(sw
, &ctl
, TB_EEPROM_OUT
);
113 * tb_eeprom_in - read one byte from the bus
115 static int tb_eeprom_in(struct tb_switch
*sw
, u8
*val
)
117 struct tb_eeprom_ctl ctl
;
119 int res
= tb_eeprom_ctl_read(sw
, &ctl
);
123 for (i
= 0; i
< 8; i
++) {
125 res
= tb_eeprom_transfer(sw
, &ctl
, TB_EEPROM_IN
);
134 * tb_eeprom_get_drom_offset - get drom offset within eeprom
136 static int tb_eeprom_get_drom_offset(struct tb_switch
*sw
, u16
*offset
)
138 struct tb_cap_plug_events cap
;
141 if (!sw
->cap_plug_events
) {
142 tb_sw_warn(sw
, "no TB_CAP_PLUG_EVENTS, cannot read eeprom\n");
145 res
= tb_sw_read(sw
, &cap
, TB_CFG_SWITCH
, sw
->cap_plug_events
,
150 if (!cap
.eeprom_ctl
.present
|| cap
.eeprom_ctl
.not_present
) {
151 tb_sw_warn(sw
, "no NVM\n");
155 if (cap
.drom_offset
> 0xffff) {
156 tb_sw_warn(sw
, "drom offset is larger than 0xffff: %#x\n",
160 *offset
= cap
.drom_offset
;
165 * tb_eeprom_read_n - read count bytes from offset into val
167 static int tb_eeprom_read_n(struct tb_switch
*sw
, u16 offset
, u8
*val
,
173 res
= tb_eeprom_get_drom_offset(sw
, &drom_offset
);
177 offset
+= drom_offset
;
179 res
= tb_eeprom_active(sw
, true);
182 res
= tb_eeprom_out(sw
, 3);
185 res
= tb_eeprom_out(sw
, offset
>> 8);
188 res
= tb_eeprom_out(sw
, offset
);
191 for (i
= 0; i
< count
; i
++) {
192 res
= tb_eeprom_in(sw
, val
+ i
);
196 return tb_eeprom_active(sw
, false);
199 static u8
tb_crc8(u8
*data
, int len
)
203 for (i
= 0; i
< len
; i
++) {
205 for (j
= 0; j
< 8; j
++)
206 val
= (val
<< 1) ^ ((val
& 0x80) ? 7 : 0);
211 static u32
tb_crc32(void *data
, size_t len
)
213 return ~__crc32c_le(~0, data
, len
);
216 #define TB_DROM_DATA_START 13
217 struct tb_drom_header
{
219 u8 uid_crc8
; /* checksum for uid */
223 u32 data_crc32
; /* checksum for data_len bytes starting at byte 13 */
225 u8 device_rom_revision
; /* should be <= 1 */
235 enum tb_drom_entry_type
{
236 /* force unsigned to prevent "one-bit signed bitfield" warning */
237 TB_DROM_ENTRY_GENERIC
= 0U,
241 struct tb_drom_entry_header
{
244 bool port_disabled
:1; /* only valid if type is TB_DROM_ENTRY_PORT */
245 enum tb_drom_entry_type type
:1;
248 struct tb_drom_entry_generic
{
249 struct tb_drom_entry_header header
;
253 struct tb_drom_entry_port
{
255 struct tb_drom_entry_header header
;
257 u8 dual_link_port_rid
:4;
260 bool has_dual_link_port
:1;
263 u8 dual_link_port_nr
:6;
266 /* BYTES 4 - 5 TODO decode */
271 /* BYTES 6-7, TODO: verify (find hardware that has these set) */
274 bool has_peer_port
:1;
281 * tb_drom_read_uid_only - read uid directly from drom
283 * Does not use the cached copy in sw->drom. Used during resume to check switch
286 int tb_drom_read_uid_only(struct tb_switch
*sw
, u64
*uid
)
293 res
= tb_eeprom_read_n(sw
, 0, data
, 9);
297 crc
= tb_crc8(data
+ 1, 8);
298 if (crc
!= data
[0]) {
299 tb_sw_warn(sw
, "uid crc8 mismatch (expected: %#x, got: %#x)\n",
304 *uid
= *(u64
*)(data
+1);
308 static int tb_drom_parse_entry_generic(struct tb_switch
*sw
,
309 struct tb_drom_entry_header
*header
)
311 const struct tb_drom_entry_generic
*entry
=
312 (const struct tb_drom_entry_generic
*)header
;
314 switch (header
->index
) {
316 /* Length includes 2 bytes header so remove it before copy */
317 sw
->vendor_name
= kstrndup(entry
->data
,
318 header
->len
- sizeof(*header
), GFP_KERNEL
);
319 if (!sw
->vendor_name
)
324 sw
->device_name
= kstrndup(entry
->data
,
325 header
->len
- sizeof(*header
), GFP_KERNEL
);
326 if (!sw
->device_name
)
334 static int tb_drom_parse_entry_port(struct tb_switch
*sw
,
335 struct tb_drom_entry_header
*header
)
337 struct tb_port
*port
;
339 enum tb_port_type type
;
342 * Some DROMs list more ports than the controller actually has
343 * so we skip those but allow the parser to continue.
345 if (header
->index
> sw
->config
.max_port_number
) {
346 dev_info_once(&sw
->dev
, "ignoring unnecessary extra entries in DROM\n");
350 port
= &sw
->ports
[header
->index
];
351 port
->disabled
= header
->port_disabled
;
355 res
= tb_port_read(port
, &type
, TB_CFG_PORT
, 2, 1);
360 if (type
== TB_TYPE_PORT
) {
361 struct tb_drom_entry_port
*entry
= (void *) header
;
362 if (header
->len
!= sizeof(*entry
)) {
364 "port entry has size %#x (expected %#zx)\n",
365 header
->len
, sizeof(struct tb_drom_entry_port
));
368 port
->link_nr
= entry
->link_nr
;
369 if (entry
->has_dual_link_port
)
370 port
->dual_link_port
=
371 &port
->sw
->ports
[entry
->dual_link_port_nr
];
377 * tb_drom_parse_entries - parse the linked list of drom entries
379 * Drom must have been copied to sw->drom.
381 static int tb_drom_parse_entries(struct tb_switch
*sw
)
383 struct tb_drom_header
*header
= (void *) sw
->drom
;
384 u16 pos
= sizeof(*header
);
385 u16 drom_size
= header
->data_len
+ TB_DROM_DATA_START
;
388 while (pos
< drom_size
) {
389 struct tb_drom_entry_header
*entry
= (void *) (sw
->drom
+ pos
);
390 if (pos
+ 1 == drom_size
|| pos
+ entry
->len
> drom_size
392 tb_sw_warn(sw
, "drom buffer overrun, aborting\n");
396 switch (entry
->type
) {
397 case TB_DROM_ENTRY_GENERIC
:
398 res
= tb_drom_parse_entry_generic(sw
, entry
);
400 case TB_DROM_ENTRY_PORT
:
401 res
= tb_drom_parse_entry_port(sw
, entry
);
413 * tb_drom_copy_efi - copy drom supplied by EFI to sw->drom if present
415 static int tb_drom_copy_efi(struct tb_switch
*sw
, u16
*size
)
417 struct device
*dev
= &sw
->tb
->nhi
->pdev
->dev
;
420 len
= device_property_count_u8(dev
, "ThunderboltDROM");
421 if (len
< 0 || len
< sizeof(struct tb_drom_header
))
424 sw
->drom
= kmalloc(len
, GFP_KERNEL
);
428 res
= device_property_read_u8_array(dev
, "ThunderboltDROM", sw
->drom
,
433 *size
= ((struct tb_drom_header
*)sw
->drom
)->data_len
+
446 static int tb_drom_copy_nvm(struct tb_switch
*sw
, u16
*size
)
454 ret
= tb_sw_read(sw
, &drom_offset
, TB_CFG_SWITCH
,
455 sw
->cap_plug_events
+ 12, 1);
462 ret
= dma_port_flash_read(sw
->dma_port
, drom_offset
+ 14, size
,
467 /* Size includes CRC8 + UID + CRC32 */
469 sw
->drom
= kzalloc(*size
, GFP_KERNEL
);
473 ret
= dma_port_flash_read(sw
->dma_port
, drom_offset
, sw
->drom
, *size
);
478 * Read UID from the minimal DROM because the one in NVM is just
481 tb_drom_read_uid_only(sw
, &sw
->uid
);
490 static int usb4_copy_host_drom(struct tb_switch
*sw
, u16
*size
)
494 ret
= usb4_switch_drom_read(sw
, 14, size
, sizeof(*size
));
498 /* Size includes CRC8 + UID + CRC32 */
500 sw
->drom
= kzalloc(*size
, GFP_KERNEL
);
504 ret
= usb4_switch_drom_read(sw
, 0, sw
->drom
, *size
);
513 static int tb_drom_read_n(struct tb_switch
*sw
, u16 offset
, u8
*val
,
516 if (tb_switch_is_usb4(sw
))
517 return usb4_switch_drom_read(sw
, offset
, val
, count
);
518 return tb_eeprom_read_n(sw
, offset
, val
, count
);
522 * tb_drom_read - copy drom to sw->drom and parse it
524 int tb_drom_read(struct tb_switch
*sw
)
528 struct tb_drom_header
*header
;
533 if (tb_route(sw
) == 0) {
535 * Apple's NHI EFI driver supplies a DROM for the root switch
536 * in a device property. Use it if available.
538 if (tb_drom_copy_efi(sw
, &size
) == 0)
541 /* Non-Apple hardware has the DROM as part of NVM */
542 if (tb_drom_copy_nvm(sw
, &size
) == 0)
546 * USB4 hosts may support reading DROM through router
549 if (tb_switch_is_usb4(sw
)) {
550 usb4_switch_read_uid(sw
, &sw
->uid
);
551 if (!usb4_copy_host_drom(sw
, &size
))
555 * The root switch contains only a dummy drom
556 * (header only, no entries). Hardcode the
557 * configuration here.
559 tb_drom_read_uid_only(sw
, &sw
->uid
);
565 res
= tb_drom_read_n(sw
, 14, (u8
*) &size
, 2);
569 size
+= TB_DROM_DATA_START
;
570 tb_sw_dbg(sw
, "reading drom (length: %#x)\n", size
);
571 if (size
< sizeof(*header
)) {
572 tb_sw_warn(sw
, "drom too small, aborting\n");
576 sw
->drom
= kzalloc(size
, GFP_KERNEL
);
579 res
= tb_drom_read_n(sw
, 0, sw
->drom
, size
);
584 header
= (void *) sw
->drom
;
586 if (header
->data_len
+ TB_DROM_DATA_START
!= size
) {
587 tb_sw_warn(sw
, "drom size mismatch, aborting\n");
591 crc
= tb_crc8((u8
*) &header
->uid
, 8);
592 if (crc
!= header
->uid_crc8
) {
594 "drom uid crc8 mismatch (expected: %#x, got: %#x), aborting\n",
595 header
->uid_crc8
, crc
);
599 sw
->uid
= header
->uid
;
600 sw
->vendor
= header
->vendor_id
;
601 sw
->device
= header
->model_id
;
603 crc
= tb_crc32(sw
->drom
+ TB_DROM_DATA_START
, header
->data_len
);
604 if (crc
!= header
->data_crc32
) {
606 "drom data crc32 mismatch (expected: %#x, got: %#x), continuing\n",
607 header
->data_crc32
, crc
);
610 if (header
->device_rom_revision
> 2)
611 tb_sw_warn(sw
, "drom device_rom_revision %#x unknown\n",
612 header
->device_rom_revision
);
614 return tb_drom_parse_entries(sw
);