1 // SPDX-License-Identifier: GPL-2.0-only
3 * Thunderbolt driver - NHI driver
5 * The NHI (native host interface) is the pci device that allows us to send and
6 * receive frames from the thunderbolt bus.
8 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
9 * Copyright (C) 2018, Intel Corporation
12 #include <linux/pm_runtime.h>
13 #include <linux/slab.h>
14 #include <linux/errno.h>
15 #include <linux/pci.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18 #include <linux/delay.h>
19 #include <linux/property.h>
25 #define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring")
28 * Used to enable end-to-end workaround for missing RX packets. Do not
29 * use this ring for anything else.
31 #define RING_E2E_UNUSED_HOPID 2
32 #define RING_FIRST_USABLE_HOPID TB_PATH_MIN_HOPID
35 * Minimal number of vectors when we use MSI-X. Two for control channel
36 * Rx/Tx and the rest four are for cross domain DMA paths.
38 #define MSIX_MIN_VECS 6
39 #define MSIX_MAX_VECS 16
41 #define NHI_MAILBOX_TIMEOUT 500 /* ms */
43 static int ring_interrupt_index(struct tb_ring
*ring
)
47 bit
+= ring
->nhi
->hop_count
;
52 * ring_interrupt_active() - activate/deactivate interrupts for a single ring
54 * ring->nhi->lock must be held.
56 static void ring_interrupt_active(struct tb_ring
*ring
, bool active
)
58 int reg
= REG_RING_INTERRUPT_BASE
+
59 ring_interrupt_index(ring
) / 32 * 4;
60 int bit
= ring_interrupt_index(ring
) & 31;
65 u32 step
, shift
, ivr
, misc
;
66 void __iomem
*ivr_base
;
72 index
= ring
->hop
+ ring
->nhi
->hop_count
;
75 * Ask the hardware to clear interrupt status bits automatically
76 * since we already know which interrupt was triggered.
78 misc
= ioread32(ring
->nhi
->iobase
+ REG_DMA_MISC
);
79 if (!(misc
& REG_DMA_MISC_INT_AUTO_CLEAR
)) {
80 misc
|= REG_DMA_MISC_INT_AUTO_CLEAR
;
81 iowrite32(misc
, ring
->nhi
->iobase
+ REG_DMA_MISC
);
84 ivr_base
= ring
->nhi
->iobase
+ REG_INT_VEC_ALLOC_BASE
;
85 step
= index
/ REG_INT_VEC_ALLOC_REGS
* REG_INT_VEC_ALLOC_BITS
;
86 shift
= index
% REG_INT_VEC_ALLOC_REGS
* REG_INT_VEC_ALLOC_BITS
;
87 ivr
= ioread32(ivr_base
+ step
);
88 ivr
&= ~(REG_INT_VEC_ALLOC_MASK
<< shift
);
90 ivr
|= ring
->vector
<< shift
;
91 iowrite32(ivr
, ivr_base
+ step
);
94 old
= ioread32(ring
->nhi
->iobase
+ reg
);
100 dev_dbg(&ring
->nhi
->pdev
->dev
,
101 "%s interrupt at register %#x bit %d (%#x -> %#x)\n",
102 active
? "enabling" : "disabling", reg
, bit
, old
, new);
105 dev_WARN(&ring
->nhi
->pdev
->dev
,
106 "interrupt for %s %d is already %s\n",
107 RING_TYPE(ring
), ring
->hop
,
108 active
? "enabled" : "disabled");
109 iowrite32(new, ring
->nhi
->iobase
+ reg
);
113 * nhi_disable_interrupts() - disable interrupts for all rings
115 * Use only during init and shutdown.
117 static void nhi_disable_interrupts(struct tb_nhi
*nhi
)
120 /* disable interrupts */
121 for (i
= 0; i
< RING_INTERRUPT_REG_COUNT(nhi
); i
++)
122 iowrite32(0, nhi
->iobase
+ REG_RING_INTERRUPT_BASE
+ 4 * i
);
124 /* clear interrupt status bits */
125 for (i
= 0; i
< RING_NOTIFY_REG_COUNT(nhi
); i
++)
126 ioread32(nhi
->iobase
+ REG_RING_NOTIFY_BASE
+ 4 * i
);
129 /* ring helper methods */
131 static void __iomem
*ring_desc_base(struct tb_ring
*ring
)
133 void __iomem
*io
= ring
->nhi
->iobase
;
134 io
+= ring
->is_tx
? REG_TX_RING_BASE
: REG_RX_RING_BASE
;
135 io
+= ring
->hop
* 16;
139 static void __iomem
*ring_options_base(struct tb_ring
*ring
)
141 void __iomem
*io
= ring
->nhi
->iobase
;
142 io
+= ring
->is_tx
? REG_TX_OPTIONS_BASE
: REG_RX_OPTIONS_BASE
;
143 io
+= ring
->hop
* 32;
147 static void ring_iowrite_cons(struct tb_ring
*ring
, u16 cons
)
150 * The other 16-bits in the register is read-only and writes to it
151 * are ignored by the hardware so we can save one ioread32() by
152 * filling the read-only bits with zeroes.
154 iowrite32(cons
, ring_desc_base(ring
) + 8);
157 static void ring_iowrite_prod(struct tb_ring
*ring
, u16 prod
)
159 /* See ring_iowrite_cons() above for explanation */
160 iowrite32(prod
<< 16, ring_desc_base(ring
) + 8);
163 static void ring_iowrite32desc(struct tb_ring
*ring
, u32 value
, u32 offset
)
165 iowrite32(value
, ring_desc_base(ring
) + offset
);
168 static void ring_iowrite64desc(struct tb_ring
*ring
, u64 value
, u32 offset
)
170 iowrite32(value
, ring_desc_base(ring
) + offset
);
171 iowrite32(value
>> 32, ring_desc_base(ring
) + offset
+ 4);
174 static void ring_iowrite32options(struct tb_ring
*ring
, u32 value
, u32 offset
)
176 iowrite32(value
, ring_options_base(ring
) + offset
);
179 static bool ring_full(struct tb_ring
*ring
)
181 return ((ring
->head
+ 1) % ring
->size
) == ring
->tail
;
184 static bool ring_empty(struct tb_ring
*ring
)
186 return ring
->head
== ring
->tail
;
190 * ring_write_descriptors() - post frames from ring->queue to the controller
192 * ring->lock is held.
194 static void ring_write_descriptors(struct tb_ring
*ring
)
196 struct ring_frame
*frame
, *n
;
197 struct ring_desc
*descriptor
;
198 list_for_each_entry_safe(frame
, n
, &ring
->queue
, list
) {
201 list_move_tail(&frame
->list
, &ring
->in_flight
);
202 descriptor
= &ring
->descriptors
[ring
->head
];
203 descriptor
->phys
= frame
->buffer_phy
;
204 descriptor
->time
= 0;
205 descriptor
->flags
= RING_DESC_POSTED
| RING_DESC_INTERRUPT
;
207 descriptor
->length
= frame
->size
;
208 descriptor
->eof
= frame
->eof
;
209 descriptor
->sof
= frame
->sof
;
211 ring
->head
= (ring
->head
+ 1) % ring
->size
;
213 ring_iowrite_prod(ring
, ring
->head
);
215 ring_iowrite_cons(ring
, ring
->head
);
220 * ring_work() - progress completed frames
222 * If the ring is shutting down then all frames are marked as canceled and
223 * their callbacks are invoked.
225 * Otherwise we collect all completed frame from the ring buffer, write new
226 * frame to the ring buffer and invoke the callbacks for the completed frames.
228 static void ring_work(struct work_struct
*work
)
230 struct tb_ring
*ring
= container_of(work
, typeof(*ring
), work
);
231 struct ring_frame
*frame
;
232 bool canceled
= false;
236 spin_lock_irqsave(&ring
->lock
, flags
);
238 if (!ring
->running
) {
239 /* Move all frames to done and mark them as canceled. */
240 list_splice_tail_init(&ring
->in_flight
, &done
);
241 list_splice_tail_init(&ring
->queue
, &done
);
243 goto invoke_callback
;
246 while (!ring_empty(ring
)) {
247 if (!(ring
->descriptors
[ring
->tail
].flags
248 & RING_DESC_COMPLETED
))
250 frame
= list_first_entry(&ring
->in_flight
, typeof(*frame
),
252 list_move_tail(&frame
->list
, &done
);
254 frame
->size
= ring
->descriptors
[ring
->tail
].length
;
255 frame
->eof
= ring
->descriptors
[ring
->tail
].eof
;
256 frame
->sof
= ring
->descriptors
[ring
->tail
].sof
;
257 frame
->flags
= ring
->descriptors
[ring
->tail
].flags
;
259 ring
->tail
= (ring
->tail
+ 1) % ring
->size
;
261 ring_write_descriptors(ring
);
264 /* allow callbacks to schedule new work */
265 spin_unlock_irqrestore(&ring
->lock
, flags
);
266 while (!list_empty(&done
)) {
267 frame
= list_first_entry(&done
, typeof(*frame
), list
);
269 * The callback may reenqueue or delete frame.
270 * Do not hold on to it.
272 list_del_init(&frame
->list
);
274 frame
->callback(ring
, frame
, canceled
);
278 int __tb_ring_enqueue(struct tb_ring
*ring
, struct ring_frame
*frame
)
283 spin_lock_irqsave(&ring
->lock
, flags
);
285 list_add_tail(&frame
->list
, &ring
->queue
);
286 ring_write_descriptors(ring
);
290 spin_unlock_irqrestore(&ring
->lock
, flags
);
293 EXPORT_SYMBOL_GPL(__tb_ring_enqueue
);
296 * tb_ring_poll() - Poll one completed frame from the ring
297 * @ring: Ring to poll
299 * This function can be called when @start_poll callback of the @ring
300 * has been called. It will read one completed frame from the ring and
301 * return it to the caller. Returns %NULL if there is no more completed
304 struct ring_frame
*tb_ring_poll(struct tb_ring
*ring
)
306 struct ring_frame
*frame
= NULL
;
309 spin_lock_irqsave(&ring
->lock
, flags
);
312 if (ring_empty(ring
))
315 if (ring
->descriptors
[ring
->tail
].flags
& RING_DESC_COMPLETED
) {
316 frame
= list_first_entry(&ring
->in_flight
, typeof(*frame
),
318 list_del_init(&frame
->list
);
321 frame
->size
= ring
->descriptors
[ring
->tail
].length
;
322 frame
->eof
= ring
->descriptors
[ring
->tail
].eof
;
323 frame
->sof
= ring
->descriptors
[ring
->tail
].sof
;
324 frame
->flags
= ring
->descriptors
[ring
->tail
].flags
;
327 ring
->tail
= (ring
->tail
+ 1) % ring
->size
;
331 spin_unlock_irqrestore(&ring
->lock
, flags
);
334 EXPORT_SYMBOL_GPL(tb_ring_poll
);
336 static void __ring_interrupt_mask(struct tb_ring
*ring
, bool mask
)
338 int idx
= ring_interrupt_index(ring
);
339 int reg
= REG_RING_INTERRUPT_BASE
+ idx
/ 32 * 4;
343 val
= ioread32(ring
->nhi
->iobase
+ reg
);
348 iowrite32(val
, ring
->nhi
->iobase
+ reg
);
351 /* Both @nhi->lock and @ring->lock should be held */
352 static void __ring_interrupt(struct tb_ring
*ring
)
357 if (ring
->start_poll
) {
358 __ring_interrupt_mask(ring
, true);
359 ring
->start_poll(ring
->poll_data
);
361 schedule_work(&ring
->work
);
366 * tb_ring_poll_complete() - Re-start interrupt for the ring
367 * @ring: Ring to re-start the interrupt
369 * This will re-start (unmask) the ring interrupt once the user is done
372 void tb_ring_poll_complete(struct tb_ring
*ring
)
376 spin_lock_irqsave(&ring
->nhi
->lock
, flags
);
377 spin_lock(&ring
->lock
);
378 if (ring
->start_poll
)
379 __ring_interrupt_mask(ring
, false);
380 spin_unlock(&ring
->lock
);
381 spin_unlock_irqrestore(&ring
->nhi
->lock
, flags
);
383 EXPORT_SYMBOL_GPL(tb_ring_poll_complete
);
385 static irqreturn_t
ring_msix(int irq
, void *data
)
387 struct tb_ring
*ring
= data
;
389 spin_lock(&ring
->nhi
->lock
);
390 spin_lock(&ring
->lock
);
391 __ring_interrupt(ring
);
392 spin_unlock(&ring
->lock
);
393 spin_unlock(&ring
->nhi
->lock
);
398 static int ring_request_msix(struct tb_ring
*ring
, bool no_suspend
)
400 struct tb_nhi
*nhi
= ring
->nhi
;
401 unsigned long irqflags
;
404 if (!nhi
->pdev
->msix_enabled
)
407 ret
= ida_simple_get(&nhi
->msix_ida
, 0, MSIX_MAX_VECS
, GFP_KERNEL
);
413 ring
->irq
= pci_irq_vector(ring
->nhi
->pdev
, ring
->vector
);
417 irqflags
= no_suspend
? IRQF_NO_SUSPEND
: 0;
418 return request_irq(ring
->irq
, ring_msix
, irqflags
, "thunderbolt", ring
);
421 static void ring_release_msix(struct tb_ring
*ring
)
426 free_irq(ring
->irq
, ring
);
427 ida_simple_remove(&ring
->nhi
->msix_ida
, ring
->vector
);
432 static int nhi_alloc_hop(struct tb_nhi
*nhi
, struct tb_ring
*ring
)
436 spin_lock_irq(&nhi
->lock
);
442 * Automatically allocate HopID from the non-reserved
443 * range 8 .. hop_count - 1.
445 for (i
= RING_FIRST_USABLE_HOPID
; i
< nhi
->hop_count
; i
++) {
447 if (!nhi
->tx_rings
[i
]) {
452 if (!nhi
->rx_rings
[i
]) {
460 if (ring
->hop
< 0 || ring
->hop
>= nhi
->hop_count
) {
461 dev_warn(&nhi
->pdev
->dev
, "invalid hop: %d\n", ring
->hop
);
465 if (ring
->is_tx
&& nhi
->tx_rings
[ring
->hop
]) {
466 dev_warn(&nhi
->pdev
->dev
, "TX hop %d already allocated\n",
470 } else if (!ring
->is_tx
&& nhi
->rx_rings
[ring
->hop
]) {
471 dev_warn(&nhi
->pdev
->dev
, "RX hop %d already allocated\n",
478 nhi
->tx_rings
[ring
->hop
] = ring
;
480 nhi
->rx_rings
[ring
->hop
] = ring
;
483 spin_unlock_irq(&nhi
->lock
);
488 static struct tb_ring
*tb_ring_alloc(struct tb_nhi
*nhi
, u32 hop
, int size
,
489 bool transmit
, unsigned int flags
,
490 u16 sof_mask
, u16 eof_mask
,
491 void (*start_poll
)(void *),
494 struct tb_ring
*ring
= NULL
;
496 dev_dbg(&nhi
->pdev
->dev
, "allocating %s ring %d of size %d\n",
497 transmit
? "TX" : "RX", hop
, size
);
499 /* Tx Ring 2 is reserved for E2E workaround */
500 if (transmit
&& hop
== RING_E2E_UNUSED_HOPID
)
503 ring
= kzalloc(sizeof(*ring
), GFP_KERNEL
);
507 spin_lock_init(&ring
->lock
);
508 INIT_LIST_HEAD(&ring
->queue
);
509 INIT_LIST_HEAD(&ring
->in_flight
);
510 INIT_WORK(&ring
->work
, ring_work
);
514 ring
->is_tx
= transmit
;
517 ring
->sof_mask
= sof_mask
;
518 ring
->eof_mask
= eof_mask
;
521 ring
->running
= false;
522 ring
->start_poll
= start_poll
;
523 ring
->poll_data
= poll_data
;
525 ring
->descriptors
= dma_alloc_coherent(&ring
->nhi
->pdev
->dev
,
526 size
* sizeof(*ring
->descriptors
),
527 &ring
->descriptors_dma
, GFP_KERNEL
| __GFP_ZERO
);
528 if (!ring
->descriptors
)
531 if (ring_request_msix(ring
, flags
& RING_FLAG_NO_SUSPEND
))
534 if (nhi_alloc_hop(nhi
, ring
))
535 goto err_release_msix
;
540 ring_release_msix(ring
);
542 dma_free_coherent(&ring
->nhi
->pdev
->dev
,
543 ring
->size
* sizeof(*ring
->descriptors
),
544 ring
->descriptors
, ring
->descriptors_dma
);
552 * tb_ring_alloc_tx() - Allocate DMA ring for transmit
553 * @nhi: Pointer to the NHI the ring is to be allocated
554 * @hop: HopID (ring) to allocate
555 * @size: Number of entries in the ring
556 * @flags: Flags for the ring
558 struct tb_ring
*tb_ring_alloc_tx(struct tb_nhi
*nhi
, int hop
, int size
,
561 return tb_ring_alloc(nhi
, hop
, size
, true, flags
, 0, 0, NULL
, NULL
);
563 EXPORT_SYMBOL_GPL(tb_ring_alloc_tx
);
566 * tb_ring_alloc_rx() - Allocate DMA ring for receive
567 * @nhi: Pointer to the NHI the ring is to be allocated
568 * @hop: HopID (ring) to allocate. Pass %-1 for automatic allocation.
569 * @size: Number of entries in the ring
570 * @flags: Flags for the ring
571 * @sof_mask: Mask of PDF values that start a frame
572 * @eof_mask: Mask of PDF values that end a frame
573 * @start_poll: If not %NULL the ring will call this function when an
574 * interrupt is triggered and masked, instead of callback
576 * @poll_data: Optional data passed to @start_poll
578 struct tb_ring
*tb_ring_alloc_rx(struct tb_nhi
*nhi
, int hop
, int size
,
579 unsigned int flags
, u16 sof_mask
, u16 eof_mask
,
580 void (*start_poll
)(void *), void *poll_data
)
582 return tb_ring_alloc(nhi
, hop
, size
, false, flags
, sof_mask
, eof_mask
,
583 start_poll
, poll_data
);
585 EXPORT_SYMBOL_GPL(tb_ring_alloc_rx
);
588 * tb_ring_start() - enable a ring
590 * Must not be invoked in parallel with tb_ring_stop().
592 void tb_ring_start(struct tb_ring
*ring
)
597 spin_lock_irq(&ring
->nhi
->lock
);
598 spin_lock(&ring
->lock
);
599 if (ring
->nhi
->going_away
)
602 dev_WARN(&ring
->nhi
->pdev
->dev
, "ring already started\n");
605 dev_dbg(&ring
->nhi
->pdev
->dev
, "starting %s %d\n",
606 RING_TYPE(ring
), ring
->hop
);
608 if (ring
->flags
& RING_FLAG_FRAME
) {
611 flags
= RING_FLAG_ENABLE
;
613 frame_size
= TB_FRAME_SIZE
;
614 flags
= RING_FLAG_ENABLE
| RING_FLAG_RAW
;
617 if (ring
->flags
& RING_FLAG_E2E
&& !ring
->is_tx
) {
621 * In order not to lose Rx packets we enable end-to-end
622 * workaround which transfers Rx credits to an unused Tx
625 hop
= RING_E2E_UNUSED_HOPID
<< REG_RX_OPTIONS_E2E_HOP_SHIFT
;
626 hop
&= REG_RX_OPTIONS_E2E_HOP_MASK
;
627 flags
|= hop
| RING_FLAG_E2E_FLOW_CONTROL
;
630 ring_iowrite64desc(ring
, ring
->descriptors_dma
, 0);
632 ring_iowrite32desc(ring
, ring
->size
, 12);
633 ring_iowrite32options(ring
, 0, 4); /* time releated ? */
634 ring_iowrite32options(ring
, flags
, 0);
636 u32 sof_eof_mask
= ring
->sof_mask
<< 16 | ring
->eof_mask
;
638 ring_iowrite32desc(ring
, (frame_size
<< 16) | ring
->size
, 12);
639 ring_iowrite32options(ring
, sof_eof_mask
, 4);
640 ring_iowrite32options(ring
, flags
, 0);
642 ring_interrupt_active(ring
, true);
643 ring
->running
= true;
645 spin_unlock(&ring
->lock
);
646 spin_unlock_irq(&ring
->nhi
->lock
);
648 EXPORT_SYMBOL_GPL(tb_ring_start
);
651 * tb_ring_stop() - shutdown a ring
653 * Must not be invoked from a callback.
655 * This method will disable the ring. Further calls to
656 * tb_ring_tx/tb_ring_rx will return -ESHUTDOWN until ring_stop has been
659 * All enqueued frames will be canceled and their callbacks will be executed
660 * with frame->canceled set to true (on the callback thread). This method
661 * returns only after all callback invocations have finished.
663 void tb_ring_stop(struct tb_ring
*ring
)
665 spin_lock_irq(&ring
->nhi
->lock
);
666 spin_lock(&ring
->lock
);
667 dev_dbg(&ring
->nhi
->pdev
->dev
, "stopping %s %d\n",
668 RING_TYPE(ring
), ring
->hop
);
669 if (ring
->nhi
->going_away
)
671 if (!ring
->running
) {
672 dev_WARN(&ring
->nhi
->pdev
->dev
, "%s %d already stopped\n",
673 RING_TYPE(ring
), ring
->hop
);
676 ring_interrupt_active(ring
, false);
678 ring_iowrite32options(ring
, 0, 0);
679 ring_iowrite64desc(ring
, 0, 0);
680 ring_iowrite32desc(ring
, 0, 8);
681 ring_iowrite32desc(ring
, 0, 12);
684 ring
->running
= false;
687 spin_unlock(&ring
->lock
);
688 spin_unlock_irq(&ring
->nhi
->lock
);
691 * schedule ring->work to invoke callbacks on all remaining frames.
693 schedule_work(&ring
->work
);
694 flush_work(&ring
->work
);
696 EXPORT_SYMBOL_GPL(tb_ring_stop
);
699 * tb_ring_free() - free ring
701 * When this method returns all invocations of ring->callback will have
704 * Ring must be stopped.
706 * Must NOT be called from ring_frame->callback!
708 void tb_ring_free(struct tb_ring
*ring
)
710 spin_lock_irq(&ring
->nhi
->lock
);
712 * Dissociate the ring from the NHI. This also ensures that
713 * nhi_interrupt_work cannot reschedule ring->work.
716 ring
->nhi
->tx_rings
[ring
->hop
] = NULL
;
718 ring
->nhi
->rx_rings
[ring
->hop
] = NULL
;
721 dev_WARN(&ring
->nhi
->pdev
->dev
, "%s %d still running\n",
722 RING_TYPE(ring
), ring
->hop
);
724 spin_unlock_irq(&ring
->nhi
->lock
);
726 ring_release_msix(ring
);
728 dma_free_coherent(&ring
->nhi
->pdev
->dev
,
729 ring
->size
* sizeof(*ring
->descriptors
),
730 ring
->descriptors
, ring
->descriptors_dma
);
732 ring
->descriptors
= NULL
;
733 ring
->descriptors_dma
= 0;
736 dev_dbg(&ring
->nhi
->pdev
->dev
, "freeing %s %d\n", RING_TYPE(ring
),
740 * ring->work can no longer be scheduled (it is scheduled only
741 * by nhi_interrupt_work, ring_stop and ring_msix). Wait for it
742 * to finish before freeing the ring.
744 flush_work(&ring
->work
);
747 EXPORT_SYMBOL_GPL(tb_ring_free
);
750 * nhi_mailbox_cmd() - Send a command through NHI mailbox
751 * @nhi: Pointer to the NHI structure
752 * @cmd: Command to send
753 * @data: Data to be send with the command
755 * Sends mailbox command to the firmware running on NHI. Returns %0 in
756 * case of success and negative errno in case of failure.
758 int nhi_mailbox_cmd(struct tb_nhi
*nhi
, enum nhi_mailbox_cmd cmd
, u32 data
)
763 iowrite32(data
, nhi
->iobase
+ REG_INMAIL_DATA
);
765 val
= ioread32(nhi
->iobase
+ REG_INMAIL_CMD
);
766 val
&= ~(REG_INMAIL_CMD_MASK
| REG_INMAIL_ERROR
);
767 val
|= REG_INMAIL_OP_REQUEST
| cmd
;
768 iowrite32(val
, nhi
->iobase
+ REG_INMAIL_CMD
);
770 timeout
= ktime_add_ms(ktime_get(), NHI_MAILBOX_TIMEOUT
);
772 val
= ioread32(nhi
->iobase
+ REG_INMAIL_CMD
);
773 if (!(val
& REG_INMAIL_OP_REQUEST
))
775 usleep_range(10, 20);
776 } while (ktime_before(ktime_get(), timeout
));
778 if (val
& REG_INMAIL_OP_REQUEST
)
780 if (val
& REG_INMAIL_ERROR
)
787 * nhi_mailbox_mode() - Return current firmware operation mode
788 * @nhi: Pointer to the NHI structure
790 * The function reads current firmware operation mode using NHI mailbox
791 * registers and returns it to the caller.
793 enum nhi_fw_mode
nhi_mailbox_mode(struct tb_nhi
*nhi
)
797 val
= ioread32(nhi
->iobase
+ REG_OUTMAIL_CMD
);
798 val
&= REG_OUTMAIL_CMD_OPMODE_MASK
;
799 val
>>= REG_OUTMAIL_CMD_OPMODE_SHIFT
;
801 return (enum nhi_fw_mode
)val
;
804 static void nhi_interrupt_work(struct work_struct
*work
)
806 struct tb_nhi
*nhi
= container_of(work
, typeof(*nhi
), interrupt_work
);
807 int value
= 0; /* Suppress uninitialized usage warning. */
810 int type
= 0; /* current interrupt type 0: TX, 1: RX, 2: RX overflow */
811 struct tb_ring
*ring
;
813 spin_lock_irq(&nhi
->lock
);
816 * Starting at REG_RING_NOTIFY_BASE there are three status bitfields
817 * (TX, RX, RX overflow). We iterate over the bits and read a new
818 * dwords as required. The registers are cleared on read.
820 for (bit
= 0; bit
< 3 * nhi
->hop_count
; bit
++) {
822 value
= ioread32(nhi
->iobase
823 + REG_RING_NOTIFY_BASE
825 if (++hop
== nhi
->hop_count
) {
829 if ((value
& (1 << (bit
% 32))) == 0)
832 dev_warn(&nhi
->pdev
->dev
,
833 "RX overflow for ring %d\n",
838 ring
= nhi
->tx_rings
[hop
];
840 ring
= nhi
->rx_rings
[hop
];
842 dev_warn(&nhi
->pdev
->dev
,
843 "got interrupt for inactive %s ring %d\n",
849 spin_lock(&ring
->lock
);
850 __ring_interrupt(ring
);
851 spin_unlock(&ring
->lock
);
853 spin_unlock_irq(&nhi
->lock
);
856 static irqreturn_t
nhi_msi(int irq
, void *data
)
858 struct tb_nhi
*nhi
= data
;
859 schedule_work(&nhi
->interrupt_work
);
863 static int __nhi_suspend_noirq(struct device
*dev
, bool wakeup
)
865 struct pci_dev
*pdev
= to_pci_dev(dev
);
866 struct tb
*tb
= pci_get_drvdata(pdev
);
867 struct tb_nhi
*nhi
= tb
->nhi
;
870 ret
= tb_domain_suspend_noirq(tb
);
874 if (nhi
->ops
&& nhi
->ops
->suspend_noirq
) {
875 ret
= nhi
->ops
->suspend_noirq(tb
->nhi
, wakeup
);
883 static int nhi_suspend_noirq(struct device
*dev
)
885 return __nhi_suspend_noirq(dev
, device_may_wakeup(dev
));
888 static bool nhi_wake_supported(struct pci_dev
*pdev
)
893 * If power rails are sustainable for wakeup from S4 this
894 * property is set by the BIOS.
896 if (device_property_read_u8(&pdev
->dev
, "WAKE_SUPPORTED", &val
))
902 static int nhi_poweroff_noirq(struct device
*dev
)
904 struct pci_dev
*pdev
= to_pci_dev(dev
);
907 wakeup
= device_may_wakeup(dev
) && nhi_wake_supported(pdev
);
908 return __nhi_suspend_noirq(dev
, wakeup
);
911 static void nhi_enable_int_throttling(struct tb_nhi
*nhi
)
913 /* Throttling is specified in 256ns increments */
914 u32 throttle
= DIV_ROUND_UP(128 * NSEC_PER_USEC
, 256);
918 * Configure interrupt throttling for all vectors even if we
921 for (i
= 0; i
< MSIX_MAX_VECS
; i
++) {
922 u32 reg
= REG_INT_THROTTLING_RATE
+ i
* 4;
923 iowrite32(throttle
, nhi
->iobase
+ reg
);
927 static int nhi_resume_noirq(struct device
*dev
)
929 struct pci_dev
*pdev
= to_pci_dev(dev
);
930 struct tb
*tb
= pci_get_drvdata(pdev
);
931 struct tb_nhi
*nhi
= tb
->nhi
;
935 * Check that the device is still there. It may be that the user
936 * unplugged last device which causes the host controller to go
939 if (!pci_device_is_present(pdev
)) {
940 nhi
->going_away
= true;
942 if (nhi
->ops
&& nhi
->ops
->resume_noirq
) {
943 ret
= nhi
->ops
->resume_noirq(nhi
);
947 nhi_enable_int_throttling(tb
->nhi
);
950 return tb_domain_resume_noirq(tb
);
953 static int nhi_suspend(struct device
*dev
)
955 struct pci_dev
*pdev
= to_pci_dev(dev
);
956 struct tb
*tb
= pci_get_drvdata(pdev
);
958 return tb_domain_suspend(tb
);
961 static void nhi_complete(struct device
*dev
)
963 struct pci_dev
*pdev
= to_pci_dev(dev
);
964 struct tb
*tb
= pci_get_drvdata(pdev
);
967 * If we were runtime suspended when system suspend started,
968 * schedule runtime resume now. It should bring the domain back
969 * to functional state.
971 if (pm_runtime_suspended(&pdev
->dev
))
972 pm_runtime_resume(&pdev
->dev
);
974 tb_domain_complete(tb
);
977 static int nhi_runtime_suspend(struct device
*dev
)
979 struct pci_dev
*pdev
= to_pci_dev(dev
);
980 struct tb
*tb
= pci_get_drvdata(pdev
);
981 struct tb_nhi
*nhi
= tb
->nhi
;
984 ret
= tb_domain_runtime_suspend(tb
);
988 if (nhi
->ops
&& nhi
->ops
->runtime_suspend
) {
989 ret
= nhi
->ops
->runtime_suspend(tb
->nhi
);
996 static int nhi_runtime_resume(struct device
*dev
)
998 struct pci_dev
*pdev
= to_pci_dev(dev
);
999 struct tb
*tb
= pci_get_drvdata(pdev
);
1000 struct tb_nhi
*nhi
= tb
->nhi
;
1003 if (nhi
->ops
&& nhi
->ops
->runtime_resume
) {
1004 ret
= nhi
->ops
->runtime_resume(nhi
);
1009 nhi_enable_int_throttling(nhi
);
1010 return tb_domain_runtime_resume(tb
);
1013 static void nhi_shutdown(struct tb_nhi
*nhi
)
1017 dev_dbg(&nhi
->pdev
->dev
, "shutdown\n");
1019 for (i
= 0; i
< nhi
->hop_count
; i
++) {
1020 if (nhi
->tx_rings
[i
])
1021 dev_WARN(&nhi
->pdev
->dev
,
1022 "TX ring %d is still active\n", i
);
1023 if (nhi
->rx_rings
[i
])
1024 dev_WARN(&nhi
->pdev
->dev
,
1025 "RX ring %d is still active\n", i
);
1027 nhi_disable_interrupts(nhi
);
1029 * We have to release the irq before calling flush_work. Otherwise an
1030 * already executing IRQ handler could call schedule_work again.
1032 if (!nhi
->pdev
->msix_enabled
) {
1033 devm_free_irq(&nhi
->pdev
->dev
, nhi
->pdev
->irq
, nhi
);
1034 flush_work(&nhi
->interrupt_work
);
1036 ida_destroy(&nhi
->msix_ida
);
1038 if (nhi
->ops
&& nhi
->ops
->shutdown
)
1039 nhi
->ops
->shutdown(nhi
);
1042 static int nhi_init_msi(struct tb_nhi
*nhi
)
1044 struct pci_dev
*pdev
= nhi
->pdev
;
1047 /* In case someone left them on. */
1048 nhi_disable_interrupts(nhi
);
1050 nhi_enable_int_throttling(nhi
);
1052 ida_init(&nhi
->msix_ida
);
1055 * The NHI has 16 MSI-X vectors or a single MSI. We first try to
1056 * get all MSI-X vectors and if we succeed, each ring will have
1057 * one MSI-X. If for some reason that does not work out, we
1058 * fallback to a single MSI.
1060 nvec
= pci_alloc_irq_vectors(pdev
, MSIX_MIN_VECS
, MSIX_MAX_VECS
,
1063 nvec
= pci_alloc_irq_vectors(pdev
, 1, 1, PCI_IRQ_MSI
);
1067 INIT_WORK(&nhi
->interrupt_work
, nhi_interrupt_work
);
1069 irq
= pci_irq_vector(nhi
->pdev
, 0);
1073 res
= devm_request_irq(&pdev
->dev
, irq
, nhi_msi
,
1074 IRQF_NO_SUSPEND
, "thunderbolt", nhi
);
1076 dev_err(&pdev
->dev
, "request_irq failed, aborting\n");
1084 static bool nhi_imr_valid(struct pci_dev
*pdev
)
1088 if (!device_property_read_u8(&pdev
->dev
, "IMR_VALID", &val
))
1094 static int nhi_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1100 if (!nhi_imr_valid(pdev
)) {
1101 dev_warn(&pdev
->dev
, "firmware image not valid, aborting\n");
1105 res
= pcim_enable_device(pdev
);
1107 dev_err(&pdev
->dev
, "cannot enable PCI device, aborting\n");
1111 res
= pcim_iomap_regions(pdev
, 1 << 0, "thunderbolt");
1113 dev_err(&pdev
->dev
, "cannot obtain PCI resources, aborting\n");
1117 nhi
= devm_kzalloc(&pdev
->dev
, sizeof(*nhi
), GFP_KERNEL
);
1122 nhi
->ops
= (const struct tb_nhi_ops
*)id
->driver_data
;
1123 /* cannot fail - table is allocated bin pcim_iomap_regions */
1124 nhi
->iobase
= pcim_iomap_table(pdev
)[0];
1125 nhi
->hop_count
= ioread32(nhi
->iobase
+ REG_HOP_COUNT
) & 0x3ff;
1126 if (nhi
->hop_count
!= 12 && nhi
->hop_count
!= 32)
1127 dev_warn(&pdev
->dev
, "unexpected hop count: %d\n",
1130 nhi
->tx_rings
= devm_kcalloc(&pdev
->dev
, nhi
->hop_count
,
1131 sizeof(*nhi
->tx_rings
), GFP_KERNEL
);
1132 nhi
->rx_rings
= devm_kcalloc(&pdev
->dev
, nhi
->hop_count
,
1133 sizeof(*nhi
->rx_rings
), GFP_KERNEL
);
1134 if (!nhi
->tx_rings
|| !nhi
->rx_rings
)
1137 res
= nhi_init_msi(nhi
);
1139 dev_err(&pdev
->dev
, "cannot enable MSI, aborting\n");
1143 spin_lock_init(&nhi
->lock
);
1145 res
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
1147 res
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
1149 dev_err(&pdev
->dev
, "failed to set DMA mask\n");
1153 pci_set_master(pdev
);
1155 if (nhi
->ops
&& nhi
->ops
->init
) {
1156 res
= nhi
->ops
->init(nhi
);
1161 tb
= icm_probe(nhi
);
1165 dev_err(&nhi
->pdev
->dev
,
1166 "failed to determine connection manager, aborting\n");
1170 dev_dbg(&nhi
->pdev
->dev
, "NHI initialized, starting thunderbolt\n");
1172 res
= tb_domain_add(tb
);
1175 * At this point the RX/TX rings might already have been
1176 * activated. Do a proper shutdown.
1182 pci_set_drvdata(pdev
, tb
);
1184 pm_runtime_allow(&pdev
->dev
);
1185 pm_runtime_set_autosuspend_delay(&pdev
->dev
, TB_AUTOSUSPEND_DELAY
);
1186 pm_runtime_use_autosuspend(&pdev
->dev
);
1187 pm_runtime_put_autosuspend(&pdev
->dev
);
1192 static void nhi_remove(struct pci_dev
*pdev
)
1194 struct tb
*tb
= pci_get_drvdata(pdev
);
1195 struct tb_nhi
*nhi
= tb
->nhi
;
1197 pm_runtime_get_sync(&pdev
->dev
);
1198 pm_runtime_dont_use_autosuspend(&pdev
->dev
);
1199 pm_runtime_forbid(&pdev
->dev
);
1201 tb_domain_remove(tb
);
1206 * The tunneled pci bridges are siblings of us. Use resume_noirq to reenable
1207 * the tunnels asap. A corresponding pci quirk blocks the downstream bridges
1208 * resume_noirq until we are done.
1210 static const struct dev_pm_ops nhi_pm_ops
= {
1211 .suspend_noirq
= nhi_suspend_noirq
,
1212 .resume_noirq
= nhi_resume_noirq
,
1213 .freeze_noirq
= nhi_suspend_noirq
, /*
1214 * we just disable hotplug, the
1215 * pci-tunnels stay alive.
1217 .thaw_noirq
= nhi_resume_noirq
,
1218 .restore_noirq
= nhi_resume_noirq
,
1219 .suspend
= nhi_suspend
,
1220 .freeze
= nhi_suspend
,
1221 .poweroff_noirq
= nhi_poweroff_noirq
,
1222 .poweroff
= nhi_suspend
,
1223 .complete
= nhi_complete
,
1224 .runtime_suspend
= nhi_runtime_suspend
,
1225 .runtime_resume
= nhi_runtime_resume
,
1228 static struct pci_device_id nhi_ids
[] = {
1230 * We have to specify class, the TB bridges use the same device and
1231 * vendor (sub)id on gen 1 and gen 2 controllers.
1234 .class = PCI_CLASS_SYSTEM_OTHER
<< 8, .class_mask
= ~0,
1235 .vendor
= PCI_VENDOR_ID_INTEL
,
1236 .device
= PCI_DEVICE_ID_INTEL_LIGHT_RIDGE
,
1237 .subvendor
= 0x2222, .subdevice
= 0x1111,
1240 .class = PCI_CLASS_SYSTEM_OTHER
<< 8, .class_mask
= ~0,
1241 .vendor
= PCI_VENDOR_ID_INTEL
,
1242 .device
= PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C
,
1243 .subvendor
= 0x2222, .subdevice
= 0x1111,
1246 .class = PCI_CLASS_SYSTEM_OTHER
<< 8, .class_mask
= ~0,
1247 .vendor
= PCI_VENDOR_ID_INTEL
,
1248 .device
= PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI
,
1249 .subvendor
= PCI_ANY_ID
, .subdevice
= PCI_ANY_ID
,
1252 .class = PCI_CLASS_SYSTEM_OTHER
<< 8, .class_mask
= ~0,
1253 .vendor
= PCI_VENDOR_ID_INTEL
,
1254 .device
= PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI
,
1255 .subvendor
= PCI_ANY_ID
, .subdevice
= PCI_ANY_ID
,
1259 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI
) },
1260 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI
) },
1261 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI
) },
1262 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI
) },
1263 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI
) },
1264 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI
) },
1265 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI
) },
1266 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI
) },
1267 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_NHI
) },
1268 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_NHI
) },
1269 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ICL_NHI0
),
1270 .driver_data
= (kernel_ulong_t
)&icl_nhi_ops
},
1271 { PCI_VDEVICE(INTEL
, PCI_DEVICE_ID_INTEL_ICL_NHI1
),
1272 .driver_data
= (kernel_ulong_t
)&icl_nhi_ops
},
1274 /* Any USB4 compliant host */
1275 { PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_USB4
, ~0) },
1280 MODULE_DEVICE_TABLE(pci
, nhi_ids
);
1281 MODULE_LICENSE("GPL");
1283 static struct pci_driver nhi_driver
= {
1284 .name
= "thunderbolt",
1285 .id_table
= nhi_ids
,
1287 .remove
= nhi_remove
,
1288 .driver
.pm
= &nhi_pm_ops
,
1291 static int __init
nhi_init(void)
1295 ret
= tb_domain_init();
1298 ret
= pci_register_driver(&nhi_driver
);
1304 static void __exit
nhi_unload(void)
1306 pci_unregister_driver(&nhi_driver
);
1310 rootfs_initcall(nhi_init
);
1311 module_exit(nhi_unload
);