drivers/tty/rocket.c

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /*
   3  * RocketPort device driver for Linux
   4  *
   5  * Written by Theodore Ts'o, 1995, 1996, 1997, 1998, 1999, 2000.
   6  *
   7  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by Comtrol, Inc.
   8  */
   9
  10 /*
  11  * Kernel Synchronization:
  12  *
  13  * This driver has 2 kernel control paths - exception handlers (calls into the driver
  14  * from user mode) and the timer bottom half (tasklet).  This is a polled driver, interrupts
  15  * are not used.
  16  *
  17  * Critical data:
  18  * -  rp_table[], accessed through passed "info" pointers, is a global (static) array of
  19  *    serial port state information and the xmit_buf circular buffer.  Protected by
  20  *    a per port spinlock.
  21  * -  xmit_flags[], an array of ints indexed by line (port) number, indicating that there
  22  *    is data to be transmitted.  Protected by atomic bit operations.
  23  * -  rp_num_ports, int indicating number of open ports, protected by atomic operations.
  24  *
  25  * rp_write() and rp_write_char() functions use a per port semaphore to protect against
  26  * simultaneous access to the same port by more than one process.
  27  */
  28
  29 /****** Defines ******/
  30 #define ROCKET_PARANOIA_CHECK
  31 #define ROCKET_DISABLE_SIMUSAGE
  32
  33 #undef ROCKET_SOFT_FLOW
  34 #undef ROCKET_DEBUG_OPEN
  35 #undef ROCKET_DEBUG_INTR
  36 #undef ROCKET_DEBUG_WRITE
  37 #undef ROCKET_DEBUG_FLOW
  38 #undef ROCKET_DEBUG_THROTTLE
  39 #undef ROCKET_DEBUG_WAIT_UNTIL_SENT
  40 #undef ROCKET_DEBUG_RECEIVE
  41 #undef ROCKET_DEBUG_HANGUP
  42 #undef REV_PCI_ORDER
  43 #undef ROCKET_DEBUG_IO
  44
  45 #define POLL_PERIOD (HZ/100)    /*  Polling period .01 seconds (10ms) */
  46
  47 /****** Kernel includes ******/
  48
  49 #include <linux/module.h>
  50 #include <linux/errno.h>
  51 #include <linux/major.h>
  52 #include <linux/kernel.h>
  53 #include <linux/signal.h>
  54 #include <linux/slab.h>
  55 #include <linux/mm.h>
  56 #include <linux/sched.h>
  57 #include <linux/timer.h>
  58 #include <linux/interrupt.h>
  59 #include <linux/tty.h>
  60 #include <linux/tty_driver.h>
  61 #include <linux/tty_flip.h>
  62 #include <linux/serial.h>
  63 #include <linux/string.h>
  64 #include <linux/fcntl.h>
  65 #include <linux/ptrace.h>
  66 #include <linux/mutex.h>
  67 #include <linux/ioport.h>
  68 #include <linux/delay.h>
  69 #include <linux/completion.h>
  70 #include <linux/wait.h>
  71 #include <linux/pci.h>
  72 #include <linux/uaccess.h>
  73 #include <linux/atomic.h>
  74 #include <asm/unaligned.h>
  75 #include <linux/bitops.h>
  76 #include <linux/spinlock.h>
  77 #include <linux/init.h>
  78
  79 /****** RocketPort includes ******/
  80
  81 #include "rocket_int.h"
  82 #include "rocket.h"
  83
  84 #define ROCKET_VERSION "2.09"
  85 #define ROCKET_DATE "12-June-2003"
  86
  87 /****** RocketPort Local Variables ******/
  88
  89 static void rp_do_poll(struct timer_list *unused);
  90
  91 static struct tty_driver *rocket_driver;
  92
  93 static struct rocket_version driver_version = {
  94         ROCKET_VERSION, ROCKET_DATE
  95 };
  96
  97 static struct r_port *rp_table[MAX_RP_PORTS];          /*  The main repository of serial port state information. */
  98 static unsigned int xmit_flags[NUM_BOARDS];            /*  Bit significant, indicates port had data to transmit. */
  99                                                        /*  eg.  Bit 0 indicates port 0 has xmit data, ...        */
 100 static atomic_t rp_num_ports_open;                     /*  Number of serial ports open                           */
 101 static DEFINE_TIMER(rocket_timer, rp_do_poll);
 102
 103 static unsigned long board1;                           /* ISA addresses, retrieved from rocketport.conf          */
 104 static unsigned long board2;
 105 static unsigned long board3;
 106 static unsigned long board4;
 107 static unsigned long controller;
 108 static bool support_low_speed;
 109 static unsigned long modem1;
 110 static unsigned long modem2;
 111 static unsigned long modem3;
 112 static unsigned long modem4;
 113 static unsigned long pc104_1[8];
 114 static unsigned long pc104_2[8];
 115 static unsigned long pc104_3[8];
 116 static unsigned long pc104_4[8];
 117 static unsigned long *pc104[4] = { pc104_1, pc104_2, pc104_3, pc104_4 };
 118
 119 static int rp_baud_base[NUM_BOARDS];                   /*  Board config info (Someday make a per-board structure)  */
 120 static unsigned long rcktpt_io_addr[NUM_BOARDS];
 121 static int rcktpt_type[NUM_BOARDS];
 122 static int is_PCI[NUM_BOARDS];
 123 static rocketModel_t rocketModel[NUM_BOARDS];
 124 static int max_board;
 125 static const struct tty_port_operations rocket_port_ops;
 126
 127 /*
 128  * The following arrays define the interrupt bits corresponding to each AIOP.
 129  * These bits are different between the ISA and regular PCI boards and the
 130  * Universal PCI boards.
 131  */
 132
 133 static Word_t aiop_intr_bits[AIOP_CTL_SIZE] = {
 134         AIOP_INTR_BIT_0,
 135         AIOP_INTR_BIT_1,
 136         AIOP_INTR_BIT_2,
 137         AIOP_INTR_BIT_3
 138 };
 139
 140 #ifdef CONFIG_PCI
 141 static Word_t upci_aiop_intr_bits[AIOP_CTL_SIZE] = {
 142         UPCI_AIOP_INTR_BIT_0,
 143         UPCI_AIOP_INTR_BIT_1,
 144         UPCI_AIOP_INTR_BIT_2,
 145         UPCI_AIOP_INTR_BIT_3
 146 };
 147 #endif
 148
 149 static Byte_t RData[RDATASIZE] = {
 150         0x00, 0x09, 0xf6, 0x82,
 151         0x02, 0x09, 0x86, 0xfb,
 152         0x04, 0x09, 0x00, 0x0a,
 153         0x06, 0x09, 0x01, 0x0a,
 154         0x08, 0x09, 0x8a, 0x13,
 155         0x0a, 0x09, 0xc5, 0x11,
 156         0x0c, 0x09, 0x86, 0x85,
 157         0x0e, 0x09, 0x20, 0x0a,
 158         0x10, 0x09, 0x21, 0x0a,
 159         0x12, 0x09, 0x41, 0xff,
 160         0x14, 0x09, 0x82, 0x00,
 161         0x16, 0x09, 0x82, 0x7b,
 162         0x18, 0x09, 0x8a, 0x7d,
 163         0x1a, 0x09, 0x88, 0x81,
 164         0x1c, 0x09, 0x86, 0x7a,
 165         0x1e, 0x09, 0x84, 0x81,
 166         0x20, 0x09, 0x82, 0x7c,
 167         0x22, 0x09, 0x0a, 0x0a
 168 };
 169
 170 static Byte_t RRegData[RREGDATASIZE] = {
 171         0x00, 0x09, 0xf6, 0x82, /* 00: Stop Rx processor */
 172         0x08, 0x09, 0x8a, 0x13, /* 04: Tx software flow control */
 173         0x0a, 0x09, 0xc5, 0x11, /* 08: XON char */
 174         0x0c, 0x09, 0x86, 0x85, /* 0c: XANY */
 175         0x12, 0x09, 0x41, 0xff, /* 10: Rx mask char */
 176         0x14, 0x09, 0x82, 0x00, /* 14: Compare/Ignore #0 */
 177         0x16, 0x09, 0x82, 0x7b, /* 18: Compare #1 */
 178         0x18, 0x09, 0x8a, 0x7d, /* 1c: Compare #2 */
 179         0x1a, 0x09, 0x88, 0x81, /* 20: Interrupt #1 */
 180         0x1c, 0x09, 0x86, 0x7a, /* 24: Ignore/Replace #1 */
 181         0x1e, 0x09, 0x84, 0x81, /* 28: Interrupt #2 */
 182         0x20, 0x09, 0x82, 0x7c, /* 2c: Ignore/Replace #2 */
 183         0x22, 0x09, 0x0a, 0x0a  /* 30: Rx FIFO Enable */
 184 };
 185
 186 static CONTROLLER_T sController[CTL_SIZE] = {
 187         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 188          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 189         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 190          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 191         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 192          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 193         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 194          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}
 195 };
 196
 197 static Byte_t sBitMapClrTbl[8] = {
 198         0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f
 199 };
 200
 201 static Byte_t sBitMapSetTbl[8] = {
 202         0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
 203 };
 204
 205 static int sClockPrescale = 0x14;
 206
 207 /*
 208  *  Line number is the ttySIx number (x), the Minor number.  We
 209  *  assign them sequentially, starting at zero.  The following
 210  *  array keeps track of the line number assigned to a given board/aiop/channel.
 211  */
 212 static unsigned char lineNumbers[MAX_RP_PORTS];
 213 static unsigned long nextLineNumber;
 214
 215 /*****  RocketPort Static Prototypes   *********/
 216 static int __init init_ISA(int i);
 217 static void rp_wait_until_sent(struct tty_struct *tty, int timeout);
 218 static void rp_flush_buffer(struct tty_struct *tty);
 219 static unsigned char GetLineNumber(int ctrl, int aiop, int ch);
 220 static unsigned char SetLineNumber(int ctrl, int aiop, int ch);
 221 static void rp_start(struct tty_struct *tty);
 222 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
 223                      int ChanNum);
 224 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode);
 225 static void sFlushRxFIFO(CHANNEL_T * ChP);
 226 static void sFlushTxFIFO(CHANNEL_T * ChP);
 227 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags);
 228 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags);
 229 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on);
 230 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on);
 231 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data);
 232 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
 233                            ByteIO_t * AiopIOList, int AiopIOListSize,
 234                            int IRQNum, Byte_t Frequency, int PeriodicOnly);
 235 static int sReadAiopID(ByteIO_t io);
 236 static int sReadAiopNumChan(WordIO_t io);
 237
 238 MODULE_AUTHOR("Theodore Ts'o");
 239 MODULE_DESCRIPTION("Comtrol RocketPort driver");
 240 module_param_hw(board1, ulong, ioport, 0);
 241 MODULE_PARM_DESC(board1, "I/O port for (ISA) board #1");
 242 module_param_hw(board2, ulong, ioport, 0);
 243 MODULE_PARM_DESC(board2, "I/O port for (ISA) board #2");
 244 module_param_hw(board3, ulong, ioport, 0);
 245 MODULE_PARM_DESC(board3, "I/O port for (ISA) board #3");
 246 module_param_hw(board4, ulong, ioport, 0);
 247 MODULE_PARM_DESC(board4, "I/O port for (ISA) board #4");
 248 module_param_hw(controller, ulong, ioport, 0);
 249 MODULE_PARM_DESC(controller, "I/O port for (ISA) rocketport controller");
 250 module_param(support_low_speed, bool, 0);
 251 MODULE_PARM_DESC(support_low_speed, "1 means support 50 baud, 0 means support 460400 baud");
 252 module_param(modem1, ulong, 0);
 253 MODULE_PARM_DESC(modem1, "1 means (ISA) board #1 is a RocketModem");
 254 module_param(modem2, ulong, 0);
 255 MODULE_PARM_DESC(modem2, "1 means (ISA) board #2 is a RocketModem");
 256 module_param(modem3, ulong, 0);
 257 MODULE_PARM_DESC(modem3, "1 means (ISA) board #3 is a RocketModem");
 258 module_param(modem4, ulong, 0);
 259 MODULE_PARM_DESC(modem4, "1 means (ISA) board #4 is a RocketModem");
 260 module_param_array(pc104_1, ulong, NULL, 0);
 261 MODULE_PARM_DESC(pc104_1, "set interface types for ISA(PC104) board #1 (e.g. pc104_1=232,232,485,485,...");
 262 module_param_array(pc104_2, ulong, NULL, 0);
 263 MODULE_PARM_DESC(pc104_2, "set interface types for ISA(PC104) board #2 (e.g. pc104_2=232,232,485,485,...");
 264 module_param_array(pc104_3, ulong, NULL, 0);
 265 MODULE_PARM_DESC(pc104_3, "set interface types for ISA(PC104) board #3 (e.g. pc104_3=232,232,485,485,...");
 266 module_param_array(pc104_4, ulong, NULL, 0);
 267 MODULE_PARM_DESC(pc104_4, "set interface types for ISA(PC104) board #4 (e.g. pc104_4=232,232,485,485,...");
 268
 269 static int __init rp_init(void);
 270 static void rp_cleanup_module(void);
 271
 272 module_init(rp_init);
 273 module_exit(rp_cleanup_module);
 274
 275
 276 MODULE_LICENSE("Dual BSD/GPL");
 277
 278 /*************************************************************************/
 279 /*                     Module code starts here                           */
 280
 281 static inline int rocket_paranoia_check(struct r_port *info,
 282                                         const char *routine)
 283 {
 284 #ifdef ROCKET_PARANOIA_CHECK
 285         if (!info)
 286                 return 1;
 287         if (info->magic != RPORT_MAGIC) {
 288                 printk(KERN_WARNING "Warning: bad magic number for rocketport "
 289                                 "struct in %s\n", routine);
 290                 return 1;
 291         }
 292 #endif
 293         return 0;
 294 }
 295
 296
 297 /*  Serial port receive data function.  Called (from timer poll) when an AIOPIC signals
 298  *  that receive data is present on a serial port.  Pulls data from FIFO, moves it into the
 299  *  tty layer.
 300  */
 301 static void rp_do_receive(struct r_port *info, CHANNEL_t *cp,
 302                 unsigned int ChanStatus)
 303 {
 304         unsigned int CharNStat;
 305         int ToRecv, wRecv, space;
 306         unsigned char *cbuf;
 307
 308         ToRecv = sGetRxCnt(cp);
 309 #ifdef ROCKET_DEBUG_INTR
 310         printk(KERN_INFO "rp_do_receive(%d)...\n", ToRecv);
 311 #endif
 312         if (ToRecv == 0)
 313                 return;
 314
 315         /*
 316          * if status indicates there are errored characters in the
 317          * FIFO, then enter status mode (a word in FIFO holds
 318          * character and status).
 319          */
 320         if (ChanStatus & (RXFOVERFL | RXBREAK | RXFRAME | RXPARITY)) {
 321                 if (!(ChanStatus & STATMODE)) {
 322 #ifdef ROCKET_DEBUG_RECEIVE
 323                         printk(KERN_INFO "Entering STATMODE...\n");
 324 #endif
 325                         ChanStatus |= STATMODE;
 326                         sEnRxStatusMode(cp);
 327                 }
 328         }
 329
 330         /*
 331          * if we previously entered status mode, then read down the
 332          * FIFO one word at a time, pulling apart the character and
 333          * the status.  Update error counters depending on status
 334          */
 335         if (ChanStatus & STATMODE) {
 336 #ifdef ROCKET_DEBUG_RECEIVE
 337                 printk(KERN_INFO "Ignore %x, read %x...\n",
 338                         info->ignore_status_mask, info->read_status_mask);
 339 #endif
 340                 while (ToRecv) {
 341                         char flag;
 342
 343                         CharNStat = sInW(sGetTxRxDataIO(cp));
 344 #ifdef ROCKET_DEBUG_RECEIVE
 345                         printk(KERN_INFO "%x...\n", CharNStat);
 346 #endif
 347                         if (CharNStat & STMBREAKH)
 348                                 CharNStat &= ~(STMFRAMEH | STMPARITYH);
 349                         if (CharNStat & info->ignore_status_mask) {
 350                                 ToRecv--;
 351                                 continue;
 352                         }
 353                         CharNStat &= info->read_status_mask;
 354                         if (CharNStat & STMBREAKH)
 355                                 flag = TTY_BREAK;
 356                         else if (CharNStat & STMPARITYH)
 357                                 flag = TTY_PARITY;
 358                         else if (CharNStat & STMFRAMEH)
 359                                 flag = TTY_FRAME;
 360                         else if (CharNStat & STMRCVROVRH)
 361                                 flag = TTY_OVERRUN;
 362                         else
 363                                 flag = TTY_NORMAL;
 364                         tty_insert_flip_char(&info->port, CharNStat & 0xff,
 365                                         flag);
 366                         ToRecv--;
 367                 }
 368
 369                 /*
 370                  * after we've emptied the FIFO in status mode, turn
 371                  * status mode back off
 372                  */
 373                 if (sGetRxCnt(cp) == 0) {
 374 #ifdef ROCKET_DEBUG_RECEIVE
 375                         printk(KERN_INFO "Status mode off.\n");
 376 #endif
 377                         sDisRxStatusMode(cp);
 378                 }
 379         } else {
 380                 /*
 381                  * we aren't in status mode, so read down the FIFO two
 382                  * characters at time by doing repeated word IO
 383                  * transfer.
 384                  */
 385                 space = tty_prepare_flip_string(&info->port, &cbuf, ToRecv);
 386                 if (space < ToRecv) {
 387 #ifdef ROCKET_DEBUG_RECEIVE
 388                         printk(KERN_INFO "rp_do_receive:insufficient space ToRecv=%d space=%d\n", ToRecv, space);
 389 #endif
 390                         if (space <= 0)
 391                                 return;
 392                         ToRecv = space;
 393                 }
 394                 wRecv = ToRecv >> 1;
 395                 if (wRecv)
 396                         sInStrW(sGetTxRxDataIO(cp), (unsigned short *) cbuf, wRecv);
 397                 if (ToRecv & 1)
 398                         cbuf[ToRecv - 1] = sInB(sGetTxRxDataIO(cp));
 399         }
 400         /*  Push the data up to the tty layer */
 401         tty_flip_buffer_push(&info->port);
 402 }
 403
 404 /*
 405  *  Serial port transmit data function.  Called from the timer polling loop as a
 406  *  result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready
 407  *  to be sent out the serial port.  Data is buffered in rp_table[line].xmit_buf, it is
 408  *  moved to the port's xmit FIFO.  *info is critical data, protected by spinlocks.
 409  */
 410 static void rp_do_transmit(struct r_port *info)
 411 {
 412         int c;
 413         CHANNEL_t *cp = &info->channel;
 414         struct tty_struct *tty;
 415         unsigned long flags;
 416
 417 #ifdef ROCKET_DEBUG_INTR
 418         printk(KERN_DEBUG "%s\n", __func__);
 419 #endif
 420         if (!info)
 421                 return;
 422         tty = tty_port_tty_get(&info->port);
 423
 424         if (tty == NULL) {
 425                 printk(KERN_WARNING "rp: WARNING %s called with tty==NULL\n", __func__);
 426                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 427                 return;
 428         }
 429
 430         spin_lock_irqsave(&info->slock, flags);
 431         info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
 432
 433         /*  Loop sending data to FIFO until done or FIFO full */
 434         while (1) {
 435                 if (tty->stopped)
 436                         break;
 437                 c = min(info->xmit_fifo_room, info->xmit_cnt);
 438                 c = min(c, XMIT_BUF_SIZE - info->xmit_tail);
 439                 if (c <= 0 || info->xmit_fifo_room <= 0)
 440                         break;
 441                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) (info->xmit_buf + info->xmit_tail), c / 2);
 442                 if (c & 1)
 443                         sOutB(sGetTxRxDataIO(cp), info->xmit_buf[info->xmit_tail + c - 1]);
 444                 info->xmit_tail += c;
 445                 info->xmit_tail &= XMIT_BUF_SIZE - 1;
 446                 info->xmit_cnt -= c;
 447                 info->xmit_fifo_room -= c;
 448 #ifdef ROCKET_DEBUG_INTR
 449                 printk(KERN_INFO "tx %d chars...\n", c);
 450 #endif
 451         }
 452
 453         if (info->xmit_cnt == 0)
 454                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 455
 456         if (info->xmit_cnt < WAKEUP_CHARS) {
 457                 tty_wakeup(tty);
 458 #ifdef ROCKETPORT_HAVE_POLL_WAIT
 459                 wake_up_interruptible(&tty->poll_wait);
 460 #endif
 461         }
 462
 463         spin_unlock_irqrestore(&info->slock, flags);
 464         tty_kref_put(tty);
 465
 466 #ifdef ROCKET_DEBUG_INTR
 467         printk(KERN_DEBUG "(%d,%d,%d,%d)...\n", info->xmit_cnt, info->xmit_head,
 468                info->xmit_tail, info->xmit_fifo_room);
 469 #endif
 470 }
 471
 472 /*
 473  *  Called when a serial port signals it has read data in it's RX FIFO.
 474  *  It checks what interrupts are pending and services them, including
 475  *  receiving serial data.
 476  */
 477 static void rp_handle_port(struct r_port *info)
 478 {
 479         CHANNEL_t *cp;
 480         unsigned int IntMask, ChanStatus;
 481
 482         if (!info)
 483                 return;
 484
 485         if (!tty_port_initialized(&info->port)) {
 486                 printk(KERN_WARNING "rp: WARNING: rp_handle_port called with "
 487                                 "info->flags & NOT_INIT\n");
 488                 return;
 489         }
 490
 491         cp = &info->channel;
 492
 493         IntMask = sGetChanIntID(cp) & info->intmask;
 494 #ifdef ROCKET_DEBUG_INTR
 495         printk(KERN_INFO "rp_interrupt %02x...\n", IntMask);
 496 #endif
 497         ChanStatus = sGetChanStatus(cp);
 498         if (IntMask & RXF_TRIG) {       /* Rx FIFO trigger level */
 499                 rp_do_receive(info, cp, ChanStatus);
 500         }
 501         if (IntMask & DELTA_CD) {       /* CD change  */
 502 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || defined(ROCKET_DEBUG_HANGUP))
 503                 printk(KERN_INFO "ttyR%d CD now %s...\n", info->line,
 504                        (ChanStatus & CD_ACT) ? "on" : "off");
 505 #endif
 506                 if (!(ChanStatus & CD_ACT) && info->cd_status) {
 507 #ifdef ROCKET_DEBUG_HANGUP
 508                         printk(KERN_INFO "CD drop, calling hangup.\n");
 509 #endif
 510                         tty_port_tty_hangup(&info->port, false);
 511                 }
 512                 info->cd_status = (ChanStatus & CD_ACT) ? 1 : 0;
 513                 wake_up_interruptible(&info->port.open_wait);
 514         }
 515 #ifdef ROCKET_DEBUG_INTR
 516         if (IntMask & DELTA_CTS) {      /* CTS change */
 517                 printk(KERN_INFO "CTS change...\n");
 518         }
 519         if (IntMask & DELTA_DSR) {      /* DSR change */
 520                 printk(KERN_INFO "DSR change...\n");
 521         }
 522 #endif
 523 }
 524
 525 /*
 526  *  The top level polling routine.  Repeats every 1/100 HZ (10ms).
 527  */
 528 static void rp_do_poll(struct timer_list *unused)
 529 {
 530         CONTROLLER_t *ctlp;
 531         int ctrl, aiop, ch, line;
 532         unsigned int xmitmask, i;
 533         unsigned int CtlMask;
 534         unsigned char AiopMask;
 535         Word_t bit;
 536
 537         /*  Walk through all the boards (ctrl's) */
 538         for (ctrl = 0; ctrl < max_board; ctrl++) {
 539                 if (rcktpt_io_addr[ctrl] <= 0)
 540                         continue;
 541
 542                 /*  Get a ptr to the board's control struct */
 543                 ctlp = sCtlNumToCtlPtr(ctrl);
 544
 545                 /*  Get the interrupt status from the board */
 546 #ifdef CONFIG_PCI
 547                 if (ctlp->BusType == isPCI)
 548                         CtlMask = sPCIGetControllerIntStatus(ctlp);
 549                 else
 550 #endif
 551                         CtlMask = sGetControllerIntStatus(ctlp);
 552
 553                 /*  Check if any AIOP read bits are set */
 554                 for (aiop = 0; CtlMask; aiop++) {
 555                         bit = ctlp->AiopIntrBits[aiop];
 556                         if (CtlMask & bit) {
 557                                 CtlMask &= ~bit;
 558                                 AiopMask = sGetAiopIntStatus(ctlp, aiop);
 559
 560                                 /*  Check if any port read bits are set */
 561                                 for (ch = 0; AiopMask;  AiopMask >>= 1, ch++) {
 562                                         if (AiopMask & 1) {
 563
 564                                                 /*  Get the line number (/dev/ttyRx number). */
 565                                                 /*  Read the data from the port. */
 566                                                 line = GetLineNumber(ctrl, aiop, ch);
 567                                                 rp_handle_port(rp_table[line]);
 568                                         }
 569                                 }
 570                         }
 571                 }
 572
 573                 xmitmask = xmit_flags[ctrl];
 574
 575                 /*
 576                  *  xmit_flags contains bit-significant flags, indicating there is data
 577                  *  to xmit on the port. Bit 0 is port 0 on this board, bit 1 is port
 578                  *  1, ... (32 total possible).  The variable i has the aiop and ch
 579                  *  numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc).
 580                  */
 581                 if (xmitmask) {
 582                         for (i = 0; i < rocketModel[ctrl].numPorts; i++) {
 583                                 if (xmitmask & (1 << i)) {
 584                                         aiop = (i & 0x18) >> 3;
 585                                         ch = i & 0x07;
 586                                         line = GetLineNumber(ctrl, aiop, ch);
 587                                         rp_do_transmit(rp_table[line]);
 588                                 }
 589                         }
 590                 }
 591         }
 592
 593         /*
 594          * Reset the timer so we get called at the next clock tick (10ms).
 595          */
 596         if (atomic_read(&rp_num_ports_open))
 597                 mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
 598 }
 599
 600 /*
 601  *  Initializes the r_port structure for a port, as well as enabling the port on
 602  *  the board.
 603  *  Inputs:  board, aiop, chan numbers
 604  */
 605 static void __init
 606 init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev)
 607 {
 608         unsigned rocketMode;
 609         struct r_port *info;
 610         int line;
 611         CONTROLLER_T *ctlp;
 612
 613         /*  Get the next available line number */
 614         line = SetLineNumber(board, aiop, chan);
 615
 616         ctlp = sCtlNumToCtlPtr(board);
 617
 618         /*  Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
 619         info = kzalloc(sizeof (struct r_port), GFP_KERNEL);
 620         if (!info) {
 621                 printk(KERN_ERR "Couldn't allocate info struct for line #%d\n",
 622                                 line);
 623                 return;
 624         }
 625
 626         info->magic = RPORT_MAGIC;
 627         info->line = line;
 628         info->ctlp = ctlp;
 629         info->board = board;
 630         info->aiop = aiop;
 631         info->chan = chan;
 632         tty_port_init(&info->port);
 633         info->port.ops = &rocket_port_ops;
 634         info->flags &= ~ROCKET_MODE_MASK;
 635         switch (pc104[board][line]) {
 636         case 422:
 637                 info->flags |= ROCKET_MODE_RS422;
 638                 break;
 639         case 485:
 640                 info->flags |= ROCKET_MODE_RS485;
 641                 break;
 642         case 232:
 643         default:
 644                 info->flags |= ROCKET_MODE_RS232;
 645                 break;
 646         }
 647
 648         info->intmask = RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR;
 649         if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {
 650                 printk(KERN_ERR "RocketPort sInitChan(%d, %d, %d) failed!\n",
 651                                 board, aiop, chan);
 652                 tty_port_destroy(&info->port);
 653                 kfree(info);
 654                 return;
 655         }
 656
 657         rocketMode = info->flags & ROCKET_MODE_MASK;
 658
 659         if ((info->flags & ROCKET_RTS_TOGGLE) || (rocketMode == ROCKET_MODE_RS485))
 660                 sEnRTSToggle(&info->channel);
 661         else
 662                 sDisRTSToggle(&info->channel);
 663
 664         if (ctlp->boardType == ROCKET_TYPE_PC104) {
 665                 switch (rocketMode) {
 666                 case ROCKET_MODE_RS485:
 667                         sSetInterfaceMode(&info->channel, InterfaceModeRS485);
 668                         break;
 669                 case ROCKET_MODE_RS422:
 670                         sSetInterfaceMode(&info->channel, InterfaceModeRS422);
 671                         break;
 672                 case ROCKET_MODE_RS232:
 673                 default:
 674                         if (info->flags & ROCKET_RTS_TOGGLE)
 675                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232T);
 676                         else
 677                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232);
 678                         break;
 679                 }
 680         }
 681         spin_lock_init(&info->slock);
 682         mutex_init(&info->write_mtx);
 683         rp_table[line] = info;
 684         tty_port_register_device(&info->port, rocket_driver, line,
 685                         pci_dev ? &pci_dev->dev : NULL);
 686 }
 687
 688 /*
 689  *  Configures a rocketport port according to its termio settings.  Called from
 690  *  user mode into the driver (exception handler).  *info CD manipulation is spinlock protected.
 691  */
 692 static void configure_r_port(struct tty_struct *tty, struct r_port *info,
 693                              struct ktermios *old_termios)
 694 {
 695         unsigned cflag;
 696         unsigned long flags;
 697         unsigned rocketMode;
 698         int bits, baud, divisor;
 699         CHANNEL_t *cp;
 700         struct ktermios *t = &tty->termios;
 701
 702         cp = &info->channel;
 703         cflag = t->c_cflag;
 704
 705         /* Byte size and parity */
 706         if ((cflag & CSIZE) == CS8) {
 707                 sSetData8(cp);
 708                 bits = 10;
 709         } else {
 710                 sSetData7(cp);
 711                 bits = 9;
 712         }
 713         if (cflag & CSTOPB) {
 714                 sSetStop2(cp);
 715                 bits++;
 716         } else {
 717                 sSetStop1(cp);
 718         }
 719
 720         if (cflag & PARENB) {
 721                 sEnParity(cp);
 722                 bits++;
 723                 if (cflag & PARODD) {
 724                         sSetOddParity(cp);
 725                 } else {
 726                         sSetEvenParity(cp);
 727                 }
 728         } else {
 729                 sDisParity(cp);
 730         }
 731
 732         /* baud rate */
 733         baud = tty_get_baud_rate(tty);
 734         if (!baud)
 735                 baud = 9600;
 736         divisor = ((rp_baud_base[info->board] + (baud >> 1)) / baud) - 1;
 737         if ((divisor >= 8192 || divisor < 0) && old_termios) {
 738                 baud = tty_termios_baud_rate(old_termios);
 739                 if (!baud)
 740                         baud = 9600;
 741                 divisor = (rp_baud_base[info->board] / baud) - 1;
 742         }
 743         if (divisor >= 8192 || divisor < 0) {
 744                 baud = 9600;
 745                 divisor = (rp_baud_base[info->board] / baud) - 1;
 746         }
 747         info->cps = baud / bits;
 748         sSetBaud(cp, divisor);
 749
 750         /* FIXME: Should really back compute a baud rate from the divisor */
 751         tty_encode_baud_rate(tty, baud, baud);
 752
 753         if (cflag & CRTSCTS) {
 754                 info->intmask |= DELTA_CTS;
 755                 sEnCTSFlowCtl(cp);
 756         } else {
 757                 info->intmask &= ~DELTA_CTS;
 758                 sDisCTSFlowCtl(cp);
 759         }
 760         if (cflag & CLOCAL) {
 761                 info->intmask &= ~DELTA_CD;
 762         } else {
 763                 spin_lock_irqsave(&info->slock, flags);
 764                 if (sGetChanStatus(cp) & CD_ACT)
 765                         info->cd_status = 1;
 766                 else
 767                         info->cd_status = 0;
 768                 info->intmask |= DELTA_CD;
 769                 spin_unlock_irqrestore(&info->slock, flags);
 770         }
 771
 772         /*
 773          * Handle software flow control in the board
 774          */
 775 #ifdef ROCKET_SOFT_FLOW
 776         if (I_IXON(tty)) {
 777                 sEnTxSoftFlowCtl(cp);
 778                 if (I_IXANY(tty)) {
 779                         sEnIXANY(cp);
 780                 } else {
 781                         sDisIXANY(cp);
 782                 }
 783                 sSetTxXONChar(cp, START_CHAR(tty));
 784                 sSetTxXOFFChar(cp, STOP_CHAR(tty));
 785         } else {
 786                 sDisTxSoftFlowCtl(cp);
 787                 sDisIXANY(cp);
 788                 sClrTxXOFF(cp);
 789         }
 790 #endif
 791
 792         /*
 793          * Set up ignore/read mask words
 794          */
 795         info->read_status_mask = STMRCVROVRH | 0xFF;
 796         if (I_INPCK(tty))
 797                 info->read_status_mask |= STMFRAMEH | STMPARITYH;
 798         if (I_BRKINT(tty) || I_PARMRK(tty))
 799                 info->read_status_mask |= STMBREAKH;
 800
 801         /*
 802          * Characters to ignore
 803          */
 804         info->ignore_status_mask = 0;
 805         if (I_IGNPAR(tty))
 806                 info->ignore_status_mask |= STMFRAMEH | STMPARITYH;
 807         if (I_IGNBRK(tty)) {
 808                 info->ignore_status_mask |= STMBREAKH;
 809                 /*
 810                  * If we're ignoring parity and break indicators,
 811                  * ignore overruns too.  (For real raw support).
 812                  */
 813                 if (I_IGNPAR(tty))
 814                         info->ignore_status_mask |= STMRCVROVRH;
 815         }
 816
 817         rocketMode = info->flags & ROCKET_MODE_MASK;
 818
 819         if ((info->flags & ROCKET_RTS_TOGGLE)
 820             || (rocketMode == ROCKET_MODE_RS485))
 821                 sEnRTSToggle(cp);
 822         else
 823                 sDisRTSToggle(cp);
 824
 825         sSetRTS(&info->channel);
 826
 827         if (cp->CtlP->boardType == ROCKET_TYPE_PC104) {
 828                 switch (rocketMode) {
 829                 case ROCKET_MODE_RS485:
 830                         sSetInterfaceMode(cp, InterfaceModeRS485);
 831                         break;
 832                 case ROCKET_MODE_RS422:
 833                         sSetInterfaceMode(cp, InterfaceModeRS422);
 834                         break;
 835                 case ROCKET_MODE_RS232:
 836                 default:
 837                         if (info->flags & ROCKET_RTS_TOGGLE)
 838                                 sSetInterfaceMode(cp, InterfaceModeRS232T);
 839                         else
 840                                 sSetInterfaceMode(cp, InterfaceModeRS232);
 841                         break;
 842                 }
 843         }
 844 }
 845
 846 static int carrier_raised(struct tty_port *port)
 847 {
 848         struct r_port *info = container_of(port, struct r_port, port);
 849         return (sGetChanStatusLo(&info->channel) & CD_ACT) ? 1 : 0;
 850 }
 851
 852 static void dtr_rts(struct tty_port *port, int on)
 853 {
 854         struct r_port *info = container_of(port, struct r_port, port);
 855         if (on) {
 856                 sSetDTR(&info->channel);
 857                 sSetRTS(&info->channel);
 858         } else {
 859                 sClrDTR(&info->channel);
 860                 sClrRTS(&info->channel);
 861         }
 862 }
 863
 864 /*
 865  *  Exception handler that opens a serial port.  Creates xmit_buf storage, fills in
 866  *  port's r_port struct.  Initializes the port hardware.
 867  */
 868 static int rp_open(struct tty_struct *tty, struct file *filp)
 869 {
 870         struct r_port *info;
 871         struct tty_port *port;
 872         int retval;
 873         CHANNEL_t *cp;
 874         unsigned long page;
 875
 876         info = rp_table[tty->index];
 877         if (info == NULL)
 878                 return -ENXIO;
 879         port = &info->port;
 880
 881         page = __get_free_page(GFP_KERNEL);
 882         if (!page)
 883                 return -ENOMEM;
 884
 885         /*
 886          * We must not sleep from here until the port is marked fully in use.
 887          */
 888         if (info->xmit_buf)
 889                 free_page(page);
 890         else
 891                 info->xmit_buf = (unsigned char *) page;
 892
 893         tty->driver_data = info;
 894         tty_port_tty_set(port, tty);
 895
 896         if (port->count++ == 0) {
 897                 atomic_inc(&rp_num_ports_open);
 898
 899 #ifdef ROCKET_DEBUG_OPEN
 900                 printk(KERN_INFO "rocket mod++ = %d...\n",
 901                                 atomic_read(&rp_num_ports_open));
 902 #endif
 903         }
 904 #ifdef ROCKET_DEBUG_OPEN
 905         printk(KERN_INFO "rp_open ttyR%d, count=%d\n", info->line, info->port.count);
 906 #endif
 907
 908         /*
 909          * Info->count is now 1; so it's safe to sleep now.
 910          */
 911         if (!tty_port_initialized(port)) {
 912                 cp = &info->channel;
 913                 sSetRxTrigger(cp, TRIG_1);
 914                 if (sGetChanStatus(cp) & CD_ACT)
 915                         info->cd_status = 1;
 916                 else
 917                         info->cd_status = 0;
 918                 sDisRxStatusMode(cp);
 919                 sFlushRxFIFO(cp);
 920                 sFlushTxFIFO(cp);
 921
 922                 sEnInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
 923                 sSetRxTrigger(cp, TRIG_1);
 924
 925                 sGetChanStatus(cp);
 926                 sDisRxStatusMode(cp);
 927                 sClrTxXOFF(cp);
 928
 929                 sDisCTSFlowCtl(cp);
 930                 sDisTxSoftFlowCtl(cp);
 931
 932                 sEnRxFIFO(cp);
 933                 sEnTransmit(cp);
 934
 935                 tty_port_set_initialized(&info->port, 1);
 936
 937                 configure_r_port(tty, info, NULL);
 938                 if (C_BAUD(tty)) {
 939                         sSetDTR(cp);
 940                         sSetRTS(cp);
 941                 }
 942         }
 943         /*  Starts (or resets) the maint polling loop */
 944         mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
 945
 946         retval = tty_port_block_til_ready(port, tty, filp);
 947         if (retval) {
 948 #ifdef ROCKET_DEBUG_OPEN
 949                 printk(KERN_INFO "rp_open returning after block_til_ready with %d\n", retval);
 950 #endif
 951                 return retval;
 952         }
 953         return 0;
 954 }
 955
 956 /*
 957  *  Exception handler that closes a serial port. info->port.count is considered critical.
 958  */
 959 static void rp_close(struct tty_struct *tty, struct file *filp)
 960 {
 961         struct r_port *info = tty->driver_data;
 962         struct tty_port *port = &info->port;
 963         int timeout;
 964         CHANNEL_t *cp;
 965
 966         if (rocket_paranoia_check(info, "rp_close"))
 967                 return;
 968
 969 #ifdef ROCKET_DEBUG_OPEN
 970         printk(KERN_INFO "rp_close ttyR%d, count = %d\n", info->line, info->port.count);
 971 #endif
 972
 973         if (tty_port_close_start(port, tty, filp) == 0)
 974                 return;
 975
 976         mutex_lock(&port->mutex);
 977         cp = &info->channel;
 978         /*
 979          * Before we drop DTR, make sure the UART transmitter
 980          * has completely drained; this is especially
 981          * important if there is a transmit FIFO!
 982          */
 983         timeout = (sGetTxCnt(cp) + 1) * HZ / info->cps;
 984         if (timeout == 0)
 985                 timeout = 1;
 986         rp_wait_until_sent(tty, timeout);
 987         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 988
 989         sDisTransmit(cp);
 990         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
 991         sDisCTSFlowCtl(cp);
 992         sDisTxSoftFlowCtl(cp);
 993         sClrTxXOFF(cp);
 994         sFlushRxFIFO(cp);
 995         sFlushTxFIFO(cp);
 996         sClrRTS(cp);
 997         if (C_HUPCL(tty))
 998                 sClrDTR(cp);
 999
1000         rp_flush_buffer(tty);
1001
1002         tty_ldisc_flush(tty);
1003
1004         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1005
1006         /* We can't yet use tty_port_close_end as the buffer handling in this
1007            driver is a bit different to the usual */
1008
1009         if (port->blocked_open) {
1010                 if (port->close_delay) {
1011                         msleep_interruptible(jiffies_to_msecs(port->close_delay));
1012                 }
1013                 wake_up_interruptible(&port->open_wait);
1014         } else {
1015                 if (info->xmit_buf) {
1016                         free_page((unsigned long) info->xmit_buf);
1017                         info->xmit_buf = NULL;
1018                 }
1019         }
1020         spin_lock_irq(&port->lock);
1021         tty->closing = 0;
1022         spin_unlock_irq(&port->lock);
1023         tty_port_set_initialized(port, 0);
1024         tty_port_set_active(port, 0);
1025         mutex_unlock(&port->mutex);
1026         tty_port_tty_set(port, NULL);
1027
1028         atomic_dec(&rp_num_ports_open);
1029
1030 #ifdef ROCKET_DEBUG_OPEN
1031         printk(KERN_INFO "rocket mod-- = %d...\n",
1032                         atomic_read(&rp_num_ports_open));
1033         printk(KERN_INFO "rp_close ttyR%d complete shutdown\n", info->line);
1034 #endif
1035
1036 }
1037
1038 static void rp_set_termios(struct tty_struct *tty,
1039                            struct ktermios *old_termios)
1040 {
1041         struct r_port *info = tty->driver_data;
1042         CHANNEL_t *cp;
1043         unsigned cflag;
1044
1045         if (rocket_paranoia_check(info, "rp_set_termios"))
1046                 return;
1047
1048         cflag = tty->termios.c_cflag;
1049
1050         /*
1051          * This driver doesn't support CS5 or CS6
1052          */
1053         if (((cflag & CSIZE) == CS5) || ((cflag & CSIZE) == CS6))
1054                 tty->termios.c_cflag =
1055                     ((cflag & ~CSIZE) | (old_termios->c_cflag & CSIZE));
1056         /* Or CMSPAR */
1057         tty->termios.c_cflag &= ~CMSPAR;
1058
1059         configure_r_port(tty, info, old_termios);
1060
1061         cp = &info->channel;
1062
1063         /* Handle transition to B0 status */
1064         if ((old_termios->c_cflag & CBAUD) && !C_BAUD(tty)) {
1065                 sClrDTR(cp);
1066                 sClrRTS(cp);
1067         }
1068
1069         /* Handle transition away from B0 status */
1070         if (!(old_termios->c_cflag & CBAUD) && C_BAUD(tty)) {
1071                 sSetRTS(cp);
1072                 sSetDTR(cp);
1073         }
1074
1075         if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty))
1076                 rp_start(tty);
1077 }
1078
1079 static int rp_break(struct tty_struct *tty, int break_state)
1080 {
1081         struct r_port *info = tty->driver_data;
1082         unsigned long flags;
1083
1084         if (rocket_paranoia_check(info, "rp_break"))
1085                 return -EINVAL;
1086
1087         spin_lock_irqsave(&info->slock, flags);
1088         if (break_state == -1)
1089                 sSendBreak(&info->channel);
1090         else
1091                 sClrBreak(&info->channel);
1092         spin_unlock_irqrestore(&info->slock, flags);
1093         return 0;
1094 }
1095
1096 /*
1097  * sGetChanRI used to be a macro in rocket_int.h. When the functionality for
1098  * the UPCI boards was added, it was decided to make this a function because
1099  * the macro was getting too complicated. All cases except the first one
1100  * (UPCIRingInd) are taken directly from the original macro.
1101  */
1102 static int sGetChanRI(CHANNEL_T * ChP)
1103 {
1104         CONTROLLER_t *CtlP = ChP->CtlP;
1105         int ChanNum = ChP->ChanNum;
1106         int RingInd = 0;
1107
1108         if (CtlP->UPCIRingInd)
1109                 RingInd = !(sInB(CtlP->UPCIRingInd) & sBitMapSetTbl[ChanNum]);
1110         else if (CtlP->AltChanRingIndicator)
1111                 RingInd = sInB((ByteIO_t) (ChP->ChanStat + 8)) & DSR_ACT;
1112         else if (CtlP->boardType == ROCKET_TYPE_PC104)
1113                 RingInd = !(sInB(CtlP->AiopIO[3]) & sBitMapSetTbl[ChanNum]);
1114
1115         return RingInd;
1116 }
1117
1118 /********************************************************************************************/
1119 /*  Here are the routines used by rp_ioctl.  These are all called from exception handlers.  */
1120
1121 /*
1122  *  Returns the state of the serial modem control lines.  These next 2 functions
1123  *  are the way kernel versions > 2.5 handle modem control lines rather than IOCTLs.
1124  */
1125 static int rp_tiocmget(struct tty_struct *tty)
1126 {
1127         struct r_port *info = tty->driver_data;
1128         unsigned int control, result, ChanStatus;
1129
1130         ChanStatus = sGetChanStatusLo(&info->channel);
1131         control = info->channel.TxControl[3];
1132         result = ((control & SET_RTS) ? TIOCM_RTS : 0) |
1133                 ((control & SET_DTR) ?  TIOCM_DTR : 0) |
1134                 ((ChanStatus & CD_ACT) ? TIOCM_CAR : 0) |
1135                 (sGetChanRI(&info->channel) ? TIOCM_RNG : 0) |
1136                 ((ChanStatus & DSR_ACT) ? TIOCM_DSR : 0) |
1137                 ((ChanStatus & CTS_ACT) ? TIOCM_CTS : 0);
1138
1139         return result;
1140 }
1141
1142 /*
1143  *  Sets the modem control lines
1144  */
1145 static int rp_tiocmset(struct tty_struct *tty,
1146                                 unsigned int set, unsigned int clear)
1147 {
1148         struct r_port *info = tty->driver_data;
1149
1150         if (set & TIOCM_RTS)
1151                 info->channel.TxControl[3] |= SET_RTS;
1152         if (set & TIOCM_DTR)
1153                 info->channel.TxControl[3] |= SET_DTR;
1154         if (clear & TIOCM_RTS)
1155                 info->channel.TxControl[3] &= ~SET_RTS;
1156         if (clear & TIOCM_DTR)
1157                 info->channel.TxControl[3] &= ~SET_DTR;
1158
1159         out32(info->channel.IndexAddr, info->channel.TxControl);
1160         return 0;
1161 }
1162
1163 static int get_config(struct r_port *info, struct rocket_config __user *retinfo)
1164 {
1165         struct rocket_config tmp;
1166
1167         memset(&tmp, 0, sizeof (tmp));
1168         mutex_lock(&info->port.mutex);
1169         tmp.line = info->line;
1170         tmp.flags = info->flags;
1171         tmp.close_delay = info->port.close_delay;
1172         tmp.closing_wait = info->port.closing_wait;
1173         tmp.port = rcktpt_io_addr[(info->line >> 5) & 3];
1174         mutex_unlock(&info->port.mutex);
1175
1176         if (copy_to_user(retinfo, &tmp, sizeof (*retinfo)))
1177                 return -EFAULT;
1178         return 0;
1179 }
1180
1181 static int set_config(struct tty_struct *tty, struct r_port *info,
1182                                         struct rocket_config __user *new_info)
1183 {
1184         struct rocket_config new_serial;
1185
1186         if (copy_from_user(&new_serial, new_info, sizeof (new_serial)))
1187                 return -EFAULT;
1188
1189         mutex_lock(&info->port.mutex);
1190         if (!capable(CAP_SYS_ADMIN))
1191         {
1192                 if ((new_serial.flags & ~ROCKET_USR_MASK) != (info->flags & ~ROCKET_USR_MASK)) {
1193                         mutex_unlock(&info->port.mutex);
1194                         return -EPERM;
1195                 }
1196                 info->flags = ((info->flags & ~ROCKET_USR_MASK) | (new_serial.flags & ROCKET_USR_MASK));
1197                 mutex_unlock(&info->port.mutex);
1198                 return 0;
1199         }
1200
1201         if ((new_serial.flags ^ info->flags) & ROCKET_SPD_MASK) {
1202                 /* warn about deprecation, unless clearing */
1203                 if (new_serial.flags & ROCKET_SPD_MASK)
1204                         dev_warn_ratelimited(tty->dev, "use of SPD flags is deprecated\n");
1205         }
1206
1207         info->flags = ((info->flags & ~ROCKET_FLAGS) | (new_serial.flags & ROCKET_FLAGS));
1208         info->port.close_delay = new_serial.close_delay;
1209         info->port.closing_wait = new_serial.closing_wait;
1210
1211         mutex_unlock(&info->port.mutex);
1212
1213         configure_r_port(tty, info, NULL);
1214         return 0;
1215 }
1216
1217 /*
1218  *  This function fills in a rocket_ports struct with information
1219  *  about what boards/ports are in the system.  This info is passed
1220  *  to user space.  See setrocket.c where the info is used to create
1221  *  the /dev/ttyRx ports.
1222  */
1223 static int get_ports(struct r_port *info, struct rocket_ports __user *retports)
1224 {
1225         struct rocket_ports *tmp;
1226         int board, ret = 0;
1227
1228         tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
1229         if (!tmp)
1230                 return -ENOMEM;
1231
1232         tmp->tty_major = rocket_driver->major;
1233
1234         for (board = 0; board < 4; board++) {
1235                 tmp->rocketModel[board].model = rocketModel[board].model;
1236                 strcpy(tmp->rocketModel[board].modelString,
1237                        rocketModel[board].modelString);
1238                 tmp->rocketModel[board].numPorts = rocketModel[board].numPorts;
1239                 tmp->rocketModel[board].loadrm2 = rocketModel[board].loadrm2;
1240                 tmp->rocketModel[board].startingPortNumber =
1241                         rocketModel[board].startingPortNumber;
1242         }
1243         if (copy_to_user(retports, tmp, sizeof(*retports)))
1244                 ret = -EFAULT;
1245         kfree(tmp);
1246         return ret;
1247 }
1248
1249 static int reset_rm2(struct r_port *info, void __user *arg)
1250 {
1251         int reset;
1252
1253         if (!capable(CAP_SYS_ADMIN))
1254                 return -EPERM;
1255
1256         if (copy_from_user(&reset, arg, sizeof (int)))
1257                 return -EFAULT;
1258         if (reset)
1259                 reset = 1;
1260
1261         if (rcktpt_type[info->board] != ROCKET_TYPE_MODEMII &&
1262             rcktpt_type[info->board] != ROCKET_TYPE_MODEMIII)
1263                 return -EINVAL;
1264
1265         if (info->ctlp->BusType == isISA)
1266                 sModemReset(info->ctlp, info->chan, reset);
1267         else
1268                 sPCIModemReset(info->ctlp, info->chan, reset);
1269
1270         return 0;
1271 }
1272
1273 static int get_version(struct r_port *info, struct rocket_version __user *retvers)
1274 {
1275         if (copy_to_user(retvers, &driver_version, sizeof (*retvers)))
1276                 return -EFAULT;
1277         return 0;
1278 }
1279
1280 /*  IOCTL call handler into the driver */
1281 static int rp_ioctl(struct tty_struct *tty,
1282                     unsigned int cmd, unsigned long arg)
1283 {
1284         struct r_port *info = tty->driver_data;
1285         void __user *argp = (void __user *)arg;
1286         int ret = 0;
1287
1288         if (cmd != RCKP_GET_PORTS && rocket_paranoia_check(info, "rp_ioctl"))
1289                 return -ENXIO;
1290
1291         switch (cmd) {
1292         case RCKP_GET_CONFIG:
1293                 dev_warn_ratelimited(tty->dev,
1294                                         "RCKP_GET_CONFIG option is deprecated\n");
1295                 ret = get_config(info, argp);
1296                 break;
1297         case RCKP_SET_CONFIG:
1298                 dev_warn_ratelimited(tty->dev,
1299                                         "RCKP_SET_CONFIG option is deprecated\n");
1300                 ret = set_config(tty, info, argp);
1301                 break;
1302         case RCKP_GET_PORTS:
1303                 dev_warn_ratelimited(tty->dev,
1304                                         "RCKP_GET_PORTS option is deprecated\n");
1305                 ret = get_ports(info, argp);
1306                 break;
1307         case RCKP_RESET_RM2:
1308                 dev_warn_ratelimited(tty->dev,
1309                                         "RCKP_RESET_RM2 option is deprecated\n");
1310                 ret = reset_rm2(info, argp);
1311                 break;
1312         case RCKP_GET_VERSION:
1313                 dev_warn_ratelimited(tty->dev,
1314                                         "RCKP_GET_VERSION option is deprecated\n");
1315                 ret = get_version(info, argp);
1316                 break;
1317         default:
1318                 ret = -ENOIOCTLCMD;
1319         }
1320         return ret;
1321 }
1322
1323 static void rp_send_xchar(struct tty_struct *tty, char ch)
1324 {
1325         struct r_port *info = tty->driver_data;
1326         CHANNEL_t *cp;
1327
1328         if (rocket_paranoia_check(info, "rp_send_xchar"))
1329                 return;
1330
1331         cp = &info->channel;
1332         if (sGetTxCnt(cp))
1333                 sWriteTxPrioByte(cp, ch);
1334         else
1335                 sWriteTxByte(sGetTxRxDataIO(cp), ch);
1336 }
1337
1338 static void rp_throttle(struct tty_struct *tty)
1339 {
1340         struct r_port *info = tty->driver_data;
1341
1342 #ifdef ROCKET_DEBUG_THROTTLE
1343         printk(KERN_INFO "throttle %s ....\n", tty->name);
1344 #endif
1345
1346         if (rocket_paranoia_check(info, "rp_throttle"))
1347                 return;
1348
1349         if (I_IXOFF(tty))
1350                 rp_send_xchar(tty, STOP_CHAR(tty));
1351
1352         sClrRTS(&info->channel);
1353 }
1354
1355 static void rp_unthrottle(struct tty_struct *tty)
1356 {
1357         struct r_port *info = tty->driver_data;
1358 #ifdef ROCKET_DEBUG_THROTTLE
1359         printk(KERN_INFO "unthrottle %s ....\n", tty->name);
1360 #endif
1361
1362         if (rocket_paranoia_check(info, "rp_unthrottle"))
1363                 return;
1364
1365         if (I_IXOFF(tty))
1366                 rp_send_xchar(tty, START_CHAR(tty));
1367
1368         sSetRTS(&info->channel);
1369 }
1370
1371 /*
1372  * ------------------------------------------------------------
1373  * rp_stop() and rp_start()
1374  *
1375  * This routines are called before setting or resetting tty->stopped.
1376  * They enable or disable transmitter interrupts, as necessary.
1377  * ------------------------------------------------------------
1378  */
1379 static void rp_stop(struct tty_struct *tty)
1380 {
1381         struct r_port *info = tty->driver_data;
1382
1383 #ifdef ROCKET_DEBUG_FLOW
1384         printk(KERN_INFO "stop %s: %d %d....\n", tty->name,
1385                info->xmit_cnt, info->xmit_fifo_room);
1386 #endif
1387
1388         if (rocket_paranoia_check(info, "rp_stop"))
1389                 return;
1390
1391         if (sGetTxCnt(&info->channel))
1392                 sDisTransmit(&info->channel);
1393 }
1394
1395 static void rp_start(struct tty_struct *tty)
1396 {
1397         struct r_port *info = tty->driver_data;
1398
1399 #ifdef ROCKET_DEBUG_FLOW
1400         printk(KERN_INFO "start %s: %d %d....\n", tty->name,
1401                info->xmit_cnt, info->xmit_fifo_room);
1402 #endif
1403
1404         if (rocket_paranoia_check(info, "rp_stop"))
1405                 return;
1406
1407         sEnTransmit(&info->channel);
1408         set_bit((info->aiop * 8) + info->chan,
1409                 (void *) &xmit_flags[info->board]);
1410 }
1411
1412 /*
1413  * rp_wait_until_sent() --- wait until the transmitter is empty
1414  */
1415 static void rp_wait_until_sent(struct tty_struct *tty, int timeout)
1416 {
1417         struct r_port *info = tty->driver_data;
1418         CHANNEL_t *cp;
1419         unsigned long orig_jiffies;
1420         int check_time, exit_time;
1421         int txcnt;
1422
1423         if (rocket_paranoia_check(info, "rp_wait_until_sent"))
1424                 return;
1425
1426         cp = &info->channel;
1427
1428         orig_jiffies = jiffies;
1429 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1430         printk(KERN_INFO "In %s(%d) (jiff=%lu)...\n", __func__, timeout,
1431                jiffies);
1432         printk(KERN_INFO "cps=%d...\n", info->cps);
1433 #endif
1434         while (1) {
1435                 txcnt = sGetTxCnt(cp);
1436                 if (!txcnt) {
1437                         if (sGetChanStatusLo(cp) & TXSHRMT)
1438                                 break;
1439                         check_time = (HZ / info->cps) / 5;
1440                 } else {
1441                         check_time = HZ * txcnt / info->cps;
1442                 }
1443                 if (timeout) {
1444                         exit_time = orig_jiffies + timeout - jiffies;
1445                         if (exit_time <= 0)
1446                                 break;
1447                         if (exit_time < check_time)
1448                                 check_time = exit_time;
1449                 }
1450                 if (check_time == 0)
1451                         check_time = 1;
1452 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1453                 printk(KERN_INFO "txcnt = %d (jiff=%lu,check=%d)...\n", txcnt,
1454                                 jiffies, check_time);
1455 #endif
1456                 msleep_interruptible(jiffies_to_msecs(check_time));
1457                 if (signal_pending(current))
1458                         break;
1459         }
1460         __set_current_state(TASK_RUNNING);
1461 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1462         printk(KERN_INFO "txcnt = %d (jiff=%lu)...done\n", txcnt, jiffies);
1463 #endif
1464 }
1465
1466 /*
1467  * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
1468  */
1469 static void rp_hangup(struct tty_struct *tty)
1470 {
1471         CHANNEL_t *cp;
1472         struct r_port *info = tty->driver_data;
1473         unsigned long flags;
1474
1475         if (rocket_paranoia_check(info, "rp_hangup"))
1476                 return;
1477
1478 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
1479         printk(KERN_INFO "rp_hangup of ttyR%d...\n", info->line);
1480 #endif
1481         rp_flush_buffer(tty);
1482         spin_lock_irqsave(&info->port.lock, flags);
1483         if (info->port.count)
1484                 atomic_dec(&rp_num_ports_open);
1485         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1486         spin_unlock_irqrestore(&info->port.lock, flags);
1487
1488         tty_port_hangup(&info->port);
1489
1490         cp = &info->channel;
1491         sDisRxFIFO(cp);
1492         sDisTransmit(cp);
1493         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1494         sDisCTSFlowCtl(cp);
1495         sDisTxSoftFlowCtl(cp);
1496         sClrTxXOFF(cp);
1497         tty_port_set_initialized(&info->port, 0);
1498
1499         wake_up_interruptible(&info->port.open_wait);
1500 }
1501
1502 /*
1503  *  Exception handler - write char routine.  The RocketPort driver uses a
1504  *  double-buffering strategy, with the twist that if the in-memory CPU
1505  *  buffer is empty, and there's space in the transmit FIFO, the
1506  *  writing routines will write directly to transmit FIFO.
1507  *  Write buffer and counters protected by spinlocks
1508  */
1509 static int rp_put_char(struct tty_struct *tty, unsigned char ch)
1510 {
1511         struct r_port *info = tty->driver_data;
1512         CHANNEL_t *cp;
1513         unsigned long flags;
1514
1515         if (rocket_paranoia_check(info, "rp_put_char"))
1516                 return 0;
1517
1518         /*
1519          * Grab the port write mutex, locking out other processes that try to
1520          * write to this port
1521          */
1522         mutex_lock(&info->write_mtx);
1523
1524 #ifdef ROCKET_DEBUG_WRITE
1525         printk(KERN_INFO "rp_put_char %c...\n", ch);
1526 #endif
1527
1528         spin_lock_irqsave(&info->slock, flags);
1529         cp = &info->channel;
1530
1531         if (!tty->stopped && info->xmit_fifo_room == 0)
1532                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1533
1534         if (tty->stopped || info->xmit_fifo_room == 0 || info->xmit_cnt != 0) {
1535                 info->xmit_buf[info->xmit_head++] = ch;
1536                 info->xmit_head &= XMIT_BUF_SIZE - 1;
1537                 info->xmit_cnt++;
1538                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1539         } else {
1540                 sOutB(sGetTxRxDataIO(cp), ch);
1541                 info->xmit_fifo_room--;
1542         }
1543         spin_unlock_irqrestore(&info->slock, flags);
1544         mutex_unlock(&info->write_mtx);
1545         return 1;
1546 }
1547
1548 /*
1549  *  Exception handler - write routine, called when user app writes to the device.
1550  *  A per port write mutex is used to protect from another process writing to
1551  *  this port at the same time.  This other process could be running on the other CPU
1552  *  or get control of the CPU if the copy_from_user() blocks due to a page fault (swapped out).
1553  *  Spinlocks protect the info xmit members.
1554  */
1555 static int rp_write(struct tty_struct *tty,
1556                     const unsigned char *buf, int count)
1557 {
1558         struct r_port *info = tty->driver_data;
1559         CHANNEL_t *cp;
1560         const unsigned char *b;
1561         int c, retval = 0;
1562         unsigned long flags;
1563
1564         if (count <= 0 || rocket_paranoia_check(info, "rp_write"))
1565                 return 0;
1566
1567         if (mutex_lock_interruptible(&info->write_mtx))
1568                 return -ERESTARTSYS;
1569
1570 #ifdef ROCKET_DEBUG_WRITE
1571         printk(KERN_INFO "rp_write %d chars...\n", count);
1572 #endif
1573         cp = &info->channel;
1574
1575         if (!tty->stopped && info->xmit_fifo_room < count)
1576                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1577
1578         /*
1579          *  If the write queue for the port is empty, and there is FIFO space, stuff bytes
1580          *  into FIFO.  Use the write queue for temp storage.
1581          */
1582         if (!tty->stopped && info->xmit_cnt == 0 && info->xmit_fifo_room > 0) {
1583                 c = min(count, info->xmit_fifo_room);
1584                 b = buf;
1585
1586                 /*  Push data into FIFO, 2 bytes at a time */
1587                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) b, c / 2);
1588
1589                 /*  If there is a byte remaining, write it */
1590                 if (c & 1)
1591                         sOutB(sGetTxRxDataIO(cp), b[c - 1]);
1592
1593                 retval += c;
1594                 buf += c;
1595                 count -= c;
1596
1597                 spin_lock_irqsave(&info->slock, flags);
1598                 info->xmit_fifo_room -= c;
1599                 spin_unlock_irqrestore(&info->slock, flags);
1600         }
1601
1602         /* If count is zero, we wrote it all and are done */
1603         if (!count)
1604                 goto end;
1605
1606         /*  Write remaining data into the port's xmit_buf */
1607         while (1) {
1608                 /* Hung up ? */
1609                 if (!tty_port_active(&info->port))
1610                         goto end;
1611                 c = min(count, XMIT_BUF_SIZE - info->xmit_cnt - 1);
1612                 c = min(c, XMIT_BUF_SIZE - info->xmit_head);
1613                 if (c <= 0)
1614                         break;
1615
1616                 b = buf;
1617                 memcpy(info->xmit_buf + info->xmit_head, b, c);
1618
1619                 spin_lock_irqsave(&info->slock, flags);
1620                 info->xmit_head =
1621                     (info->xmit_head + c) & (XMIT_BUF_SIZE - 1);
1622                 info->xmit_cnt += c;
1623                 spin_unlock_irqrestore(&info->slock, flags);
1624
1625                 buf += c;
1626                 count -= c;
1627                 retval += c;
1628         }
1629
1630         if ((retval > 0) && !tty->stopped)
1631                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1632
1633 end:
1634         if (info->xmit_cnt < WAKEUP_CHARS) {
1635                 tty_wakeup(tty);
1636 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1637                 wake_up_interruptible(&tty->poll_wait);
1638 #endif
1639         }
1640         mutex_unlock(&info->write_mtx);
1641         return retval;
1642 }
1643
1644 /*
1645  * Return the number of characters that can be sent.  We estimate
1646  * only using the in-memory transmit buffer only, and ignore the
1647  * potential space in the transmit FIFO.
1648  */
1649 static int rp_write_room(struct tty_struct *tty)
1650 {
1651         struct r_port *info = tty->driver_data;
1652         int ret;
1653
1654         if (rocket_paranoia_check(info, "rp_write_room"))
1655                 return 0;
1656
1657         ret = XMIT_BUF_SIZE - info->xmit_cnt - 1;
1658         if (ret < 0)
1659                 ret = 0;
1660 #ifdef ROCKET_DEBUG_WRITE
1661         printk(KERN_INFO "rp_write_room returns %d...\n", ret);
1662 #endif
1663         return ret;
1664 }
1665
1666 /*
1667  * Return the number of characters in the buffer.  Again, this only
1668  * counts those characters in the in-memory transmit buffer.
1669  */
1670 static int rp_chars_in_buffer(struct tty_struct *tty)
1671 {
1672         struct r_port *info = tty->driver_data;
1673
1674         if (rocket_paranoia_check(info, "rp_chars_in_buffer"))
1675                 return 0;
1676
1677 #ifdef ROCKET_DEBUG_WRITE
1678         printk(KERN_INFO "rp_chars_in_buffer returns %d...\n", info->xmit_cnt);
1679 #endif
1680         return info->xmit_cnt;
1681 }
1682
1683 /*
1684  *  Flushes the TX fifo for a port, deletes data in the xmit_buf stored in the
1685  *  r_port struct for the port.  Note that spinlock are used to protect info members,
1686  *  do not call this function if the spinlock is already held.
1687  */
1688 static void rp_flush_buffer(struct tty_struct *tty)
1689 {
1690         struct r_port *info = tty->driver_data;
1691         CHANNEL_t *cp;
1692         unsigned long flags;
1693
1694         if (rocket_paranoia_check(info, "rp_flush_buffer"))
1695                 return;
1696
1697         spin_lock_irqsave(&info->slock, flags);
1698         info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1699         spin_unlock_irqrestore(&info->slock, flags);
1700
1701 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1702         wake_up_interruptible(&tty->poll_wait);
1703 #endif
1704         tty_wakeup(tty);
1705
1706         cp = &info->channel;
1707         sFlushTxFIFO(cp);
1708 }
1709
1710 #ifdef CONFIG_PCI
1711
1712 static const struct pci_device_id rocket_pci_ids[] = {
1713         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP4QUAD) },
1714         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8OCTA) },
1715         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP8OCTA) },
1716         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8INTF) },
1717         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP8INTF) },
1718         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8J) },
1719         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP4J) },
1720         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP8SNI) },
1721         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP16SNI) },
1722         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP16INTF) },
1723         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP16INTF) },
1724         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_CRP16INTF) },
1725         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP32INTF) },
1726         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_URP32INTF) },
1727         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RPP4) },
1728         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RPP8) },
1729         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP2_232) },
1730         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP2_422) },
1731         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP6M) },
1732         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_RP4M) },
1733         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_UPCI_RM3_8PORT) },
1734         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_DEVICE_ID_UPCI_RM3_4PORT) },
1735         { }
1736 };
1737 MODULE_DEVICE_TABLE(pci, rocket_pci_ids);
1738
1739 /*  Resets the speaker controller on RocketModem II and III devices */
1740 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model)
1741 {
1742         ByteIO_t addr;
1743
1744         /* RocketModem II speaker control is at the 8th port location of offset 0x40 */
1745         if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) {
1746                 addr = CtlP->AiopIO[0] + 0x4F;
1747                 sOutB(addr, 0);
1748         }
1749
1750         /* RocketModem III speaker control is at the 1st port location of offset 0x80 */
1751         if ((model == MODEL_UPCI_RM3_8PORT)
1752             || (model == MODEL_UPCI_RM3_4PORT)) {
1753                 addr = CtlP->AiopIO[0] + 0x88;
1754                 sOutB(addr, 0);
1755         }
1756 }
1757
1758 /***************************************************************************
1759 Function: sPCIInitController
1760 Purpose:  Initialization of controller global registers and controller
1761           structure.
1762 Call:     sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
1763                           IRQNum,Frequency,PeriodicOnly)
1764           CONTROLLER_T *CtlP; Ptr to controller structure
1765           int CtlNum; Controller number
1766           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
1767              This list must be in the order the AIOPs will be found on the
1768              controller.  Once an AIOP in the list is not found, it is
1769              assumed that there are no more AIOPs on the controller.
1770           int AiopIOListSize; Number of addresses in AiopIOList
1771           int IRQNum; Interrupt Request number.  Can be any of the following:
1772                          0: Disable global interrupts
1773                          3: IRQ 3
1774                          4: IRQ 4
1775                          5: IRQ 5
1776                          9: IRQ 9
1777                          10: IRQ 10
1778                          11: IRQ 11
1779                          12: IRQ 12
1780                          15: IRQ 15
1781           Byte_t Frequency: A flag identifying the frequency
1782                    of the periodic interrupt, can be any one of the following:
1783                       FREQ_DIS - periodic interrupt disabled
1784                       FREQ_137HZ - 137 Hertz
1785                       FREQ_69HZ - 69 Hertz
1786                       FREQ_34HZ - 34 Hertz
1787                       FREQ_17HZ - 17 Hertz
1788                       FREQ_9HZ - 9 Hertz
1789                       FREQ_4HZ - 4 Hertz
1790                    If IRQNum is set to 0 the Frequency parameter is
1791                    overidden, it is forced to a value of FREQ_DIS.
1792           int PeriodicOnly: 1 if all interrupts except the periodic
1793                                interrupt are to be blocked.
1794                             0 is both the periodic interrupt and
1795                                other channel interrupts are allowed.
1796                             If IRQNum is set to 0 the PeriodicOnly parameter is
1797                                overidden, it is forced to a value of 0.
1798 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
1799                initialization failed.
1800
1801 Comments:
1802           If periodic interrupts are to be disabled but AIOP interrupts
1803           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
1804
1805           If interrupts are to be completely disabled set IRQNum to 0.
1806
1807           Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
1808           invalid combination.
1809
1810           This function performs initialization of global interrupt modes,
1811           but it does not actually enable global interrupts.  To enable
1812           and disable global interrupts use functions sEnGlobalInt() and
1813           sDisGlobalInt().  Enabling of global interrupts is normally not
1814           done until all other initializations are complete.
1815
1816           Even if interrupts are globally enabled, they must also be
1817           individually enabled for each channel that is to generate
1818           interrupts.
1819
1820 Warnings: No range checking on any of the parameters is done.
1821
1822           No context switches are allowed while executing this function.
1823
1824           After this function all AIOPs on the controller are disabled,
1825           they can be enabled with sEnAiop().
1826 */
1827 static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
1828                               ByteIO_t * AiopIOList, int AiopIOListSize,
1829                               WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
1830                               int PeriodicOnly, int altChanRingIndicator,
1831                               int UPCIRingInd)
1832 {
1833         int i;
1834         ByteIO_t io;
1835
1836         CtlP->AltChanRingIndicator = altChanRingIndicator;
1837         CtlP->UPCIRingInd = UPCIRingInd;
1838         CtlP->CtlNum = CtlNum;
1839         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
1840         CtlP->BusType = isPCI;  /* controller release 1 */
1841
1842         if (ConfigIO) {
1843                 CtlP->isUPCI = 1;
1844                 CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL;
1845                 CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL;
1846                 CtlP->AiopIntrBits = upci_aiop_intr_bits;
1847         } else {
1848                 CtlP->isUPCI = 0;
1849                 CtlP->PCIIO =
1850                     (WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC);
1851                 CtlP->AiopIntrBits = aiop_intr_bits;
1852         }
1853
1854         sPCIControllerEOI(CtlP);        /* clear EOI if warm init */
1855         /* Init AIOPs */
1856         CtlP->NumAiop = 0;
1857         for (i = 0; i < AiopIOListSize; i++) {
1858                 io = AiopIOList[i];
1859                 CtlP->AiopIO[i] = (WordIO_t) io;
1860                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
1861
1862                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
1863                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
1864                         break;  /* done looking for AIOPs */
1865
1866                 CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
1867                 sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
1868                 sOutB(io + _INDX_DATA, sClockPrescale);
1869                 CtlP->NumAiop++;        /* bump count of AIOPs */
1870         }
1871
1872         if (CtlP->NumAiop == 0)
1873                 return (-1);
1874         else
1875                 return (CtlP->NumAiop);
1876 }
1877
1878 /*
1879  *  Called when a PCI card is found.  Retrieves and stores model information,
1880  *  init's aiopic and serial port hardware.
1881  *  Inputs:  i is the board number (0-n)
1882  */
1883 static __init int register_PCI(int i, struct pci_dev *dev)
1884 {
1885         int num_aiops, aiop, max_num_aiops, num_chan, chan;
1886         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
1887         CONTROLLER_t *ctlp;
1888
1889         int fast_clock = 0;
1890         int altChanRingIndicator = 0;
1891         int ports_per_aiop = 8;
1892         WordIO_t ConfigIO = 0;
1893         ByteIO_t UPCIRingInd = 0;
1894
1895         if (!dev || !pci_match_id(rocket_pci_ids, dev) ||
1896             pci_enable_device(dev) || i >= NUM_BOARDS)
1897                 return 0;
1898
1899         rcktpt_io_addr[i] = pci_resource_start(dev, 0);
1900
1901         rcktpt_type[i] = ROCKET_TYPE_NORMAL;
1902         rocketModel[i].loadrm2 = 0;
1903         rocketModel[i].startingPortNumber = nextLineNumber;
1904
1905         /*  Depending on the model, set up some config variables */
1906         switch (dev->device) {
1907         case PCI_DEVICE_ID_RP4QUAD:
1908                 max_num_aiops = 1;
1909                 ports_per_aiop = 4;
1910                 rocketModel[i].model = MODEL_RP4QUAD;
1911                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/quad cable");
1912                 rocketModel[i].numPorts = 4;
1913                 break;
1914         case PCI_DEVICE_ID_RP8OCTA:
1915                 max_num_aiops = 1;
1916                 rocketModel[i].model = MODEL_RP8OCTA;
1917                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/octa cable");
1918                 rocketModel[i].numPorts = 8;
1919                 break;
1920         case PCI_DEVICE_ID_URP8OCTA:
1921                 max_num_aiops = 1;
1922                 rocketModel[i].model = MODEL_UPCI_RP8OCTA;
1923                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/octa cable");
1924                 rocketModel[i].numPorts = 8;
1925                 break;
1926         case PCI_DEVICE_ID_RP8INTF:
1927                 max_num_aiops = 1;
1928                 rocketModel[i].model = MODEL_RP8INTF;
1929                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/external I/F");
1930                 rocketModel[i].numPorts = 8;
1931                 break;
1932         case PCI_DEVICE_ID_URP8INTF:
1933                 max_num_aiops = 1;
1934                 rocketModel[i].model = MODEL_UPCI_RP8INTF;
1935                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/external I/F");
1936                 rocketModel[i].numPorts = 8;
1937                 break;
1938         case PCI_DEVICE_ID_RP8J:
1939                 max_num_aiops = 1;
1940                 rocketModel[i].model = MODEL_RP8J;
1941                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/RJ11 connectors");
1942                 rocketModel[i].numPorts = 8;
1943                 break;
1944         case PCI_DEVICE_ID_RP4J:
1945                 max_num_aiops = 1;
1946                 ports_per_aiop = 4;
1947                 rocketModel[i].model = MODEL_RP4J;
1948                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/RJ45 connectors");
1949                 rocketModel[i].numPorts = 4;
1950                 break;
1951         case PCI_DEVICE_ID_RP8SNI:
1952                 max_num_aiops = 1;
1953                 rocketModel[i].model = MODEL_RP8SNI;
1954                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/ custom DB78");
1955                 rocketModel[i].numPorts = 8;
1956                 break;
1957         case PCI_DEVICE_ID_RP16SNI:
1958                 max_num_aiops = 2;
1959                 rocketModel[i].model = MODEL_RP16SNI;
1960                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/ custom DB78");
1961                 rocketModel[i].numPorts = 16;
1962                 break;
1963         case PCI_DEVICE_ID_RP16INTF:
1964                 max_num_aiops = 2;
1965                 rocketModel[i].model = MODEL_RP16INTF;
1966                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/external I/F");
1967                 rocketModel[i].numPorts = 16;
1968                 break;
1969         case PCI_DEVICE_ID_URP16INTF:
1970                 max_num_aiops = 2;
1971                 rocketModel[i].model = MODEL_UPCI_RP16INTF;
1972                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 16 port w/external I/F");
1973                 rocketModel[i].numPorts = 16;
1974                 break;
1975         case PCI_DEVICE_ID_CRP16INTF:
1976                 max_num_aiops = 2;
1977                 rocketModel[i].model = MODEL_CPCI_RP16INTF;
1978                 strcpy(rocketModel[i].modelString, "RocketPort Compact PCI 16 port w/external I/F");
1979                 rocketModel[i].numPorts = 16;
1980                 break;
1981         case PCI_DEVICE_ID_RP32INTF:
1982                 max_num_aiops = 4;
1983                 rocketModel[i].model = MODEL_RP32INTF;
1984                 strcpy(rocketModel[i].modelString, "RocketPort 32 port w/external I/F");
1985                 rocketModel[i].numPorts = 32;
1986                 break;
1987         case PCI_DEVICE_ID_URP32INTF:
1988                 max_num_aiops = 4;
1989                 rocketModel[i].model = MODEL_UPCI_RP32INTF;
1990                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 32 port w/external I/F");
1991                 rocketModel[i].numPorts = 32;
1992                 break;
1993         case PCI_DEVICE_ID_RPP4:
1994                 max_num_aiops = 1;
1995                 ports_per_aiop = 4;
1996                 altChanRingIndicator++;
1997                 fast_clock++;
1998                 rocketModel[i].model = MODEL_RPP4;
1999                 strcpy(rocketModel[i].modelString, "RocketPort Plus 4 port");
2000                 rocketModel[i].numPorts = 4;
2001                 break;
2002         case PCI_DEVICE_ID_RPP8:
2003                 max_num_aiops = 2;
2004                 ports_per_aiop = 4;
2005                 altChanRingIndicator++;
2006                 fast_clock++;
2007                 rocketModel[i].model = MODEL_RPP8;
2008                 strcpy(rocketModel[i].modelString, "RocketPort Plus 8 port");
2009                 rocketModel[i].numPorts = 8;
2010                 break;
2011         case PCI_DEVICE_ID_RP2_232:
2012                 max_num_aiops = 1;
2013                 ports_per_aiop = 2;
2014                 altChanRingIndicator++;
2015                 fast_clock++;
2016                 rocketModel[i].model = MODEL_RP2_232;
2017                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS232");
2018                 rocketModel[i].numPorts = 2;
2019                 break;
2020         case PCI_DEVICE_ID_RP2_422:
2021                 max_num_aiops = 1;
2022                 ports_per_aiop = 2;
2023                 altChanRingIndicator++;
2024                 fast_clock++;
2025                 rocketModel[i].model = MODEL_RP2_422;
2026                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS422");
2027                 rocketModel[i].numPorts = 2;
2028                 break;
2029         case PCI_DEVICE_ID_RP6M:
2030
2031                 max_num_aiops = 1;
2032                 ports_per_aiop = 6;
2033
2034                 /*  If revision is 1, the rocketmodem flash must be loaded.
2035                  *  If it is 2 it is a "socketed" version. */
2036                 if (dev->revision == 1) {
2037                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2038                         rocketModel[i].loadrm2 = 1;
2039                 } else {
2040                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2041                 }
2042
2043                 rocketModel[i].model = MODEL_RP6M;
2044                 strcpy(rocketModel[i].modelString, "RocketModem 6 port");
2045                 rocketModel[i].numPorts = 6;
2046                 break;
2047         case PCI_DEVICE_ID_RP4M:
2048                 max_num_aiops = 1;
2049                 ports_per_aiop = 4;
2050                 if (dev->revision == 1) {
2051                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2052                         rocketModel[i].loadrm2 = 1;
2053                 } else {
2054                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2055                 }
2056
2057                 rocketModel[i].model = MODEL_RP4M;
2058                 strcpy(rocketModel[i].modelString, "RocketModem 4 port");
2059                 rocketModel[i].numPorts = 4;
2060                 break;
2061         default:
2062                 max_num_aiops = 0;
2063                 break;
2064         }
2065
2066         /*
2067          * Check for UPCI boards.
2068          */
2069
2070         switch (dev->device) {
2071         case PCI_DEVICE_ID_URP32INTF:
2072         case PCI_DEVICE_ID_URP8INTF:
2073         case PCI_DEVICE_ID_URP16INTF:
2074         case PCI_DEVICE_ID_CRP16INTF:
2075         case PCI_DEVICE_ID_URP8OCTA:
2076                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2077                 ConfigIO = pci_resource_start(dev, 1);
2078                 if (dev->device == PCI_DEVICE_ID_URP8OCTA) {
2079                         UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2080
2081                         /*
2082                          * Check for octa or quad cable.
2083                          */
2084                         if (!
2085                             (sInW(ConfigIO + _PCI_9030_GPIO_CTRL) &
2086                              PCI_GPIO_CTRL_8PORT)) {
2087                                 ports_per_aiop = 4;
2088                                 rocketModel[i].numPorts = 4;
2089                         }
2090                 }
2091                 break;
2092         case PCI_DEVICE_ID_UPCI_RM3_8PORT:
2093                 max_num_aiops = 1;
2094                 rocketModel[i].model = MODEL_UPCI_RM3_8PORT;
2095                 strcpy(rocketModel[i].modelString, "RocketModem III 8 port");
2096                 rocketModel[i].numPorts = 8;
2097                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2098                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2099                 ConfigIO = pci_resource_start(dev, 1);
2100                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2101                 break;
2102         case PCI_DEVICE_ID_UPCI_RM3_4PORT:
2103                 max_num_aiops = 1;
2104                 rocketModel[i].model = MODEL_UPCI_RM3_4PORT;
2105                 strcpy(rocketModel[i].modelString, "RocketModem III 4 port");
2106                 rocketModel[i].numPorts = 4;
2107                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2108                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2109                 ConfigIO = pci_resource_start(dev, 1);
2110                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2111                 break;
2112         default:
2113                 break;
2114         }
2115
2116         if (fast_clock) {
2117                 sClockPrescale = 0x12;  /* mod 2 (divide by 3) */
2118                 rp_baud_base[i] = 921600;
2119         } else {
2120                 /*
2121                  * If support_low_speed is set, use the slow clock
2122                  * prescale, which supports 50 bps
2123                  */
2124                 if (support_low_speed) {
2125                         /* mod 9 (divide by 10) prescale */
2126                         sClockPrescale = 0x19;
2127                         rp_baud_base[i] = 230400;
2128                 } else {
2129                         /* mod 4 (divide by 5) prescale */
2130                         sClockPrescale = 0x14;
2131                         rp_baud_base[i] = 460800;
2132                 }
2133         }
2134
2135         for (aiop = 0; aiop < max_num_aiops; aiop++)
2136                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x40);
2137         ctlp = sCtlNumToCtlPtr(i);
2138         num_aiops = sPCIInitController(ctlp, i, aiopio, max_num_aiops, ConfigIO, 0, FREQ_DIS, 0, altChanRingIndicator, UPCIRingInd);
2139         for (aiop = 0; aiop < max_num_aiops; aiop++)
2140                 ctlp->AiopNumChan[aiop] = ports_per_aiop;
2141
2142         dev_info(&dev->dev, "comtrol PCI controller #%d found at "
2143                 "address %04lx, %d AIOP(s) (%s), creating ttyR%d - %ld\n",
2144                 i, rcktpt_io_addr[i], num_aiops, rocketModel[i].modelString,
2145                 rocketModel[i].startingPortNumber,
2146                 rocketModel[i].startingPortNumber + rocketModel[i].numPorts-1);
2147
2148         if (num_aiops <= 0) {
2149                 rcktpt_io_addr[i] = 0;
2150                 return (0);
2151         }
2152         is_PCI[i] = 1;
2153
2154         /*  Reset the AIOPIC, init the serial ports */
2155         for (aiop = 0; aiop < num_aiops; aiop++) {
2156                 sResetAiopByNum(ctlp, aiop);
2157                 num_chan = ports_per_aiop;
2158                 for (chan = 0; chan < num_chan; chan++)
2159                         init_r_port(i, aiop, chan, dev);
2160         }
2161
2162         /*  Rocket modems must be reset */
2163         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) ||
2164             (rcktpt_type[i] == ROCKET_TYPE_MODEMII) ||
2165             (rcktpt_type[i] == ROCKET_TYPE_MODEMIII)) {
2166                 num_chan = ports_per_aiop;
2167                 for (chan = 0; chan < num_chan; chan++)
2168                         sPCIModemReset(ctlp, chan, 1);
2169                 msleep(500);
2170                 for (chan = 0; chan < num_chan; chan++)
2171                         sPCIModemReset(ctlp, chan, 0);
2172                 msleep(500);
2173                 rmSpeakerReset(ctlp, rocketModel[i].model);
2174         }
2175         return (1);
2176 }
2177
2178 /*
2179  *  Probes for PCI cards, inits them if found
2180  *  Input:   board_found = number of ISA boards already found, or the
2181  *           starting board number
2182  *  Returns: Number of PCI boards found
2183  */
2184 static int __init init_PCI(int boards_found)
2185 {
2186         struct pci_dev *dev = NULL;
2187         int count = 0;
2188
2189         /*  Work through the PCI device list, pulling out ours */
2190         while ((dev = pci_get_device(PCI_VENDOR_ID_RP, PCI_ANY_ID, dev))) {
2191                 if (register_PCI(count + boards_found, dev))
2192                         count++;
2193         }
2194         return (count);
2195 }
2196
2197 #endif                          /* CONFIG_PCI */
2198
2199 /*
2200  *  Probes for ISA cards
2201  *  Input:   i = the board number to look for
2202  *  Returns: 1 if board found, 0 else
2203  */
2204 static int __init init_ISA(int i)
2205 {
2206         int num_aiops, num_chan = 0, total_num_chan = 0;
2207         int aiop, chan;
2208         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
2209         CONTROLLER_t *ctlp;
2210         char *type_string;
2211
2212         /*  If io_addr is zero, no board configured */
2213         if (rcktpt_io_addr[i] == 0)
2214                 return (0);
2215
2216         /*  Reserve the IO region */
2217         if (!request_region(rcktpt_io_addr[i], 64, "Comtrol RocketPort")) {
2218                 printk(KERN_ERR "Unable to reserve IO region for configured "
2219                                 "ISA RocketPort at address 0x%lx, board not "
2220                                 "installed...\n", rcktpt_io_addr[i]);
2221                 rcktpt_io_addr[i] = 0;
2222                 return (0);
2223         }
2224
2225         ctlp = sCtlNumToCtlPtr(i);
2226
2227         ctlp->boardType = rcktpt_type[i];
2228
2229         switch (rcktpt_type[i]) {
2230         case ROCKET_TYPE_PC104:
2231                 type_string = "(PC104)";
2232                 break;
2233         case ROCKET_TYPE_MODEM:
2234                 type_string = "(RocketModem)";
2235                 break;
2236         case ROCKET_TYPE_MODEMII:
2237                 type_string = "(RocketModem II)";
2238                 break;
2239         default:
2240                 type_string = "";
2241                 break;
2242         }
2243
2244         /*
2245          * If support_low_speed is set, use the slow clock prescale,
2246          * which supports 50 bps
2247          */
2248         if (support_low_speed) {
2249                 sClockPrescale = 0x19;  /* mod 9 (divide by 10) prescale */
2250                 rp_baud_base[i] = 230400;
2251         } else {
2252                 sClockPrescale = 0x14;  /* mod 4 (divide by 5) prescale */
2253                 rp_baud_base[i] = 460800;
2254         }
2255
2256         for (aiop = 0; aiop < MAX_AIOPS_PER_BOARD; aiop++)
2257                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x400);
2258
2259         num_aiops = sInitController(ctlp, i, controller + (i * 0x400), aiopio,  MAX_AIOPS_PER_BOARD, 0, FREQ_DIS, 0);
2260
2261         if (ctlp->boardType == ROCKET_TYPE_PC104) {
2262                 sEnAiop(ctlp, 2);       /* only one AIOPIC, but these */
2263                 sEnAiop(ctlp, 3);       /* CSels used for other stuff */
2264         }
2265
2266         /*  If something went wrong initing the AIOP's release the ISA IO memory */
2267         if (num_aiops <= 0) {
2268                 release_region(rcktpt_io_addr[i], 64);
2269                 rcktpt_io_addr[i] = 0;
2270                 return (0);
2271         }
2272
2273         rocketModel[i].startingPortNumber = nextLineNumber;
2274
2275         for (aiop = 0; aiop < num_aiops; aiop++) {
2276                 sResetAiopByNum(ctlp, aiop);
2277                 sEnAiop(ctlp, aiop);
2278                 num_chan = sGetAiopNumChan(ctlp, aiop);
2279                 total_num_chan += num_chan;
2280                 for (chan = 0; chan < num_chan; chan++)
2281                         init_r_port(i, aiop, chan, NULL);
2282         }
2283         is_PCI[i] = 0;
2284         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) || (rcktpt_type[i] == ROCKET_TYPE_MODEMII)) {
2285                 num_chan = sGetAiopNumChan(ctlp, 0);
2286                 total_num_chan = num_chan;
2287                 for (chan = 0; chan < num_chan; chan++)
2288                         sModemReset(ctlp, chan, 1);
2289                 msleep(500);
2290                 for (chan = 0; chan < num_chan; chan++)
2291                         sModemReset(ctlp, chan, 0);
2292                 msleep(500);
2293                 strcpy(rocketModel[i].modelString, "RocketModem ISA");
2294         } else {
2295                 strcpy(rocketModel[i].modelString, "RocketPort ISA");
2296         }
2297         rocketModel[i].numPorts = total_num_chan;
2298         rocketModel[i].model = MODEL_ISA;
2299
2300         printk(KERN_INFO "RocketPort ISA card #%d found at 0x%lx - %d AIOPs %s\n",
2301                i, rcktpt_io_addr[i], num_aiops, type_string);
2302
2303         printk(KERN_INFO "Installing %s, creating /dev/ttyR%d - %ld\n",
2304                rocketModel[i].modelString,
2305                rocketModel[i].startingPortNumber,
2306                rocketModel[i].startingPortNumber +
2307                rocketModel[i].numPorts - 1);
2308
2309         return (1);
2310 }
2311
2312 static const struct tty_operations rocket_ops = {
2313         .open = rp_open,
2314         .close = rp_close,
2315         .write = rp_write,
2316         .put_char = rp_put_char,
2317         .write_room = rp_write_room,
2318         .chars_in_buffer = rp_chars_in_buffer,
2319         .flush_buffer = rp_flush_buffer,
2320         .ioctl = rp_ioctl,
2321         .throttle = rp_throttle,
2322         .unthrottle = rp_unthrottle,
2323         .set_termios = rp_set_termios,
2324         .stop = rp_stop,
2325         .start = rp_start,
2326         .hangup = rp_hangup,
2327         .break_ctl = rp_break,
2328         .send_xchar = rp_send_xchar,
2329         .wait_until_sent = rp_wait_until_sent,
2330         .tiocmget = rp_tiocmget,
2331         .tiocmset = rp_tiocmset,
2332 };
2333
2334 static const struct tty_port_operations rocket_port_ops = {
2335         .carrier_raised = carrier_raised,
2336         .dtr_rts = dtr_rts,
2337 };
2338
2339 /*
2340  * The module "startup" routine; it's run when the module is loaded.
2341  */
2342 static int __init rp_init(void)
2343 {
2344         int ret = -ENOMEM, pci_boards_found, isa_boards_found, i;
2345
2346         printk(KERN_INFO "RocketPort device driver module, version %s, %s\n",
2347                ROCKET_VERSION, ROCKET_DATE);
2348
2349         rocket_driver = alloc_tty_driver(MAX_RP_PORTS);
2350         if (!rocket_driver)
2351                 goto err;
2352
2353         /*
2354          *  If board 1 is non-zero, there is at least one ISA configured.  If controller is
2355          *  zero, use the default controller IO address of board1 + 0x40.
2356          */
2357         if (board1) {
2358                 if (controller == 0)
2359                         controller = board1 + 0x40;
2360         } else {
2361                 controller = 0;  /*  Used as a flag, meaning no ISA boards */
2362         }
2363
2364         /*  If an ISA card is configured, reserve the 4 byte IO space for the Mudbac controller */
2365         if (controller && (!request_region(controller, 4, "Comtrol RocketPort"))) {
2366                 printk(KERN_ERR "Unable to reserve IO region for first "
2367                         "configured ISA RocketPort controller 0x%lx.  "
2368                         "Driver exiting\n", controller);
2369                 ret = -EBUSY;
2370                 goto err_tty;
2371         }
2372
2373         /*  Store ISA variable retrieved from command line or .conf file. */
2374         rcktpt_io_addr[0] = board1;
2375         rcktpt_io_addr[1] = board2;
2376         rcktpt_io_addr[2] = board3;
2377         rcktpt_io_addr[3] = board4;
2378
2379         rcktpt_type[0] = modem1 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2380         rcktpt_type[0] = pc104_1[0] ? ROCKET_TYPE_PC104 : rcktpt_type[0];
2381         rcktpt_type[1] = modem2 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2382         rcktpt_type[1] = pc104_2[0] ? ROCKET_TYPE_PC104 : rcktpt_type[1];
2383         rcktpt_type[2] = modem3 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2384         rcktpt_type[2] = pc104_3[0] ? ROCKET_TYPE_PC104 : rcktpt_type[2];
2385         rcktpt_type[3] = modem4 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2386         rcktpt_type[3] = pc104_4[0] ? ROCKET_TYPE_PC104 : rcktpt_type[3];
2387
2388         /*
2389          * Set up the tty driver structure and then register this
2390          * driver with the tty layer.
2391          */
2392
2393         rocket_driver->flags = TTY_DRIVER_DYNAMIC_DEV;
2394         rocket_driver->name = "ttyR";
2395         rocket_driver->driver_name = "Comtrol RocketPort";
2396         rocket_driver->major = TTY_ROCKET_MAJOR;
2397         rocket_driver->minor_start = 0;
2398         rocket_driver->type = TTY_DRIVER_TYPE_SERIAL;
2399         rocket_driver->subtype = SERIAL_TYPE_NORMAL;
2400         rocket_driver->init_termios = tty_std_termios;
2401         rocket_driver->init_termios.c_cflag =
2402             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2403         rocket_driver->init_termios.c_ispeed = 9600;
2404         rocket_driver->init_termios.c_ospeed = 9600;
2405 #ifdef ROCKET_SOFT_FLOW
2406         rocket_driver->flags |= TTY_DRIVER_REAL_RAW;
2407 #endif
2408         tty_set_operations(rocket_driver, &rocket_ops);
2409
2410         ret = tty_register_driver(rocket_driver);
2411         if (ret < 0) {
2412                 printk(KERN_ERR "Couldn't install tty RocketPort driver\n");
2413                 goto err_controller;
2414         }
2415
2416 #ifdef ROCKET_DEBUG_OPEN
2417         printk(KERN_INFO "RocketPort driver is major %d\n", rocket_driver.major);
2418 #endif
2419
2420         /*
2421          *  OK, let's probe each of the controllers looking for boards.  Any boards found
2422          *  will be initialized here.
2423          */
2424         isa_boards_found = 0;
2425         pci_boards_found = 0;
2426
2427         for (i = 0; i < NUM_BOARDS; i++) {
2428                 if (init_ISA(i))
2429                         isa_boards_found++;
2430         }
2431
2432 #ifdef CONFIG_PCI
2433         if (isa_boards_found < NUM_BOARDS)
2434                 pci_boards_found = init_PCI(isa_boards_found);
2435 #endif
2436
2437         max_board = pci_boards_found + isa_boards_found;
2438
2439         if (max_board == 0) {
2440                 printk(KERN_ERR "No rocketport ports found; unloading driver\n");
2441                 ret = -ENXIO;
2442                 goto err_ttyu;
2443         }
2444
2445         return 0;
2446 err_ttyu:
2447         tty_unregister_driver(rocket_driver);
2448 err_controller:
2449         if (controller)
2450                 release_region(controller, 4);
2451 err_tty:
2452         put_tty_driver(rocket_driver);
2453 err:
2454         return ret;
2455 }
2456
2457
2458 static void rp_cleanup_module(void)
2459 {
2460         int retval;
2461         int i;
2462
2463         del_timer_sync(&rocket_timer);
2464
2465         retval = tty_unregister_driver(rocket_driver);
2466         if (retval)
2467                 printk(KERN_ERR "Error %d while trying to unregister "
2468                        "rocketport driver\n", -retval);
2469
2470         for (i = 0; i < MAX_RP_PORTS; i++)
2471                 if (rp_table[i]) {
2472                         tty_unregister_device(rocket_driver, i);
2473                         tty_port_destroy(&rp_table[i]->port);
2474                         kfree(rp_table[i]);
2475                 }
2476
2477         put_tty_driver(rocket_driver);
2478
2479         for (i = 0; i < NUM_BOARDS; i++) {
2480                 if (rcktpt_io_addr[i] <= 0 || is_PCI[i])
2481                         continue;
2482                 release_region(rcktpt_io_addr[i], 64);
2483         }
2484         if (controller)
2485                 release_region(controller, 4);
2486 }
2487
2488 /***************************************************************************
2489 Function: sInitController
2490 Purpose:  Initialization of controller global registers and controller
2491           structure.
2492 Call:     sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
2493                           IRQNum,Frequency,PeriodicOnly)
2494           CONTROLLER_T *CtlP; Ptr to controller structure
2495           int CtlNum; Controller number
2496           ByteIO_t MudbacIO; Mudbac base I/O address.
2497           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2498              This list must be in the order the AIOPs will be found on the
2499              controller.  Once an AIOP in the list is not found, it is
2500              assumed that there are no more AIOPs on the controller.
2501           int AiopIOListSize; Number of addresses in AiopIOList
2502           int IRQNum; Interrupt Request number.  Can be any of the following:
2503                          0: Disable global interrupts
2504                          3: IRQ 3
2505                          4: IRQ 4
2506                          5: IRQ 5
2507                          9: IRQ 9
2508                          10: IRQ 10
2509                          11: IRQ 11
2510                          12: IRQ 12
2511                          15: IRQ 15
2512           Byte_t Frequency: A flag identifying the frequency
2513                    of the periodic interrupt, can be any one of the following:
2514                       FREQ_DIS - periodic interrupt disabled
2515                       FREQ_137HZ - 137 Hertz
2516                       FREQ_69HZ - 69 Hertz
2517                       FREQ_34HZ - 34 Hertz
2518                       FREQ_17HZ - 17 Hertz
2519                       FREQ_9HZ - 9 Hertz
2520                       FREQ_4HZ - 4 Hertz
2521                    If IRQNum is set to 0 the Frequency parameter is
2522                    overidden, it is forced to a value of FREQ_DIS.
2523           int PeriodicOnly: 1 if all interrupts except the periodic
2524                                interrupt are to be blocked.
2525                             0 is both the periodic interrupt and
2526                                other channel interrupts are allowed.
2527                             If IRQNum is set to 0 the PeriodicOnly parameter is
2528                                overidden, it is forced to a value of 0.
2529 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
2530                initialization failed.
2531
2532 Comments:
2533           If periodic interrupts are to be disabled but AIOP interrupts
2534           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2535
2536           If interrupts are to be completely disabled set IRQNum to 0.
2537
2538           Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2539           invalid combination.
2540
2541           This function performs initialization of global interrupt modes,
2542           but it does not actually enable global interrupts.  To enable
2543           and disable global interrupts use functions sEnGlobalInt() and
2544           sDisGlobalInt().  Enabling of global interrupts is normally not
2545           done until all other initializations are complete.
2546
2547           Even if interrupts are globally enabled, they must also be
2548           individually enabled for each channel that is to generate
2549           interrupts.
2550
2551 Warnings: No range checking on any of the parameters is done.
2552
2553           No context switches are allowed while executing this function.
2554
2555           After this function all AIOPs on the controller are disabled,
2556           they can be enabled with sEnAiop().
2557 */
2558 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
2559                            ByteIO_t * AiopIOList, int AiopIOListSize,
2560                            int IRQNum, Byte_t Frequency, int PeriodicOnly)
2561 {
2562         int i;
2563         ByteIO_t io;
2564         int done;
2565
2566         CtlP->AiopIntrBits = aiop_intr_bits;
2567         CtlP->AltChanRingIndicator = 0;
2568         CtlP->CtlNum = CtlNum;
2569         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
2570         CtlP->BusType = isISA;
2571         CtlP->MBaseIO = MudbacIO;
2572         CtlP->MReg1IO = MudbacIO + 1;
2573         CtlP->MReg2IO = MudbacIO + 2;
2574         CtlP->MReg3IO = MudbacIO + 3;
2575 #if 1
2576         CtlP->MReg2 = 0;        /* interrupt disable */
2577         CtlP->MReg3 = 0;        /* no periodic interrupts */
2578 #else
2579         if (sIRQMap[IRQNum] == 0) {     /* interrupts globally disabled */
2580                 CtlP->MReg2 = 0;        /* interrupt disable */
2581                 CtlP->MReg3 = 0;        /* no periodic interrupts */
2582         } else {
2583                 CtlP->MReg2 = sIRQMap[IRQNum];  /* set IRQ number */
2584                 CtlP->MReg3 = Frequency;        /* set frequency */
2585                 if (PeriodicOnly) {     /* periodic interrupt only */
2586                         CtlP->MReg3 |= PERIODIC_ONLY;
2587                 }
2588         }
2589 #endif
2590         sOutB(CtlP->MReg2IO, CtlP->MReg2);
2591         sOutB(CtlP->MReg3IO, CtlP->MReg3);
2592         sControllerEOI(CtlP);   /* clear EOI if warm init */
2593         /* Init AIOPs */
2594         CtlP->NumAiop = 0;
2595         for (i = done = 0; i < AiopIOListSize; i++) {
2596                 io = AiopIOList[i];
2597                 CtlP->AiopIO[i] = (WordIO_t) io;
2598                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
2599                 sOutB(CtlP->MReg2IO, CtlP->MReg2 | (i & 0x03)); /* AIOP index */
2600                 sOutB(MudbacIO, (Byte_t) (io >> 6));    /* set up AIOP I/O in MUDBAC */
2601                 if (done)
2602                         continue;
2603                 sEnAiop(CtlP, i);       /* enable the AIOP */
2604                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
2605                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
2606                         done = 1;       /* done looking for AIOPs */
2607                 else {
2608                         CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
2609                         sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
2610                         sOutB(io + _INDX_DATA, sClockPrescale);
2611                         CtlP->NumAiop++;        /* bump count of AIOPs */
2612                 }
2613                 sDisAiop(CtlP, i);      /* disable AIOP */
2614         }
2615
2616         if (CtlP->NumAiop == 0)
2617                 return (-1);
2618         else
2619                 return (CtlP->NumAiop);
2620 }
2621
2622 /***************************************************************************
2623 Function: sReadAiopID
2624 Purpose:  Read the AIOP idenfication number directly from an AIOP.
2625 Call:     sReadAiopID(io)
2626           ByteIO_t io: AIOP base I/O address
2627 Return:   int: Flag AIOPID_XXXX if a valid AIOP is found, where X
2628                  is replace by an identifying number.
2629           Flag AIOPID_NULL if no valid AIOP is found
2630 Warnings: No context switches are allowed while executing this function.
2631
2632 */
2633 static int sReadAiopID(ByteIO_t io)
2634 {
2635         Byte_t AiopID;          /* ID byte from AIOP */
2636
2637         sOutB(io + _CMD_REG, RESET_ALL);        /* reset AIOP */
2638         sOutB(io + _CMD_REG, 0x0);
2639         AiopID = sInW(io + _CHN_STAT0) & 0x07;
2640         if (AiopID == 0x06)
2641                 return (1);
2642         else                    /* AIOP does not exist */
2643                 return (-1);
2644 }
2645
2646 /***************************************************************************
2647 Function: sReadAiopNumChan
2648 Purpose:  Read the number of channels available in an AIOP directly from
2649           an AIOP.
2650 Call:     sReadAiopNumChan(io)
2651           WordIO_t io: AIOP base I/O address
2652 Return:   int: The number of channels available
2653 Comments: The number of channels is determined by write/reads from identical
2654           offsets within the SRAM address spaces for channels 0 and 4.
2655           If the channel 4 space is mirrored to channel 0 it is a 4 channel
2656           AIOP, otherwise it is an 8 channel.
2657 Warnings: No context switches are allowed while executing this function.
2658 */
2659 static int sReadAiopNumChan(WordIO_t io)
2660 {
2661         Word_t x;
2662         static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 };
2663
2664         /* write to chan 0 SRAM */
2665         out32((DWordIO_t) io + _INDX_ADDR, R);
2666         sOutW(io + _INDX_ADDR, 0);      /* read from SRAM, chan 0 */
2667         x = sInW(io + _INDX_DATA);
2668         sOutW(io + _INDX_ADDR, 0x4000); /* read from SRAM, chan 4 */
2669         if (x != sInW(io + _INDX_DATA)) /* if different must be 8 chan */
2670                 return (8);
2671         else
2672                 return (4);
2673 }
2674
2675 /***************************************************************************
2676 Function: sInitChan
2677 Purpose:  Initialization of a channel and channel structure
2678 Call:     sInitChan(CtlP,ChP,AiopNum,ChanNum)
2679           CONTROLLER_T *CtlP; Ptr to controller structure
2680           CHANNEL_T *ChP; Ptr to channel structure
2681           int AiopNum; AIOP number within controller
2682           int ChanNum; Channel number within AIOP
2683 Return:   int: 1 if initialization succeeded, 0 if it fails because channel
2684                number exceeds number of channels available in AIOP.
2685 Comments: This function must be called before a channel can be used.
2686 Warnings: No range checking on any of the parameters is done.
2687
2688           No context switches are allowed while executing this function.
2689 */
2690 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
2691                      int ChanNum)
2692 {
2693         int i;
2694         WordIO_t AiopIO;
2695         WordIO_t ChIOOff;
2696         Byte_t *ChR;
2697         Word_t ChOff;
2698         static Byte_t R[4];
2699         int brd9600;
2700
2701         if (ChanNum >= CtlP->AiopNumChan[AiopNum])
2702                 return 0;       /* exceeds num chans in AIOP */
2703
2704         /* Channel, AIOP, and controller identifiers */
2705         ChP->CtlP = CtlP;
2706         ChP->ChanID = CtlP->AiopID[AiopNum];
2707         ChP->AiopNum = AiopNum;
2708         ChP->ChanNum = ChanNum;
2709
2710         /* Global direct addresses */
2711         AiopIO = CtlP->AiopIO[AiopNum];
2712         ChP->Cmd = (ByteIO_t) AiopIO + _CMD_REG;
2713         ChP->IntChan = (ByteIO_t) AiopIO + _INT_CHAN;
2714         ChP->IntMask = (ByteIO_t) AiopIO + _INT_MASK;
2715         ChP->IndexAddr = (DWordIO_t) AiopIO + _INDX_ADDR;
2716         ChP->IndexData = AiopIO + _INDX_DATA;
2717
2718         /* Channel direct addresses */
2719         ChIOOff = AiopIO + ChP->ChanNum * 2;
2720         ChP->TxRxData = ChIOOff + _TD0;
2721         ChP->ChanStat = ChIOOff + _CHN_STAT0;
2722         ChP->TxRxCount = ChIOOff + _FIFO_CNT0;
2723         ChP->IntID = (ByteIO_t) AiopIO + ChP->ChanNum + _INT_ID0;
2724
2725         /* Initialize the channel from the RData array */
2726         for (i = 0; i < RDATASIZE; i += 4) {
2727                 R[0] = RData[i];
2728                 R[1] = RData[i + 1] + 0x10 * ChanNum;
2729                 R[2] = RData[i + 2];
2730                 R[3] = RData[i + 3];
2731                 out32(ChP->IndexAddr, R);
2732         }
2733
2734         ChR = ChP->R;
2735         for (i = 0; i < RREGDATASIZE; i += 4) {
2736                 ChR[i] = RRegData[i];
2737                 ChR[i + 1] = RRegData[i + 1] + 0x10 * ChanNum;
2738                 ChR[i + 2] = RRegData[i + 2];
2739                 ChR[i + 3] = RRegData[i + 3];
2740         }
2741
2742         /* Indexed registers */
2743         ChOff = (Word_t) ChanNum *0x1000;
2744
2745         if (sClockPrescale == 0x14)
2746                 brd9600 = 47;
2747         else
2748                 brd9600 = 23;
2749
2750         ChP->BaudDiv[0] = (Byte_t) (ChOff + _BAUD);
2751         ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8);
2752         ChP->BaudDiv[2] = (Byte_t) brd9600;
2753         ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8);
2754         out32(ChP->IndexAddr, ChP->BaudDiv);
2755
2756         ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL);
2757         ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8);
2758         ChP->TxControl[2] = 0;
2759         ChP->TxControl[3] = 0;
2760         out32(ChP->IndexAddr, ChP->TxControl);
2761
2762         ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL);
2763         ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8);
2764         ChP->RxControl[2] = 0;
2765         ChP->RxControl[3] = 0;
2766         out32(ChP->IndexAddr, ChP->RxControl);
2767
2768         ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS);
2769         ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8);
2770         ChP->TxEnables[2] = 0;
2771         ChP->TxEnables[3] = 0;
2772         out32(ChP->IndexAddr, ChP->TxEnables);
2773
2774         ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1);
2775         ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8);
2776         ChP->TxCompare[2] = 0;
2777         ChP->TxCompare[3] = 0;
2778         out32(ChP->IndexAddr, ChP->TxCompare);
2779
2780         ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1);
2781         ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8);
2782         ChP->TxReplace1[2] = 0;
2783         ChP->TxReplace1[3] = 0;
2784         out32(ChP->IndexAddr, ChP->TxReplace1);
2785
2786         ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2);
2787         ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8);
2788         ChP->TxReplace2[2] = 0;
2789         ChP->TxReplace2[3] = 0;
2790         out32(ChP->IndexAddr, ChP->TxReplace2);
2791
2792         ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
2793         ChP->TxFIFO = ChOff + _TX_FIFO;
2794
2795         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESTXFCNT);  /* apply reset Tx FIFO count */
2796         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Tx FIFO count */
2797         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
2798         sOutW(ChP->IndexData, 0);
2799         ChP->RxFIFOPtrs = ChOff + _RXF_OUTP;
2800         ChP->RxFIFO = ChOff + _RX_FIFO;
2801
2802         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESRXFCNT);  /* apply reset Rx FIFO count */
2803         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Rx FIFO count */
2804         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
2805         sOutW(ChP->IndexData, 0);
2806         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
2807         sOutW(ChP->IndexData, 0);
2808         ChP->TxPrioCnt = ChOff + _TXP_CNT;
2809         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioCnt);
2810         sOutB(ChP->IndexData, 0);
2811         ChP->TxPrioPtr = ChOff + _TXP_PNTR;
2812         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioPtr);
2813         sOutB(ChP->IndexData, 0);
2814         ChP->TxPrioBuf = ChOff + _TXP_BUF;
2815         sEnRxProcessor(ChP);    /* start the Rx processor */
2816
2817         return 1;
2818 }
2819
2820 /***************************************************************************
2821 Function: sStopRxProcessor
2822 Purpose:  Stop the receive processor from processing a channel.
2823 Call:     sStopRxProcessor(ChP)
2824           CHANNEL_T *ChP; Ptr to channel structure
2825
2826 Comments: The receive processor can be started again with sStartRxProcessor().
2827           This function causes the receive processor to skip over the
2828           stopped channel.  It does not stop it from processing other channels.
2829
2830 Warnings: No context switches are allowed while executing this function.
2831
2832           Do not leave the receive processor stopped for more than one
2833           character time.
2834
2835           After calling this function a delay of 4 uS is required to ensure
2836           that the receive processor is no longer processing this channel.
2837 */
2838 static void sStopRxProcessor(CHANNEL_T * ChP)
2839 {
2840         Byte_t R[4];
2841
2842         R[0] = ChP->R[0];
2843         R[1] = ChP->R[1];
2844         R[2] = 0x0a;
2845         R[3] = ChP->R[3];
2846         out32(ChP->IndexAddr, R);
2847 }
2848
2849 /***************************************************************************
2850 Function: sFlushRxFIFO
2851 Purpose:  Flush the Rx FIFO
2852 Call:     sFlushRxFIFO(ChP)
2853           CHANNEL_T *ChP; Ptr to channel structure
2854 Return:   void
2855 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2856           while it is being flushed the receive processor is stopped
2857           and the transmitter is disabled.  After these operations a
2858           4 uS delay is done before clearing the pointers to allow
2859           the receive processor to stop.  These items are handled inside
2860           this function.
2861 Warnings: No context switches are allowed while executing this function.
2862 */
2863 static void sFlushRxFIFO(CHANNEL_T * ChP)
2864 {
2865         int i;
2866         Byte_t Ch;              /* channel number within AIOP */
2867         int RxFIFOEnabled;      /* 1 if Rx FIFO enabled */
2868
2869         if (sGetRxCnt(ChP) == 0)        /* Rx FIFO empty */
2870                 return;         /* don't need to flush */
2871
2872         RxFIFOEnabled = 0;
2873         if (ChP->R[0x32] == 0x08) {     /* Rx FIFO is enabled */
2874                 RxFIFOEnabled = 1;
2875                 sDisRxFIFO(ChP);        /* disable it */
2876                 for (i = 0; i < 2000 / 200; i++)        /* delay 2 uS to allow proc to disable FIFO */
2877                         sInB(ChP->IntChan);     /* depends on bus i/o timing */
2878         }
2879         sGetChanStatus(ChP);    /* clear any pending Rx errors in chan stat */
2880         Ch = (Byte_t) sGetChanNum(ChP);
2881         sOutB(ChP->Cmd, Ch | RESRXFCNT);        /* apply reset Rx FIFO count */
2882         sOutB(ChP->Cmd, Ch);    /* remove reset Rx FIFO count */
2883         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
2884         sOutW(ChP->IndexData, 0);
2885         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
2886         sOutW(ChP->IndexData, 0);
2887         if (RxFIFOEnabled)
2888                 sEnRxFIFO(ChP); /* enable Rx FIFO */
2889 }
2890
2891 /***************************************************************************
2892 Function: sFlushTxFIFO
2893 Purpose:  Flush the Tx FIFO
2894 Call:     sFlushTxFIFO(ChP)
2895           CHANNEL_T *ChP; Ptr to channel structure
2896 Return:   void
2897 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
2898           while it is being flushed the receive processor is stopped
2899           and the transmitter is disabled.  After these operations a
2900           4 uS delay is done before clearing the pointers to allow
2901           the receive processor to stop.  These items are handled inside
2902           this function.
2903 Warnings: No context switches are allowed while executing this function.
2904 */
2905 static void sFlushTxFIFO(CHANNEL_T * ChP)
2906 {
2907         int i;
2908         Byte_t Ch;              /* channel number within AIOP */
2909         int TxEnabled;          /* 1 if transmitter enabled */
2910
2911         if (sGetTxCnt(ChP) == 0)        /* Tx FIFO empty */
2912                 return;         /* don't need to flush */
2913
2914         TxEnabled = 0;
2915         if (ChP->TxControl[3] & TX_ENABLE) {
2916                 TxEnabled = 1;
2917                 sDisTransmit(ChP);      /* disable transmitter */
2918         }
2919         sStopRxProcessor(ChP);  /* stop Rx processor */
2920         for (i = 0; i < 4000 / 200; i++)        /* delay 4 uS to allow proc to stop */
2921                 sInB(ChP->IntChan);     /* depends on bus i/o timing */
2922         Ch = (Byte_t) sGetChanNum(ChP);
2923         sOutB(ChP->Cmd, Ch | RESTXFCNT);        /* apply reset Tx FIFO count */
2924         sOutB(ChP->Cmd, Ch);    /* remove reset Tx FIFO count */
2925         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
2926         sOutW(ChP->IndexData, 0);
2927         if (TxEnabled)
2928                 sEnTransmit(ChP);       /* enable transmitter */
2929         sStartRxProcessor(ChP); /* restart Rx processor */
2930 }
2931
2932 /***************************************************************************
2933 Function: sWriteTxPrioByte
2934 Purpose:  Write a byte of priority transmit data to a channel
2935 Call:     sWriteTxPrioByte(ChP,Data)
2936           CHANNEL_T *ChP; Ptr to channel structure
2937           Byte_t Data; The transmit data byte
2938
2939 Return:   int: 1 if the bytes is successfully written, otherwise 0.
2940
2941 Comments: The priority byte is transmitted before any data in the Tx FIFO.
2942
2943 Warnings: No context switches are allowed while executing this function.
2944 */
2945 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data)
2946 {
2947         Byte_t DWBuf[4];        /* buffer for double word writes */
2948         Word_t *WordPtr;        /* must be far because Win SS != DS */
2949         register DWordIO_t IndexAddr;
2950
2951         if (sGetTxCnt(ChP) > 1) {       /* write it to Tx priority buffer */
2952                 IndexAddr = ChP->IndexAddr;
2953                 sOutW((WordIO_t) IndexAddr, ChP->TxPrioCnt);    /* get priority buffer status */
2954                 if (sInB((ByteIO_t) ChP->IndexData) & PRI_PEND) /* priority buffer busy */
2955                         return (0);     /* nothing sent */
2956
2957                 WordPtr = (Word_t *) (&DWBuf[0]);
2958                 *WordPtr = ChP->TxPrioBuf;      /* data byte address */
2959
2960                 DWBuf[2] = Data;        /* data byte value */
2961                 out32(IndexAddr, DWBuf);        /* write it out */
2962
2963                 *WordPtr = ChP->TxPrioCnt;      /* Tx priority count address */
2964
2965                 DWBuf[2] = PRI_PEND + 1;        /* indicate 1 byte pending */
2966                 DWBuf[3] = 0;   /* priority buffer pointer */
2967                 out32(IndexAddr, DWBuf);        /* write it out */
2968         } else {                /* write it to Tx FIFO */
2969
2970                 sWriteTxByte(sGetTxRxDataIO(ChP), Data);
2971         }
2972         return (1);             /* 1 byte sent */
2973 }
2974
2975 /***************************************************************************
2976 Function: sEnInterrupts
2977 Purpose:  Enable one or more interrupts for a channel
2978 Call:     sEnInterrupts(ChP,Flags)
2979           CHANNEL_T *ChP; Ptr to channel structure
2980           Word_t Flags: Interrupt enable flags, can be any combination
2981              of the following flags:
2982                 TXINT_EN:   Interrupt on Tx FIFO empty
2983                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
2984                             sSetRxTrigger())
2985                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
2986                 MCINT_EN:   Interrupt on modem input change
2987                 CHANINT_EN: Allow channel interrupt signal to the AIOP's
2988                             Interrupt Channel Register.
2989 Return:   void
2990 Comments: If an interrupt enable flag is set in Flags, that interrupt will be
2991           enabled.  If an interrupt enable flag is not set in Flags, that
2992           interrupt will not be changed.  Interrupts can be disabled with
2993           function sDisInterrupts().
2994
2995           This function sets the appropriate bit for the channel in the AIOP's
2996           Interrupt Mask Register if the CHANINT_EN flag is set.  This allows
2997           this channel's bit to be set in the AIOP's Interrupt Channel Register.
2998
2999           Interrupts must also be globally enabled before channel interrupts
3000           will be passed on to the host.  This is done with function
3001           sEnGlobalInt().
3002
3003           In some cases it may be desirable to disable interrupts globally but
3004           enable channel interrupts.  This would allow the global interrupt
3005           status register to be used to determine which AIOPs need service.
3006 */
3007 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags)
3008 {
3009         Byte_t Mask;            /* Interrupt Mask Register */
3010
3011         ChP->RxControl[2] |=
3012             ((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3013
3014         out32(ChP->IndexAddr, ChP->RxControl);
3015
3016         ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN);
3017
3018         out32(ChP->IndexAddr, ChP->TxControl);
3019
3020         if (Flags & CHANINT_EN) {
3021                 Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum];
3022                 sOutB(ChP->IntMask, Mask);
3023         }
3024 }
3025
3026 /***************************************************************************
3027 Function: sDisInterrupts
3028 Purpose:  Disable one or more interrupts for a channel
3029 Call:     sDisInterrupts(ChP,Flags)
3030           CHANNEL_T *ChP; Ptr to channel structure
3031           Word_t Flags: Interrupt flags, can be any combination
3032              of the following flags:
3033                 TXINT_EN:   Interrupt on Tx FIFO empty
3034                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
3035                             sSetRxTrigger())
3036                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
3037                 MCINT_EN:   Interrupt on modem input change
3038                 CHANINT_EN: Disable channel interrupt signal to the
3039                             AIOP's Interrupt Channel Register.
3040 Return:   void
3041 Comments: If an interrupt flag is set in Flags, that interrupt will be
3042           disabled.  If an interrupt flag is not set in Flags, that
3043           interrupt will not be changed.  Interrupts can be enabled with
3044           function sEnInterrupts().
3045
3046           This function clears the appropriate bit for the channel in the AIOP's
3047           Interrupt Mask Register if the CHANINT_EN flag is set.  This blocks
3048           this channel's bit from being set in the AIOP's Interrupt Channel
3049           Register.
3050 */
3051 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags)
3052 {
3053         Byte_t Mask;            /* Interrupt Mask Register */
3054
3055         ChP->RxControl[2] &=
3056             ~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3057         out32(ChP->IndexAddr, ChP->RxControl);
3058         ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN);
3059         out32(ChP->IndexAddr, ChP->TxControl);
3060
3061         if (Flags & CHANINT_EN) {
3062                 Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum];
3063                 sOutB(ChP->IntMask, Mask);
3064         }
3065 }
3066
3067 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode)
3068 {
3069         sOutB(ChP->CtlP->AiopIO[2], (mode & 0x18) | ChP->ChanNum);
3070 }
3071
3072 /*
3073  *  Not an official SSCI function, but how to reset RocketModems.
3074  *  ISA bus version
3075  */
3076 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on)
3077 {
3078         ByteIO_t addr;
3079         Byte_t val;
3080
3081         addr = CtlP->AiopIO[0] + 0x400;
3082         val = sInB(CtlP->MReg3IO);
3083         /* if AIOP[1] is not enabled, enable it */
3084         if ((val & 2) == 0) {
3085                 val = sInB(CtlP->MReg2IO);
3086                 sOutB(CtlP->MReg2IO, (val & 0xfc) | (1 & 0x03));
3087                 sOutB(CtlP->MBaseIO, (unsigned char) (addr >> 6));
3088         }
3089
3090         sEnAiop(CtlP, 1);
3091         if (!on)
3092                 addr += 8;
3093         sOutB(addr + chan, 0);  /* apply or remove reset */
3094         sDisAiop(CtlP, 1);
3095 }
3096
3097 /*
3098  *  Not an official SSCI function, but how to reset RocketModems.
3099  *  PCI bus version
3100  */
3101 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on)
3102 {
3103         ByteIO_t addr;
3104
3105         addr = CtlP->AiopIO[0] + 0x40;  /* 2nd AIOP */
3106         if (!on)
3107                 addr += 8;
3108         sOutB(addr + chan, 0);  /* apply or remove reset */
3109 }
3110
3111 /*  Returns the line number given the controller (board), aiop and channel number */
3112 static unsigned char GetLineNumber(int ctrl, int aiop, int ch)
3113 {
3114         return lineNumbers[(ctrl << 5) | (aiop << 3) | ch];
3115 }
3116
3117 /*
3118  *  Stores the line number associated with a given controller (board), aiop
3119  *  and channel number.
3120  *  Returns:  The line number assigned
3121  */
3122 static unsigned char SetLineNumber(int ctrl, int aiop, int ch)
3123 {
3124         lineNumbers[(ctrl << 5) | (aiop << 3) | ch] = nextLineNumber++;
3125         return (nextLineNumber - 1);
3126 }